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From: Vishal Sagar <vsagar@xilinx.com>
To: Luca Ceresoli <luca@lucaceresoli.net>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Hyun Kwon <hyunk@xilinx.com>,
	"mchehab@kernel.org" <mchehab@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	Michal Simek <michals@xilinx.com>,
	"linux-media@vger.kernel.org" <linux-media@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"hans.verkuil@cisco.com" <hans.verkuil@cisco.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Dinesh Kumar <dineshk@xilinx.com>,
	Sandip Kothari <sandipk@xilinx.com>,
	Jacopo Mondi <jacopo@jmondi.org>, Hyun Kwon <hyunk@xilinx.com>,
	Kondalarao Polisetti <kpolise@xilinx.com>
Subject: RE: [PATCH v11 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver
Date: Tue, 21 Apr 2020 08:45:06 +0000	[thread overview]
Message-ID: <DM6PR02MB6876D34CB0F57DAAD2E57D27A7D50@DM6PR02MB6876.namprd02.prod.outlook.com> (raw)
In-Reply-To: <0a3ea86b-cb4c-a1db-664e-cfa555d8ccf8@lucaceresoli.net>

Hi Luca,

> -----Original Message-----
> From: Luca Ceresoli <luca@lucaceresoli.net>
> Sent: Tuesday, April 21, 2020 1:16 PM
> To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: Vishal Sagar <vsagar@xilinx.com>; Hyun Kwon <hyunk@xilinx.com>;
> mchehab@kernel.org; robh+dt@kernel.org; mark.rutland@arm.com; Michal
> Simek <michals@xilinx.com>; linux-media@vger.kernel.org;
> devicetree@vger.kernel.org; hans.verkuil@cisco.com; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Dinesh Kumar
> <dineshk@xilinx.com>; Sandip Kothari <sandipk@xilinx.com>; Jacopo Mondi
> <jacopo@jmondi.org>; Hyun Kwon <hyunk@xilinx.com>
> Subject: Re: [PATCH v11 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx
> Subsystem driver
> 
> Hi Laurent,
> 
> On 20/04/20 21:57, Laurent Pinchart wrote:
> > Hi Luca,
> >
> > On Mon, Apr 20, 2020 at 09:24:25PM +0200, Luca Ceresoli wrote:
> >> On 19/04/20 20:02, Laurent Pinchart wrote:
> >> [...]
> >>>> +static irqreturn_t xcsi2rxss_irq_handler(int irq, void *dev_id) {
> >>>> +	struct xcsi2rxss_state *state = (struct xcsi2rxss_state *)dev_id;
> >>>> +	struct xcsi2rxss_core *core = &state->core;
> >>>> +	u32 status;
> >>>> +
> >>>> +	status = xcsi2rxss_read(core, XCSI_ISR_OFFSET) &
> XCSI_ISR_ALLINTR_MASK;
> >>>> +	dev_dbg_ratelimited(core->dev, "interrupt status = 0x%08x\n",
> >>>> +status);
> >>>
> >>> As this is expected to occur for every frame, I would drop the
> >>> message, even if rate-limited.
> >>>
> >>>> +
> >>>> +	if (!status)
> >>>> +		return IRQ_NONE;
> >>>> +
> >>>> +	/* Received a short packet */
> >>>> +	if (status & XCSI_ISR_SPFIFONE) {
> >>>> +		dev_dbg_ratelimited(core->dev, "Short packet = 0x%08x\n",
> >>>> +				    xcsi2rxss_read(core, XCSI_SPKTR_OFFSET));
> >>>> +	}
> >>>
> >>> Same here, this will occur all the time, I'd remove this message.
> >>> You need to read XCSI_SPKTR_OFFSET though, and you should do so in a
> >>> loop until the XCSI_CSR_SPFIFONE in XCSI_CSR_OFFSET is cleared in
> >>> case multiple short packets are received before the interrupt
> >>> handler executes.
> >>>
> >>> I also wonder if it would make sense to extract the frame number
> >>> from the FS short packet, and make it available through the subdev
> >>> API. I think it should be reported through a V4L2_EVENT_FRAME_SYNC
> >>> event. This can be implemented later.
> >>>
> >>>> +
> >>>> +	/* Short packet FIFO overflow */
> >>>> +	if (status & XCSI_ISR_SPFIFOF)
> >>>> +		dev_dbg_ratelimited(core->dev, "Short packet FIFO
> >>>> +overflowed\n");
> >>>> +
> >>>> +	/*
> >>>> +	 * Stream line buffer full
> >>>> +	 * This means there is a backpressure from downstream IP
> >>>> +	 */
> >>>> +	if (status & XCSI_ISR_SLBF) {
> >>>> +		dev_alert_ratelimited(core->dev, "Stream Line Buffer
> Full!\n");
> >>>> +		xcsi2rxss_stop_stream(state);
> >>>> +		if (core->rst_gpio) {
> >>>> +			gpiod_set_value(core->rst_gpio, 1);
> >>>> +			/* minimum 40 dphy_clk_200M cycles */
> >>>> +			ndelay(250);
> >>>> +			gpiod_set_value(core->rst_gpio, 0);
> >>>> +		}
> >>>
> >>> I don't think you should stop the core here. xcsi2rxss_stop_stream()
> >>> calls the source .s_stream(0) operation, which usually involves I2C
> >>> writes that will sleep.
> >>>
> >>> You should instead report an event to userspace (it looks like we
> >>> have no error event defined in V4L2, one should be added), and rely
> >>> on the normal stop procedure.
> >>
> >> FWIW, since a long time I've been using a modified version of this
> >> routine, where after a Stream Line Buffer Full condition I just stop
> >> and restart the csi2rx core and the stream continues after a minimal
> glitch.
> >> Other subdev are unaware that anything has happened and keep on
> streaming.
> >>
> >> Not sure this is the correct thing to do, but it's working for me.
> >> Also I proposed this topic in one of the previous iterations of this
> >> patch, but the situation was different because the stream on/off was
> >> not propagated back at that time.
> >
> > Thanks for the feedback. How often does this occur in practice ?
> 
> Quite often indeed in my case, as the MIPI stream comes from a remote
> sensor via a video serdes chipset, and both the cable and the remote sensor
> module are subject to heavy EMI. Depending on the setup I observed SLBF
> happening up to 5~10 times per hour.
> 
> --
> Luca

Thanks for sharing your observation.
Getting a stream line buffer full condition indicates a design issue.
Stopping, resetting using video_aresetn and starting is valid way to start MIPI CSI-2 Rx SS but masks the issue.
Hence the current implementation is to warn and stop streaming.

Regards
Vishal Sagar


  parent reply	other threads:[~2020-04-21  8:45 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-09 19:44 [PATCH v11 0/2] Add support for Xilinx CSI2 Receiver Subsystem Vishal Sagar
2020-04-09 19:44 ` [PATCH v11 1/2] media: dt-bindings: media: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem Vishal Sagar
2020-04-19 15:43   ` Laurent Pinchart
2020-04-19 15:45     ` Laurent Pinchart
2020-04-20 18:02     ` Vishal Sagar
2020-04-09 19:44 ` [PATCH v11 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver Vishal Sagar
2020-04-19 18:02   ` Laurent Pinchart
2020-04-20 18:03     ` Vishal Sagar
2020-04-20 19:24     ` Luca Ceresoli
2020-04-20 19:57       ` Laurent Pinchart
2020-04-21  7:45         ` Luca Ceresoli
2020-04-21  8:38           ` Laurent Pinchart
2020-04-21  9:53             ` Luca Ceresoli
2020-04-21  8:45           ` Vishal Sagar [this message]
2020-04-21 10:29   ` Luca Ceresoli
2020-04-21 11:39     ` Vishal Sagar

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