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Mon, 24 Aug 2020 07:16:32 +0000 From: Swapnil Kashinath Jakhade To: =?iso-8859-1?Q?Guido_G=FCnther?= , Tomi Valkeinen CC: "airlied@linux.ie" , "daniel@ffwll.ch" , "Laurent.pinchart@ideasonboard.com" , "robh+dt@kernel.org" , "a.hajda@samsung.com" , "narmstrong@baylibre.com" , "jonas@kwiboo.se" , "jernej.skrabec@siol.net" , "dri-devel@lists.freedesktop.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Milind Parab , Yuti Suresh Amonkar , "praneeth@ti.com" , "nsekhar@ti.com" , "jsarha@ti.com" , "sandor.yu@nxp.com" Subject: RE: [PATCH v8 0/3] drm: Add support for Cadence MHDP DPI/DP bridge and J721E wrapper. Thread-Topic: [PATCH v8 0/3] drm: Add support for Cadence MHDP DPI/DP bridge and J721E wrapper. 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x-ms-exchange-antispam-messagedata: v0w0x1mrrD2AIwgnf7KabXU47cdSnFqkVfiZg0O8pHiHTU2wIe9XnYPjiMfMLeMVKFU04PBfXCdNuLeE7mCI7DosvublL6GkyWQX9qUCT9oNqi09CrpcTWlvp7q7qwJoK9baThISU6r6diQFza58fPk/J/7HfG9o8CF+xktIzICSXbDD9WdlUSx/EyMNr3E6pnaTLl2Lc7ifsPpNrDf2Pq/TeQugL4XxHcLE8U69MlEKFN+HHOZTxlkFY277qxUIkvyNTGZdmVN2x5cWj3gYpC84srKgbvvrmGQgRoDKZFHHwbX3al065ZHJA52WIe8ciBPc2F3gk9996zVThgoQj7eO6RMD9KntFXn4cSJ0f/vPlnG81SfPlKcpLBbmAL7P6QkI2K9vaRjzXQYJLfMp9I6Om6EUtEm+Qz4ndsE0N7hmk6VGDpn2oI8J8a8th8KuTQoa0YONeoPakm0ud/yYUwk4uBdHsnS9Pmk34ta7DT3qaq1erJNcgKJ5iKqHleemZ1dQ9cjiqFcPy4OHn6dHyD/1UjWm4l+hFIJeHLBi8HY5liZKMbZCkP3jOSk6EAMW9GBQKIu2bK7K2Lybh2ujCay7T6RHKaRdEWr5a39edf5nncxoiN083eoXLjHOpYO9luC04Eitf272H0oWPs+NBA== Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: cadence.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR07MB6154.namprd07.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1ac4358e-fe45-4a51-2cb9-08d847fda0a3 X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Aug 2020 07:16:31.8042 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: d36035c5-6ce6-4662-a3dc-e762e61ae4c9 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 5L4ThGam/SCFXkFyRVb9jitImoLiNRhx3ylg8XuRDkTMpNJ1CH9jU00uS/bdwZSIesBqIf5XB1qiBU7IJQZjbcVDPPOm+33vqGUYkqPtktA= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR07MB7130 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-08-24_06:2020-08-24,2020-08-24 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 bulkscore=0 adultscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 mlxlogscore=999 spamscore=0 clxscore=1011 mlxscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2008240051 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Guido, > -----Original Message----- > From: Guido G=FCnther > Sent: Wednesday, August 12, 2020 7:27 PM > To: Tomi Valkeinen > Cc: Swapnil Kashinath Jakhade ; airlied@linux.ie; > daniel@ffwll.ch; Laurent.pinchart@ideasonboard.com; robh+dt@kernel.org; > a.hajda@samsung.com; narmstrong@baylibre.com; jonas@kwiboo.se; > jernej.skrabec@siol.net; dri-devel@lists.freedesktop.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Milind Parab > ; Yuti Suresh Amonkar ; > praneeth@ti.com; nsekhar@ti.com; jsarha@ti.com; sandor.yu@nxp.com > Subject: Re: [PATCH v8 0/3] drm: Add support for Cadence MHDP DPI/DP > bridge and J721E wrapper. >=20 > EXTERNAL MAIL >=20 >=20 > Hi, > On Wed, Aug 12, 2020 at 01:47:42PM +0300, Tomi Valkeinen wrote: > > Hi Guido, > > > > On 12/08/2020 11:39, Guido G=FCnther wrote: > > > Hi, > > > On Thu, Aug 06, 2020 at 01:34:29PM +0200, Swapnil Jakhade wrote: > > >> This patch series adds new DRM bridge driver for Cadence MHDP > > >> DPI/DP bridge. The Cadence Display Port IP is also referred as MHDP > > >> (Mobile High Definition Link, High-Definition Multimedia Interface, > Display Port). > > >> Cadence Display Port complies with VESA DisplayPort (DP) and > > >> embedded Display Port (eDP) standards. > > > > > > Is there any relation to the cadence mhdp ip core used inthe imx8mq: > > > > > > > > > https://urldefense.com/v3/__https://lore.kernel.org/dri-devel/cover. > > > > 1590982881.git.Sandor.yu@nxp.com/__;!!EHscmS1ygiU1lA!QIVUQ0JEY1Wz4 > gM > > > qV3HYGyyp5m4r_Fje6dL5ptUdhSzeqzzqBBR0Jo-BC9arK-g$ > > > > > > It looks very similar in several places so should that use the same d= river? > > > Cheers, > > > -- Guido > > > > Interesting. > > > > So the original Cadence DP patches for TI SoCs did create a common > > driver with Rockchip's older mhdp driver. And looks like the IMX series > points to an early version of that patch ("drm/rockchip: > > prepare common code for cdns and rk dpi/dp driver"). > > > > We gave up on that as the IPs did have differences and the firmwares > > used were apparently quite different. The end result was very > > difficult to maintain, especially as (afaik) none of the people involve= d had > relevant Rockchip HW. >=20 > Is the `struct mhdp_platform_ops` a leftover from that? Can that be > dropped? >=20 > > The idea was to get a stable DP driver for TI SoCs ready and upstream, > > and then carefully try to create common parts with Rockchip's driver in > small pieces. >=20 > I wonder how imx8 would best blend into this? First thing will likely be = to > upstream the phy code in driveres/phy/ so a modified version of this brid= ge > driver could call into that, then go and look for common patterns. >=20 > > If the Rockchip and IMX mhdp have the same IP and same firmware, then > > they obviously should share code as done in the series you point to. >=20 > I'm pretty sure they use different firmware though - the imx8mq additiona= lly > supports HDMI with a different firmware on the same IP core > (13.4 and 13.5 in the imx8mq ref manual). >=20 > > Perhaps Cadence can clarify the differences between IMX, TI and > > Rockchip IPs and FWs? >=20 > That would be great! > -- Guido >=20 Following are the differences between MHDP IPs from Cadence for Rockchip, T= I and NxP: The Rockchip and NXP MHDP Core shares the same part (IP8501) which is DP v1= .3 SST Controller with HDCP 2.2/1.x. NXP's version additionally supports HDMI. TI uses a different part (IP8546A), which is DP v1.4 with HDCP 2.2/1.x. TI DP Controller adds support for additional features such as Multi Stream = Support (MST), Forward Error Correction (FEC) and Compression (DSC). Also, FW used for TI has significant differences than FW used for Rockchip = or NXP. NxP and TI firmware are developed and maintained separately by Cadence and = are in active support. >From the Linux driver perspective, given the differences, it would make sen= se to have TI driver maintained separately. Thanks, Swapnil >=20 > > I'm worried that if there are IP differences, even if not great ones, > > and if the FWs are different and developed separately, it'll be a > > constant "fix X for SoC A, and accidentally break Y for SoC B and C", > especially if too much code is shared. > > > > In the long run I'm all for a single driver (or large shared parts), > > but I'm not sure if we should start with that approach. >=20 >=20 >=20 >=20 > > > > Tomi > > > > -- > > Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. > > Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki > >