From: "Sean V Kelley" <sean.v.kelley@intel.com>
To: "Bjorn Helgaas" <helgaas@kernel.org>
Cc: bhelgaas@google.com, Jonathan.Cameron@huawei.com,
rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com,
sathyanarayanan.kuppuswamy@linux.intel.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
"Qiuxu Zhuo" <qiuxu.zhuo@intel.com>
Subject: Re: [PATCH V2 2/9] PCI: Extend Root Port Driver to support RCEC
Date: Wed, 05 Aug 2020 11:14:48 -0700 [thread overview]
Message-ID: <E3F966D9-DBD4-4392-84FF-F012D1F16615@intel.com> (raw)
In-Reply-To: <20200805174328.GA521293@bjorn-Precision-5520>
On 5 Aug 2020, at 10:43, Bjorn Helgaas wrote:
> "git log --oneline" again.
Rewording lost track of the first line. Argh, will fix.
>
> On Tue, Aug 04, 2020 at 12:40:45PM -0700, Sean V Kelley wrote:
>> From: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
>>
>> If a Root Complex Integrated Endpoint (RCiEP) is implemented, errors
>> may
>> optionally be sent to a corresponding Root Complex Event Collector
>> (RCEC).
>> Each RCiEP must be associated with no more than one RCEC. Interface
>> errors
>> are reported to the OS by RCECs.
>>
>> For an RCEC (technically not a Bridge), error messages "received"
>> from
>> associated RCiEPs must be enabled for "transmission" in order to
>> cause a
>> System Error via the Root Control register or (when the Advanced
>> Error
>> Reporting Capability is present) reporting via the Root Error Command
>> register and logging in the Root Error Status register and Error
>> Source
>> Identification register.
>>
>> Given the commonality with Root Ports and the need to also support
>> AER
>> and PME services for RCECs, extend the Root Port driver to support
>> RCEC
>> devices through the addition of the RCEC Class ID to the driver
>> structure.
>>
>> Co-developed-by: Sean V Kelley <sean.v.kelley@intel.com>
>> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
>> Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com>
>> ---
>> drivers/pci/pcie/portdrv_core.c | 8 ++++----
>> drivers/pci/pcie/portdrv_pci.c | 5 ++++-
>> 2 files changed, 8 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/pci/pcie/portdrv_core.c
>> b/drivers/pci/pcie/portdrv_core.c
>> index 50a9522ab07d..5d4a400094fc 100644
>> --- a/drivers/pci/pcie/portdrv_core.c
>> +++ b/drivers/pci/pcie/portdrv_core.c
>> @@ -234,11 +234,11 @@ static int get_port_device_capability(struct
>> pci_dev *dev)
>> #endif
>>
>> /*
>> - * Root ports are capable of generating PME too. Root Complex
>> - * Event Collectors can also generate PMEs, but we don't handle
>> - * those yet.
>> + * Root ports and Root Complex Event Collectors are capable
>> + * of generating PME too.
>> */
>> - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT &&
>> + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
>> + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) &&
>> (pcie_ports_native || host->native_pme)) {
>> services |= PCIE_PORT_SERVICE_PME;
>>
>> diff --git a/drivers/pci/pcie/portdrv_pci.c
>> b/drivers/pci/pcie/portdrv_pci.c
>> index 3a3ce40ae1ab..4d880679b9b1 100644
>> --- a/drivers/pci/pcie/portdrv_pci.c
>> +++ b/drivers/pci/pcie/portdrv_pci.c
>> @@ -106,7 +106,8 @@ static int pcie_portdrv_probe(struct pci_dev
>> *dev,
>> if (!pci_is_pcie(dev) ||
>> ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
>> (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
>> - (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
>> + (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM) &&
>> + (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC)))
>> return -ENODEV;
>>
>> status = pcie_port_device_register(dev);
>> @@ -195,6 +196,8 @@ static const struct pci_device_id port_pci_ids[]
>> = {
>> { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) },
>> /* subtractive decode PCI-to-PCI bridge, class type is 060401h */
>> { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) },
>> + /* handle any Root Complex Event Collector */
>> + { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) },
>> { },
>> };
>>
>> --
>> 2.27.0
>>
next prev parent reply other threads:[~2020-08-05 18:17 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-04 19:40 [PATCH V2 0/9] Add RCEC handling to PCI/AER Sean V Kelley
2020-08-04 19:40 ` [PATCH V2 1/9] pci_ids: Add class code and extended capability for RCEC Sean V Kelley
2020-08-05 3:01 ` Bjorn Helgaas
2020-08-04 19:40 ` [PATCH V2 2/9] PCI: Extend Root Port Driver to support RCEC Sean V Kelley
2020-08-05 17:43 ` Bjorn Helgaas
2020-08-05 18:14 ` Sean V Kelley [this message]
2020-08-05 17:45 ` Jonathan Cameron
2020-08-05 17:50 ` Sean V Kelley
2020-08-26 16:16 ` Kuppuswamy, Sathyanarayanan
2020-08-26 18:29 ` sean.v.kelley
2020-08-04 19:40 ` [PATCH V2 3/9] PCI/portdrv: Add pcie_walk_rcec() to walk RCiEPs associated with RCEC Sean V Kelley
2020-08-05 17:43 ` Bjorn Helgaas
2020-08-05 18:07 ` Sean V Kelley
2020-08-26 16:20 ` Kuppuswamy, Sathyanarayanan
2020-08-26 18:37 ` sean.v.kelley
2020-08-04 19:40 ` [PATCH V2 4/9] PCI/AER: Extend AER error handling to RCECs Sean V Kelley
2020-08-07 22:53 ` Bjorn Helgaas
2020-08-08 0:55 ` Sean V Kelley
2020-08-10 9:32 ` Jonathan Cameron
2020-08-17 22:24 ` Bjorn Helgaas
2020-08-18 9:01 ` Jonathan Cameron
2020-08-04 19:40 ` [PATCH V2 5/9] PCI/AER: Apply function level reset to RCiEP on fatal error Sean V Kelley
2020-08-04 19:40 ` [PATCH V2 6/9] PCI: Add 'rcec' field to pci_dev for associated RCiEPs Sean V Kelley
2020-08-05 17:40 ` Jonathan Cameron
2020-08-05 17:48 ` Sean V Kelley
2020-08-04 19:40 ` [PATCH V2 7/9] PCI/AER: Add RCEC AER handling Sean V Kelley
2020-08-05 17:49 ` Jonathan Cameron
2020-08-04 19:40 ` [PATCH V2 8/9] PCI/PME: Add RCEC PME handling Sean V Kelley
2020-08-05 17:51 ` Jonathan Cameron
2020-08-04 19:40 ` [PATCH V2 9/9] PCI/AER: Add RCEC AER error injection support Sean V Kelley
2020-08-05 17:54 ` Jonathan Cameron
2020-08-05 18:09 ` Sean V Kelley
2020-08-05 18:00 ` [PATCH V2 0/9] Add RCEC handling to PCI/AER Bjorn Helgaas
2020-08-05 18:12 ` Sean V Kelley
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