From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937351AbcJ0QrA (ORCPT ); Thu, 27 Oct 2016 12:47:00 -0400 Received: from mga04.intel.com ([192.55.52.120]:28075 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753982AbcJ0Qq6 (ORCPT ); Thu, 27 Oct 2016 12:46:58 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,553,1473145200"; d="scan'208";a="778643324" From: "Andrejczuk, Grzegorz" To: Borislav Petkov CC: "tglx@linutronix.de" , "mingo@redhat.com" , "hpa@zytor.com" , "x86@kernel.org" , "dave.hansen@linux.intel.com" , "Daniluk, Lukasz" , "Cownie, James H" , "Pan, Jacob jun" , "Luc, Piotr" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH v6: 4/4] x86/cpufeature: Add R3MWAIT to CPU features Thread-Topic: [PATCH v6: 4/4] x86/cpufeature: Add R3MWAIT to CPU features Thread-Index: AQHSMFrK58E75VYOiUq7FjXvRRIRNaC8S8qAgAA10OA= Date: Thu, 27 Oct 2016 16:46:54 +0000 Message-ID: References: <1477576923-3244-1-git-send-email-grzegorz.andrejczuk@intel.com> <1477576923-3244-5-git-send-email-grzegorz.andrejczuk@intel.com> <20161027143015.friq4ji5wahr2cyu@pd.tnic> In-Reply-To: <20161027143015.friq4ji5wahr2cyu@pd.tnic> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.182] Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id u9RGmXvv009100 > On Thu, Oct 27, 2016 at 04:02:03PM +0200, Grzegorz Andrejczuk wrote: > > Add cpu feature for ring 3 monitor/mwait. > > Set HWCAP2 1st bit during init. > > > > Signed-off-by: Grzegorz Andrejczuk > > --- > > arch/x86/include/asm/cpufeatures.h | 2 ++ > > arch/x86/kernel/cpu/intel.c | 4 ++++ > > 2 files changed, 6 insertions(+) > > > > diff --git a/arch/x86/include/asm/cpufeatures.h > > b/arch/x86/include/asm/cpufeatures.h > > index 92a8308..d430200 100644 > > --- a/arch/x86/include/asm/cpufeatures.h > > +++ b/arch/x86/include/asm/cpufeatures.h > > @@ -71,6 +71,8 @@ > > #define X86_FEATURE_RECOVERY ( 2*32+ 0) /* CPU in recovery mode */ > > #define X86_FEATURE_LONGRUN ( 2*32+ 1) /* Longrun power control */ > > #define X86_FEATURE_LRTI ( 2*32+ 3) /* LongRun table interface */ > > +/* Xeon Phi x200 ring 3 MONITOR/MWAIT enabled */ > > +#define X86_FEATURE_PHIR3MWAIT ( 2*32+ 4) > > This leaf is for Transmeta CPUs: > > /* Transmeta-defined CPU features, CPUID level 0x80860001, word 2 */ > > is KNL close to some Transmeta design, per chance or so? > > I mean, for this to work, it would have to implement CPUID leaf 0x80860001... > I was reusing Word 3 as you suggested in patch rev. 1. There was idea to use init_scattered_cpuid_features. What is good place for this feature?