From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754971AbcIAOUY convert rfc822-to-8bit (ORCPT ); Thu, 1 Sep 2016 10:20:24 -0400 Received: from mga07.intel.com ([134.134.136.100]:26949 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753490AbcIAOUV (ORCPT ); Thu, 1 Sep 2016 10:20:21 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,267,1470726000"; d="scan'208";a="1044435495" From: "Li, Liang Z" To: Bandan Das , "kvm@vger.kernel.org" CC: "pbonzini@redhat.com" , "guangrong.xiao@linux.intel.com" , "kernellwp@gmail.com" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH v2 1/5] mmu: extend the is_present check to 32 bits Thread-Topic: [PATCH v2 1/5] mmu: extend the is_present check to 32 bits Thread-Index: AQHR3I1XCDMRXzpqJE+p9yOxZyl/N6Bk/CHg Date: Thu, 1 Sep 2016 14:20:05 +0000 Message-ID: References: <1468361932-16580-1-git-send-email-bsd@redhat.com> <1468361932-16580-2-git-send-email-bsd@redhat.com> In-Reply-To: <1468361932-16580-2-git-send-email-bsd@redhat.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiY2U5OWViZDktOGM5MS00N2I2LTkzZWQtYTI0ZDMzZjVhM2UzIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IkVHZGZYY2N5elU5UHZXbEl0NnZnQzNMTGpxaFA0NE00WFJUQWRZYVlGMUE9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Intel SDM doesn't describe whether the A bit will be set or not when CPU accesses a no present EPT page table entry? even this patch works for the current CPU, it's not good to make such an assumption. Should we revert it? Thanks! Liang > -----Original Message----- > From: kvm-owner@vger.kernel.org [mailto:kvm-owner@vger.kernel.org] > On Behalf Of Bandan Das > Sent: Wednesday, July 13, 2016 6:19 AM > To: kvm@vger.kernel.org > Cc: pbonzini@redhat.com; guangrong.xiao@linux.intel.com; > kernellwp@gmail.com; linux-kernel@vger.kernel.org > Subject: [PATCH v2 1/5] mmu: extend the is_present check to 32 bits > > This is safe because this function is called on host controlled page table and > non-present/non-MMIO sptes never use bits 1..31. For the EPT case, this > ensures that cases where only the execute bit is set is marked valid. > > Signed-off-by: Bandan Das > --- > arch/x86/kvm/mmu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index > def97b3..87b62dc 100644 > --- a/arch/x86/kvm/mmu.c > +++ b/arch/x86/kvm/mmu.c > @@ -304,7 +304,7 @@ static int is_nx(struct kvm_vcpu *vcpu) > > static int is_shadow_present_pte(u64 pte) { > - return pte & PT_PRESENT_MASK && !is_mmio_spte(pte); > + return (pte & 0xFFFFFFFFull) && !is_mmio_spte(pte); > } > > static int is_large_pte(u64 pte) > -- > 2.5.5 > > -- > To unsubscribe from this list: send the line "unsubscribe kvm" in the body of > a message to majordomo@vger.kernel.org More majordomo info at > http://vger.kernel.org/majordomo-info.html