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[117.20.69.228]) by smtp.gmail.com with ESMTPSA id m18sm15968802pjq.32.2021.08.08.15.18.31 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sun, 08 Aug 2021 15:18:33 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 14.0 \(3654.100.0.2.22\)) Subject: Re: [PATCH] net: phy: micrel: Fix detection of ksz87xx switch From: Steve Bennett In-Reply-To: <20210807000123.GA4898@cephalopod> Date: Mon, 9 Aug 2021 08:18:28 +1000 Cc: Jakub Kicinski , netdev@vger.kernel.org, linux-kernel@vger.kernel.org X-Workware-Check: steveb@workware.net.au Content-Transfer-Encoding: quoted-printable Message-Id: References: <20210730105120.93743-1-steveb@workware.net.au> <20210730095936.1420b930@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> <74BE3A85-61E2-45C9-BA77-242B1014A820@workware.net.au> <20210807000123.GA4898@cephalopod> To: Ben Hutchings X-Mailer: Apple Mail (2.3654.100.0.2.22) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On 7 Aug 2021, at 10:01 am, Ben Hutchings = wrote: >=20 > On Sat, Jul 31, 2021 at 08:19:17AM +1000, Steve Bennett wrote: >>> On 31 Jul 2021, at 2:59 am, Jakub Kicinski wrote: >>>=20 >>> Please extend the CC list to the maintainers, and people who >>> worked on this driver in the past, especially Marek. >>=20 >> Sure, I can do that in a v2 of the patch along with the more detailed >> explanation below. >>=20 >>>=20 >>> On Fri, 30 Jul 2021 20:51:20 +1000 Steve Bennett wrote: >>>> The previous logic was wrong such that the ksz87xx >>>> switch was not identified correctly. >>>=20 >>> Any more details of what is happening? Which extact device do you = see >>> this problem on? >>=20 >> I have a ksz8795 switch. >>=20 >> Without the patch: >>=20 >> ksz8795-switch spi3.1 ade1 (uninitialized): PHY [dsa-0.1:03] driver = [Generic PHY] >> ksz8795-switch spi3.1 ade2 (uninitialized): PHY [dsa-0.1:04] driver = [Generic PHY] >>=20 >> With the patch: >>=20 >> ksz8795-switch spi3.1 ade1 (uninitialized): PHY [dsa-0.1:03] driver = [Micrel KSZ87XX Switch] >> ksz8795-switch spi3.1 ade2 (uninitialized): PHY [dsa-0.1:04] driver = [Micrel KSZ87XX Switch] > [...] >=20 > And do the external ports work for you after this? >=20 > I have a development board with a KSZ8795. All ports worked before > this patch. After this patch, when I bring up the external ports they > are reported as having link up at 10M half duplex, when the link is > actually down. >=20 > The ksz8873mll_read_status() function is trying to read a non-standard > MDIO register that is not handled by the ksz8795 driver's MDIO > emulation (and is not documented as existing on the KSZ8873MLL, > either!). It also also reports link up, which is obviously not > correct for an external port. >=20 > I'll post a patch as a reply to this. >=20 > Ben. Thanks Ben, That looks reasonable to me. My board is running the external ports at = 10HD so I didn't pick this up, but your patch looks correct. Cheers, Steve=