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From: Neal Liu <neal_liu@aspeedtech.com>
To: Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S . Miller" <davem@davemloft.net>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
	Johnny Huang <johnny_huang@aspeedtech.com>
Cc: "linux-aspeed@lists.ozlabs.org" <linux-aspeed@lists.ozlabs.org>,
	"linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 1/5] crypto: aspeed: Add HACE hash driver
Date: Thu, 2 Jun 2022 06:34:39 +0000	[thread overview]
Message-ID: <HK0PR06MB320268D5DCFB8FF3B4D8EB5E80DE9@HK0PR06MB3202.apcprd06.prod.outlook.com> (raw)
In-Reply-To: <dd525d8b-3cb3-e843-4a79-64f50c0fe8a7@wanadoo.fr>

> Hi,
> 
> Le 01/06/2022 à 07:42, Neal Liu a écrit :
> > Hash and Crypto Engine (HACE) is designed to accelerate the throughput
> > of hash data digest, encryption, and decryption.
> >
> > Basically, HACE can be divided into two independently engines
> > - Hash Engine and Crypto Engine. This patch aims to add HACE hash
> > engine driver for hash accelerator.
> >
> > Signed-off-by: Neal Liu <neal_liu@aspeedtech.com>
> > Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com>
> > ---
> >   MAINTAINERS                              |    7 +
> >   drivers/crypto/Kconfig                   |    1 +
> >   drivers/crypto/Makefile                  |    1 +
> >   drivers/crypto/aspeed/Kconfig            |   22 +
> >   drivers/crypto/aspeed/Makefile           |    6 +
> >   drivers/crypto/aspeed/aspeed-hace-hash.c | 1335
> ++++++++++++++++++++++
> >   drivers/crypto/aspeed/aspeed-hace.c      |  210 ++++
> >   drivers/crypto/aspeed/aspeed-hace.h      |  179 +++
> >   8 files changed, 1761 insertions(+)
> >   create mode 100644 drivers/crypto/aspeed/Kconfig
> >   create mode 100644 drivers/crypto/aspeed/Makefile
> >   create mode 100644 drivers/crypto/aspeed/aspeed-hace-hash.c
> >   create mode 100644 drivers/crypto/aspeed/aspeed-hace.c
> >   create mode 100644 drivers/crypto/aspeed/aspeed-hace.h
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS index
> > e8c52d0192a6..c020e0893eed 100644
> 
> [...]
> 
> > +int aspeed_register_hace_hash_algs(struct aspeed_hace_dev *hace_dev)
> > +{
> > +	int rc, i;
> > +
> > +	AHASH_DBG(hace_dev, "\n");
> > +
> > +	for (i = 0; i < ARRAY_SIZE(aspeed_ahash_algs); i++) {
> > +		aspeed_ahash_algs[i].hace_dev = hace_dev;
> > +		rc = crypto_register_ahash(&aspeed_ahash_algs[i].alg.ahash);
> > +		if (rc)
> > +			return rc;
> > +	}
> > +
> > +	if (hace_dev->version != AST2600_VERSION)
> > +		return 0;
> > +
> > +	for (i = 0; i < ARRAY_SIZE(aspeed_ahash_algs_g6); i++) {
> > +		aspeed_ahash_algs_g6[i].hace_dev = hace_dev;
> > +		rc = crypto_register_ahash(&aspeed_ahash_algs_g6[i].alg.ahash);
> > +		if (rc)
> > +			return rc;
> > +	}
> > +
> > +	return 0;
> 
> Should there be some kind of error handling here, in order to undo things
> already done if an error occures?
> 

No need. .remove function would do the error handling stuffs.

> 
> > +}
> > diff --git a/drivers/crypto/aspeed/aspeed-hace.c
> b/drivers/crypto/aspeed/aspeed-hace.c
> > new file mode 100644
> > index 000000000000..f25b13d120e8
> > --- /dev/null
> > +++ b/drivers/crypto/aspeed/aspeed-hace.c
> 
> [...]
> 
> > +static int aspeed_hace_probe(struct platform_device *pdev)
> > +{
> > +	const struct of_device_id *hace_dev_id;
> > +	struct aspeed_engine_hash *hash_engine;
> > +	struct aspeed_hace_dev *hace_dev;
> > +	struct resource *res;
> > +	int rc;
> > +
> > +	hace_dev = devm_kzalloc(&pdev->dev, sizeof(struct aspeed_hace_dev),
> > +				GFP_KERNEL);
> > +	if (!hace_dev)
> > +		return -ENOMEM;
> > +
> > +	hace_dev_id = of_match_device(aspeed_hace_of_matches, &pdev->dev);
> > +	if (!hace_dev_id) {
> > +		dev_err(&pdev->dev, "Failed to match hace dev id\n");
> > +		return -EINVAL;
> > +	}
> > +
> > +	hace_dev->dev = &pdev->dev;
> > +	hace_dev->version = (unsigned long)hace_dev_id->data;
> > +	hash_engine = &hace_dev->hash_engine;
> > +
> > +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +
> > +	platform_set_drvdata(pdev, hace_dev);
> > +
> > +	spin_lock_init(&hash_engine->lock);
> > +	tasklet_init(&hash_engine->done_task, aspeed_hace_hash_done_task,
> > +		     (unsigned long)hace_dev);
> > +	tasklet_init(&hash_engine->queue_task, aspeed_hace_hash_queue_task,
> > +		     (unsigned long)hace_dev);
> > +	crypto_init_queue(&hash_engine->queue,
> ASPEED_HASH_QUEUE_LENGTH);
> > +
> > +	hace_dev->regs = devm_ioremap_resource(&pdev->dev, res);
> > +	if (!hace_dev->regs) {
> > +		dev_err(&pdev->dev, "Failed to map resources\n");
> > +		return -ENOMEM;
> > +	}
> > +
> > +	hace_dev->irq = platform_get_irq(pdev, 0);
> > +	if (!hace_dev->irq) {
> > +		dev_err(&pdev->dev, "Failed to get interrupt\n");
> > +		return -ENXIO;
> > +	}
> > +
> > +	rc = devm_request_irq(&pdev->dev, hace_dev->irq, aspeed_hace_irq, 0,
> > +			      dev_name(&pdev->dev), hace_dev);
> > +	if (rc) {
> > +		dev_err(&pdev->dev, "Failed to request interrupt\n");
> > +		return rc;
> > +	}
> > +
> > +	hace_dev->yclk = devm_clk_get(&pdev->dev, "yclk");
> > +	if (IS_ERR(hace_dev->yclk)) {
> > +		dev_err(&pdev->dev, "Failed to get yclk\n");
> > +		return -ENODEV;
> > +	}
> > +
> > +	rc = clk_prepare_enable(hace_dev->yclk);
> > +	if (rc) {
> > +		dev_err(&pdev->dev, "Failed to enable clock 0x%x\n", rc);
> > +		return rc;
> 
> This is not undone, neither if an error occures after it, nor in the
> .remove function.

You're correct. I'll add error handling in .remove function.
Thanks for your suggestion.

> 
> > +	}
> > +
> > +	hash_engine->ahash_src_addr =
> > +		dma_alloc_coherent(&pdev->dev,
> > +				   ASPEED_HASH_SRC_DMA_BUF_LEN,
> > +				   &hash_engine->ahash_src_dma_addr,
> > +				   GFP_KERNEL);
> > +	if (!hash_engine->ahash_src_addr) {
> > +		dev_err(&pdev->dev, "Failed to allocate dma buffer\n");
> > +		return -ENOMEM;
> > +	}
> 
> Same here, this si not undone in the .remove function.

Same here.

> 
> > +
> > +	rc = aspeed_hace_register(hace_dev);
> > +	if (rc) {
> > +		dev_err(&pdev->dev, "Failed to register hash alg, rc:0x%x\n", rc);
> 
> Is this really an error if finaly we continue and return 0 (success) at
> the end?

I assume if some alg register failed, some alg register pass, the driver still works fine.
So no need to fail driver probe.

> 
> > +		rc = 0;
> > +	}
> > +
> > +	dev_info(&pdev->dev, "ASPEED Crypto Accelerator successfully
> registered\n");
> > +
> > +	return rc;
> > +}
> > +
> > +static int aspeed_hace_remove(struct platform_device *pdev)
> > +{
> > +	struct aspeed_hace_dev *hace_dev = platform_get_drvdata(pdev);
> > +	struct aspeed_engine_hash *hash_engine = &hace_dev->hash_engine;
> > +
> > +	aspeed_hace_unregister(hace_dev);
> 
> Should this be done even if aspeed_hace_register() failed in the probe?

Crypto core would check if the alg is registered or not, so no need to check here.

> 
> Just my 2c,
> CJ
> 
> 
> > +
> > +	tasklet_kill(&hash_engine->done_task);
> > +	tasklet_kill(&hash_engine->queue_task);
> > +
> > +	return 0;
> > +}
> > +
> 
> [...]

  reply	other threads:[~2022-06-02  6:35 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-01  5:41 [PATCH 0/5] Add Aspeed crypto driver for hardware acceleration Neal Liu
2022-06-01  5:42 ` [PATCH 1/5] crypto: aspeed: Add HACE hash driver Neal Liu
2022-06-01  7:41   ` Corentin Labbe
2022-06-01  8:38     ` Neal Liu
2022-06-06  8:22       ` Corentin Labbe
2022-06-07  2:42         ` Neal Liu
2022-06-01 20:14   ` Christophe JAILLET
2022-06-02  6:34     ` Neal Liu [this message]
2022-06-01  5:42 ` [PATCH 2/5] dt-bindings: clock: Add AST2600 HACE reset definition Neal Liu
2022-06-01  7:45   ` Krzysztof Kozlowski
2022-06-01  7:56     ` Neal Liu
2022-06-01  5:42 ` [PATCH 3/5] ARM: dts: aspeed: Add HACE device controller node Neal Liu
2022-06-01  5:42 ` [PATCH 4/5] dt-bindings: crypto: add documentation for aspeed hace Neal Liu
2022-06-01  7:44   ` Krzysztof Kozlowski
2022-06-01  8:01     ` Neal Liu
2022-06-01  9:19       ` Krzysztof Kozlowski
2022-06-01  9:33         ` Neal Liu
2022-06-01  5:42 ` [PATCH 5/5] crypto: aspeed: add HACE crypto driver Neal Liu
2022-06-01 20:30   ` Christophe JAILLET
2022-06-02  6:53     ` Neal Liu
2022-06-08 19:33   ` Dhananjay Phadke
2022-06-13  1:48     ` Neal Liu

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