From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22C08C433FE for ; Sun, 7 Nov 2021 18:43:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ECBBB61357 for ; Sun, 7 Nov 2021 18:43:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236135AbhKGSqb convert rfc822-to-8bit (ORCPT ); Sun, 7 Nov 2021 13:46:31 -0500 Received: from aposti.net ([89.234.176.197]:49656 "EHLO aposti.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229713AbhKGSqa (ORCPT ); Sun, 7 Nov 2021 13:46:30 -0500 Date: Sun, 07 Nov 2021 18:43:33 +0000 From: Paul Cercueil Subject: Re: [PATCH 0/3] mtd: Ingenic NAND fix for JZ4740 To: "H. Nikolaus Schaller" Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Harvey Hunt , list@opendingux.net, linux-mtd@lists.infradead.org, linux-kernel , linux-mips , Riccardo Mottola , Discussions about the Letux Kernel , Paul Boddie Message-Id: In-Reply-To: <968356A9-2A88-48B1-B31F-55C22BCE620E@goldelico.com> References: <20211009184952.24591-1-paul@crapouillou.net> <968356A9-2A88-48B1-B31F-55C22BCE620E@goldelico.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Nikolaus, Le dim., nov. 7 2021 at 14:47:43 +0100, H. Nikolaus Schaller a écrit : > Hi Paul, > >> Am 09.10.2021 um 20:49 schrieb Paul Cercueil : >> >> Hi, >> >> Looks like NAND support has been broken on the JZ4740 SoC for a >> while; > > Yes, I remember someone telling that something was fundamentally > broken > and impossible to be fixed a while ago. You mean MLC NAND, and that's still broken. >> it looks like it comes from the fact that the "hw_oob_first" >> mechanism >> was dropped from the NAND core and moved to the Davinci driver. >> >> It turns out the JZ4740 SoC needs it too; I didn't notice it when >> writing the new ingenic-nand driver (to replace the old jz4740-nand >> driver) most likely because my Device Tree had the "nand-ecc-mode" >> set >> to "hw_oob_first". >> >> I am not very sure about patch [1/3]; to me the original code does >> not >> make sense, and it didn't work out-of-the-box on the JZ4740 without >> it. >> By applying patch [1/3] the function >> nand_read_page_hwecc_oob_first() >> can be reused for the JZ4740 SoC as well. But I did not test patch >> [1/3] >> on Davinci. > > would this also work for jz4780 NAND? The JZ4780 NAND driver does work, but UBI refuses to use the CI20's NAND as it's a MLC. -Paul