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From: Paul Burton <paul.burton@mips.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: Ralf Baechle <ralf@linux-mips.org>,
	Paul Burton <pburton@wavecomp.com>,
	James Hogan <jhogan@kernel.org>, "od@zcrc.me" <od@zcrc.me>,
	"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Paul Cercueil <paul@crapouillou.net>,
	"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>
Subject: Re: [PATCH 1/2] MIPS: Rename JZRISC to XBURST
Date: Mon, 22 Jul 2019 21:13:46 +0000	[thread overview]
Message-ID: <MWHPR2201MB12777764E50A96AAA1A5A048C1C40@MWHPR2201MB1277.namprd22.prod.outlook.com> (raw)
In-Reply-To: <20190507224357.23778-1-paul@crapouillou.net>

Hello,

Paul Cercueil wrote:
> The real name of the CPU present in the JZ line of SoCs from Ingenic is
> XBurst, not JZRISC.
> 
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>

Series applied to mips-next.

Thanks,
    Paul

[ This message was auto-generated; if you believe anything is incorrect
  then please email paul.burton@mips.com to report it. ]

  parent reply	other threads:[~2019-07-22 21:13 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-07 22:43 Paul Cercueil
2019-05-07 22:43 ` [PATCH 2/2] MIPS: Decode config3 register on Ingenic SoCs Paul Cercueil
2019-07-22 21:21   ` Paul Burton
2019-07-22 21:13 ` Paul Burton [this message]
2019-10-24  9:28 MIPS: Ingenic: Disable abandoned HPTLB function Zhou Yanjie
2019-10-24  9:29 ` [PATCH 1/2] MIPS: Rename JZRISC to XBurst Zhou Yanjie

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