From: Ingo Molnar <mingo@elte.hu>
To: "David S. Miller" <davem@redhat.com>
Cc: torvalds@transmeta.com, <linux-kernel@vger.kernel.org>,
<linux-mm@kvack.org>
Subject: Re: [patch, feature] nonlinear mappings, prefaulting support, 2.5.42-F8
Date: Mon, 14 Oct 2002 15:30:42 +0200 (CEST) [thread overview]
Message-ID: <Pine.LNX.4.44.0210141525250.21947-100000@localhost.localdomain> (raw)
In-Reply-To: <20021014.054500.89132620.davem@redhat.com>
On Mon, 14 Oct 2002, David S. Miller wrote:
> We created the range tlb flushes so that architectures have a chance of
> optimizing such operations when possible.
yeah, agreed, we can change it to do the mmu_gather_t thing, and to
optimize that on x86 as well. Nevertheless the fact remains that cache
users were pretty much forced to use a multipage cache unit, which caused
all userspace TLBs to be flushed on x86. Where to draw the line between a
loop of INVLPG and a CR3 flush on x86 is up in the air - i'd say it's at
roughly 8 pages currently, while the x86 TLB flush code only optimizes the
single-page flushes. So you are right that this issue should be separated
from nonlinear mappings.
Ingo
next prev parent reply other threads:[~2002-10-14 13:12 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-10-14 12:38 [patch, feature] nonlinear mappings, prefaulting support, 2.5.42-F8 Ingo Molnar
2002-10-14 12:45 ` David S. Miller
2002-10-14 13:30 ` Ingo Molnar [this message]
2002-10-14 13:18 ` David S. Miller
2002-10-14 13:52 ` William Lee Irwin III
2002-10-14 15:02 ` Ingo Molnar
2002-10-14 15:15 ` Ingo Molnar
2002-10-14 15:20 ` William Lee Irwin III
2002-10-14 15:52 ` Ingo Molnar
2002-10-14 16:02 ` Ingo Molnar
2002-10-14 21:02 ` William Lee Irwin III
2002-10-14 21:20 ` William Lee Irwin III
2002-10-14 21:25 ` William Lee Irwin III
2002-10-14 20:27 ` Andrew Morton
2002-10-15 1:18 ` Jamie Lokier
2002-10-15 6:48 ` Linus Torvalds
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