Regression causes a hang on boot with a Comtrol PCI card

Regression causes a hang on boot with a Comtrol PCI card

[Jesse Hathaway]

Two regressions cause Linux to hang on boot when a Comtrol PCI card is present.

If I revert the following two commits, I can boot again and the card operates
without issue:

1302fcf0d03e (refs/bisect/bad) PCI: Configure *all* devices, not just
hot-added ones
1c3c5eab1715 sched/core: Enable might_sleep() and smp_processor_id()
checks early

; lspci -vs 82:00.0
82:00.0 Multiport serial controller: Comtrol Corporation Device 0061
        Subsystem: Comtrol Corporation Device 0061
        Flags: 66MHz, medium devsel, IRQ 35, NUMA node 1
        Memory at c8004000 (32-bit, non-prefetchable) [size=4K]
        Memory at c8000000 (32-bit, non-prefetchable) [size=16K]
        Capabilities: [40] Hot-plug capable
        Capabilities: [48] Power Management version 2
        Kernel driver in use: rp2
        Kernel modules: rp2

Is it possible that the problem is that the card claims to support Hot-plug,
but does not?

I would love to help fix this issue, please let me know what other information
would be helpful to provide.

; awk -f scripts/ver_linux
If some fields are empty or look unusual you may have an old version.
Compare to the current minimal requirements in Documentation/Changes.

Linux tty01 5.0.1-amd64 #1 SMP Wed Mar 13 15:43:44 UTC 2019 x86_64 GNU/Linux

GNU C                   6.3.0
GNU Make                4.1
Binutils                2.28
Util-linux              2.29.2
Mount                   2.29.2
Linux C Library         2.24
Dynamic linker (ldd)    2.24
Procps                  3.3.12
Sh-utils                8.26
Udev                    232
Modules Loaded          8021q acpi_power_meter aesni_intel aes_x86_64
ahci autofs4 bonding button coretemp crc16 crc32c_generic crc32c_intel
crc32_pclmul crct10dif_pclmul cryptd crypto_simd dca dcdbas dm_mod drm
drm_kms_helper ehci_hcd ehci_pci evdev ext4 fscrypto garp
ghash_clmulni_intel glue_helper i2c_algo_bit igb intel_cstate
intel_powerclamp intel_rapl intel_rapl_perf intel_uncore ioatdma
ipmi_devintf ipmi_msghandler ipmi_si iptable_filter ip_tables
irqbypass iTCO_vendor_support iTCO_wdt ixgbe jbd2 kvm kvm_intel
libahci libata libcrc32c libphy llc lpc_ich mbcache mdio megaraid_sas
mei mei_me mgag200 mrp mxm_wmi nf_conntrack nf_defrag_ipv4
nf_defrag_ipv6 pcc_cpufreq pcspkr rp2 sb_edac scsi_mod sd_mod sg snd
snd_pcm snd_timer soundcore stp ttm usbcore wmi x86_pkg_temp_thermal
xfrm_algo x_tables xt_conntrack xt_tcpudp

Re: Regression causes a hang on boot with a Comtrol PCI card

[Bjorn Helgaas]

Hi Jesse,

On Wed, Mar 13, 2019 at 11:50:07AM -0500, Jesse Hathaway wrote:
> Two regressions cause Linux to hang on boot when a Comtrol PCI card
> is present.
> 
> If I revert the following two commits, I can boot again and the card
> operates without issue:
> 
> 1302fcf0d03e (refs/bisect/bad) PCI: Configure *all* devices, not just
> hot-added ones
> 1c3c5eab1715 sched/core: Enable might_sleep() and smp_processor_id()
> checks early

I'm very sorry about the regression, but thank you very much for
narrowing it down and reporting it!

How did you narrow it down to *two* commits, and do you have to revert
both of them to avoid the hang?  Usually a bisection identifies a
single commit, and the two you mention aren't related.

> ; lspci -vs 82:00.0
> 82:00.0 Multiport serial controller: Comtrol Corporation Device 0061
>         Subsystem: Comtrol Corporation Device 0061
>         Flags: 66MHz, medium devsel, IRQ 35, NUMA node 1
>         Memory at c8004000 (32-bit, non-prefetchable) [size=4K]
>         Memory at c8000000 (32-bit, non-prefetchable) [size=16K]
>         Capabilities: [40] Hot-plug capable
>         Capabilities: [48] Power Management version 2
>         Kernel driver in use: rp2
>         Kernel modules: rp2
> 
> Is it possible that the problem is that the card claims to support
> Hot-plug, but does not?
> 
> I would love to help fix this issue, please let me know what other
> information would be helpful to provide.

Can you collect a complete dmesg log (with a working kernel) and
output of "sudo lspci -vvxxx"?  You can open a bug report at
https://bugzilla.kernel.org, attach the logs there, and respond here
with the URL.

Where does the hang happen?  Is it when we configure the Comtrol card?

Bjorn

Re: Regression causes a hang on boot with a Comtrol PCI card

[Jesse Hathaway]

> > 1302fcf0d03e (refs/bisect/bad) PCI: Configure *all* devices, not just
> > hot-added ones
> > 1c3c5eab1715 sched/core: Enable might_sleep() and smp_processor_id()
> > checks early
>
> How did you narrow it down to *two* commits, and do you have to revert
> both of them to avoid the hang?  Usually a bisection identifies a
> single commit, and the two you mention aren't related.

Sorry I should have been more verbose in what the bisection process was, I
found the problem after attempting to upgrade from linux v3.16 to v4.9. When
v4.9 hung I tried the latest kernel, v5.0, which also hanged. I began a git
bisect, but found there was more than one bad commit. Here is my current
understanding:

- [x] v3.18 vanilla, 1302fcf0d03e committed, hangs
- [x] v3.18 with revert of 1302fcf0d03e, works
.
.
.
- [x] v4.12 vanilla, hangs
- [x] v4.12 with revert of 1302fcf0d03e, works

- [x] v4.13 vanilla, 1c3c5eab1715 committed, hangs
- [x] v4.13 with revert of 1302fcf0d03e, hangs
- [x] v4.13 with revert of 1c3c5eab1715, hangs
- [x] v4.13 with revert of 1302fcf0d03e & 1c3c5eab1715, works

- [x] v5.0 vanilla, hangs
- [x] v5.0 with revert of 1302fcf0d03e & 1c3c5eab1715, works

> Can you collect a complete dmesg log (with a working kernel) and
> output of "sudo lspci -vvxxx"?  You can open a bug report at
> https://bugzilla.kernel.org, attach the logs there, and respond here
> with the URL.

Bug submitted along with the requested logs,
https://bugzilla.kernel.org/show_bug.cgi?id=202927

> Where does the hang happen?  Is it when we configure the Comtrol card?

Hang occurs after PCI is initialized, snippet below, I have included the full
output in the bug report:

[   10.561971] pci 0000:81:00.0:   bridge window [mem 0xc8000000-0xc80fffff]
[   10.569661] pci 0000:80:01.0: PCI bridge to [bus 81-82]
[   10.575594] pci 0000:80:01.0:   bridge window [mem 0xc8000000-0xc80fffff]
[   10.583278] pci 0000:80:03.0: PCI bridge to [bus 83]
[   10.589008] NET: Registered protocol family 2
[   10.594254] tcp_listen_portaddr_hash hash table entries: 65536
(order: 8, 1048576 bytes)
[   10.603671] TCP established hash table entries: 524288 (order: 10,
4194304 bytes)
[   10.612729] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
[   10.620446] TCP: Hash tables configured (established 524288 bind 65536)
[   10.628124] UDP hash table entries: 65536 (order: 9, 2097152 bytes)
[   10.635541] UDP-Lite hash table entries: 65536 (order: 9, 2097152 bytes)
[   10.643669] NET: Registered protocol family 1

Please let me know if there is anything else I can provide, I am also happy to
test any patches, Jesse Hathaway

Re: Regression causes a hang on boot with a Comtrol PCI card

[Bjorn Helgaas]

On Thu, Mar 14, 2019 at 03:57:07PM -0500, Jesse Hathaway wrote:
> > > 1302fcf0d03e (refs/bisect/bad) PCI: Configure *all* devices, not just
> > > hot-added ones
> > > 1c3c5eab1715 sched/core: Enable might_sleep() and smp_processor_id()
> > > checks early
> >
> > How did you narrow it down to *two* commits, and do you have to revert
> > both of them to avoid the hang?  Usually a bisection identifies a
> > single commit, and the two you mention aren't related.
> 
> Sorry I should have been more verbose in what the bisection process was, I
> found the problem after attempting to upgrade from linux v3.16 to v4.9. When
> v4.9 hung I tried the latest kernel, v5.0, which also hanged. I began a git
> bisect, but found there was more than one bad commit. Here is my current
> understanding:
> 
> - [x] v3.18 vanilla, 1302fcf0d03e committed, hangs
> - [x] v3.18 with revert of 1302fcf0d03e, works
> .
> .
> .
> - [x] v4.12 vanilla, hangs
> - [x] v4.12 with revert of 1302fcf0d03e, works
> 
> - [x] v4.13 vanilla, 1c3c5eab1715 committed, hangs
> - [x] v4.13 with revert of 1302fcf0d03e, hangs
> - [x] v4.13 with revert of 1c3c5eab1715, hangs
> - [x] v4.13 with revert of 1302fcf0d03e & 1c3c5eab1715, works
> 
> - [x] v5.0 vanilla, hangs
> - [x] v5.0 with revert of 1302fcf0d03e & 1c3c5eab1715, works

Thanks!  I doubt either of those commits is the real problem, but
they're both related to system_state, so it's conceivable they're both
involved in exposing the problem.

> > Can you collect a complete dmesg log (with a working kernel) and
> > output of "sudo lspci -vvxxx"?  You can open a bug report at
> > https://bugzilla.kernel.org, attach the logs there, and respond here
> > with the URL.
> 
> Bug submitted along with the requested logs,
> https://bugzilla.kernel.org/show_bug.cgi?id=202927

Thanks for that.

> > Where does the hang happen?  Is it when we configure the Comtrol card?
> 
> Hang occurs after PCI is initialized, snippet below, I have included the full
> output in the bug report:
> 
> [   10.561971] pci 0000:81:00.0:   bridge window [mem 0xc8000000-0xc80fffff]
> [   10.569661] pci 0000:80:01.0: PCI bridge to [bus 81-82]
> [   10.575594] pci 0000:80:01.0:   bridge window [mem 0xc8000000-0xc80fffff]
> [   10.583278] pci 0000:80:03.0: PCI bridge to [bus 83]
> [   10.589008] NET: Registered protocol family 2
> [   10.594254] tcp_listen_portaddr_hash hash table entries: 65536
> (order: 8, 1048576 bytes)
> [   10.603671] TCP established hash table entries: 524288 (order: 10,
> 4194304 bytes)
> [   10.612729] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
> [   10.620446] TCP: Hash tables configured (established 524288 bind 65536)
> [   10.628124] UDP hash table entries: 65536 (order: 9, 2097152 bytes)
> [   10.635541] UDP-Lite hash table entries: 65536 (order: 9, 2097152 bytes)
> [   10.643669] NET: Registered protocol family 1

The successful boot continues on with this:

  [   10.675996] pci 0000:00:1a.0: quirk_usb_early_handoff+0x0/0x6a0 took 22519 usecs
  [   10.684519] pci 0000:03:00.0: [Firmware Bug]: disabling VPD access (can't determine size of non-standard VPD for)
  [   10.696404] pci 0000:03:00.0: quirk_blacklist_vpd+0x0/0x30 took 11605 usecs
  [   10.704515] pci 0000:0b:00.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff]

So apparently the hang happens while we're running the "final" PCI
fixups.  This happens after all the rest of PCI is initialized.

Can you boot v5.0 vanilla with "initcall_debug"?  Maybe we can narrow
it down to a specific quirk.

Bjorn

Re: Regression causes a hang on boot with a Comtrol PCI card

[Jesse Hathaway]

> So apparently the hang happens while we're running the "final" PCI
> fixups.  This happens after all the rest of PCI is initialized.
>
> Can you boot v5.0 vanilla with "initcall_debug"?  Maybe we can narrow
> it down to a specific quirk.

yup, added the "initcall_debug" output to the ticket:
https://bugzilla.kernel.org/show_bug.cgi?id=202927, here is the tail end

[   14.896337] NET: Registered protocol family 1
[   14.901314] initcall af_unix_init+0x0/0x4e returned 0 after 4866 usecs
[   14.908694] calling  ipv6_offload_init+0x0/0x7f @ 1
[   14.914238] initcall ipv6_offload_init+0x0/0x7f returned 0 after 1 usecs
[   14.921821] calling  vlan_offload_init+0x0/0x20 @ 1
[   14.927365] initcall vlan_offload_init+0x0/0x20 returned 0 after 0 usecs
[   14.934948] calling  pci_apply_final_quirks+0x0/0x126 @ 1
[   14.941106] pci 0000:00:1a.0: calling  quirk_usb_early_handoff+0x0/0x6a0 @ 1

thanks, Jesse Hathaway

Re: Regression causes a hang on boot with a Comtrol PCI card

[Jesse Hathaway]

On Fri, Mar 22, 2019 at 3:02 PM Jesse Hathaway <jesse@mbuki-mvuki.org> wrote:
> > Can you boot v5.0 vanilla with "initcall_debug"?  Maybe we can narrow
> > it down to a specific quirk.
>
> yup, added the "initcall_debug" output to the ticket:
> https://bugzilla.kernel.org/show_bug.cgi?id=202927, here is the tail end
>
> [   14.896337] NET: Registered protocol family 1
> [   14.901314] initcall af_unix_init+0x0/0x4e returned 0 after 4866 usecs
> [   14.908694] calling  ipv6_offload_init+0x0/0x7f @ 1
> [   14.914238] initcall ipv6_offload_init+0x0/0x7f returned 0 after 1 usecs
> [   14.921821] calling  vlan_offload_init+0x0/0x20 @ 1
> [   14.927365] initcall vlan_offload_init+0x0/0x20 returned 0 after 0 usecs
> [   14.934948] calling  pci_apply_final_quirks+0x0/0x126 @ 1
> [   14.941106] pci 0000:00:1a.0: calling  quirk_usb_early_handoff+0x0/0x6a0 @ 1

Bjorn, did you get a chance to look at the initcall_debug output for anything
obvious to you on what might be the cause of the problem?

Thanks, Jesse Hathaway

Re: Regression causes a hang on boot with a Comtrol PCI card

[Bjorn Helgaas]

[+cc Mathias, Greg, Alan, linux-usb]

Beginning of thread: https://lore.kernel.org/linux-pci/CANSNSoWiKd98Dt1N2sSjP9Af8zk1NPV-=3P4VLtFs_cSQG4RUg@mail.gmail.com

Synopsis: v5.0 hangs at boot unless the following commits are reverted:

  1302fcf0d03e ("PCI: Configure *all* devices, not just hot-added ones")
  1c3c5eab1715 ("sched/core: Enable might_sleep() and smp_processor_id() checks early")

The hang appears to be in quirk_usb_early_handoff().  With
"initcall_debug", we see the call but not the completion:

On Fri, Mar 22, 2019 at 03:02:11PM -0500, Jesse Hathaway wrote:
> > So apparently the hang happens while we're running the "final" PCI
> > fixups.  This happens after all the rest of PCI is initialized.
> >
> > Can you boot v5.0 vanilla with "initcall_debug"?  Maybe we can narrow
> > it down to a specific quirk.
> 
> yup, added the "initcall_debug" output to the ticket:
> https://bugzilla.kernel.org/show_bug.cgi?id=202927, here is the tail end
> 
> [   14.896337] NET: Registered protocol family 1
> [   14.901314] initcall af_unix_init+0x0/0x4e returned 0 after 4866 usecs
> [   14.908694] calling  ipv6_offload_init+0x0/0x7f @ 1
> [   14.914238] initcall ipv6_offload_init+0x0/0x7f returned 0 after 1 usecs
> [   14.921821] calling  vlan_offload_init+0x0/0x20 @ 1
> [   14.927365] initcall vlan_offload_init+0x0/0x20 returned 0 after 0 usecs
> [   14.934948] calling  pci_apply_final_quirks+0x0/0x126 @ 1
> [   14.941106] pci 0000:00:1a.0: calling  quirk_usb_early_handoff+0x0/0x6a0 @ 1
> 
> thanks, Jesse Hathaway

Re: Regression causes a hang on boot with a Comtrol PCI card

[Alan Stern]

On Mon, 1 Apr 2019, Bjorn Helgaas wrote:

> [+cc Mathias, Greg, Alan, linux-usb]
> 
> Beginning of thread: https://lore.kernel.org/linux-pci/CANSNSoWiKd98Dt1N2sSjP9Af8zk1NPV-=3P4VLtFs_cSQG4RUg@mail.gmail.com
> 
> Synopsis: v5.0 hangs at boot unless the following commits are reverted:
> 
>   1302fcf0d03e ("PCI: Configure *all* devices, not just hot-added ones")
>   1c3c5eab1715 ("sched/core: Enable might_sleep() and smp_processor_id() checks early")
> 
> The hang appears to be in quirk_usb_early_handoff().  With
> "initcall_debug", we see the call but not the completion:
> 
> On Fri, Mar 22, 2019 at 03:02:11PM -0500, Jesse Hathaway wrote:
> > > So apparently the hang happens while we're running the "final" PCI
> > > fixups.  This happens after all the rest of PCI is initialized.
> > >
> > > Can you boot v5.0 vanilla with "initcall_debug"?  Maybe we can narrow
> > > it down to a specific quirk.
> > 
> > yup, added the "initcall_debug" output to the ticket:
> > https://bugzilla.kernel.org/show_bug.cgi?id=202927, here is the tail end
> > 
> > [   14.896337] NET: Registered protocol family 1
> > [   14.901314] initcall af_unix_init+0x0/0x4e returned 0 after 4866 usecs
> > [   14.908694] calling  ipv6_offload_init+0x0/0x7f @ 1
> > [   14.914238] initcall ipv6_offload_init+0x0/0x7f returned 0 after 1 usecs
> > [   14.921821] calling  vlan_offload_init+0x0/0x20 @ 1
> > [   14.927365] initcall vlan_offload_init+0x0/0x20 returned 0 after 0 usecs
> > [   14.934948] calling  pci_apply_final_quirks+0x0/0x126 @ 1
> > [   14.941106] pci 0000:00:1a.0: calling  quirk_usb_early_handoff+0x0/0x6a0 @ 1
> > 
> > thanks, Jesse Hathaway

Most likely the problem occurs somewhere inside
quirk_usb_handoff_xhci().  Can Jesse add debugging statements to that
routine in order to pin down exactly where the problem lies?

Alan Stern

Re: Regression causes a hang on boot with a Comtrol PCI card

[Mathias Nyman]

On 2.4.2019 17.29, Alan Stern wrote:
> On Mon, 1 Apr 2019, Bjorn Helgaas wrote:
> 
>> [+cc Mathias, Greg, Alan, linux-usb]
>>
>> Beginning of thread: https://lore.kernel.org/linux-pci/CANSNSoWiKd98Dt1N2sSjP9Af8zk1NPV-=3P4VLtFs_cSQG4RUg@mail.gmail.com
>>
>> Synopsis: v5.0 hangs at boot unless the following commits are reverted:
>>
>>    1302fcf0d03e ("PCI: Configure *all* devices, not just hot-added ones")
>>    1c3c5eab1715 ("sched/core: Enable might_sleep() and smp_processor_id() checks early")
>>
>> The hang appears to be in quirk_usb_early_handoff().  With
>> "initcall_debug", we see the call but not the completion:
>>
>> On Fri, Mar 22, 2019 at 03:02:11PM -0500, Jesse Hathaway wrote:
>>>> So apparently the hang happens while we're running the "final" PCI
>>>> fixups.  This happens after all the rest of PCI is initialized.
>>>>
>>>> Can you boot v5.0 vanilla with "initcall_debug"?  Maybe we can narrow
>>>> it down to a specific quirk.
>>>
>>> yup, added the "initcall_debug" output to the ticket:
>>> https://bugzilla.kernel.org/show_bug.cgi?id=202927, here is the tail end
>>>
>>> [   14.896337] NET: Registered protocol family 1
>>> [   14.901314] initcall af_unix_init+0x0/0x4e returned 0 after 4866 usecs
>>> [   14.908694] calling  ipv6_offload_init+0x0/0x7f @ 1
>>> [   14.914238] initcall ipv6_offload_init+0x0/0x7f returned 0 after 1 usecs
>>> [   14.921821] calling  vlan_offload_init+0x0/0x20 @ 1
>>> [   14.927365] initcall vlan_offload_init+0x0/0x20 returned 0 after 0 usecs
>>> [   14.934948] calling  pci_apply_final_quirks+0x0/0x126 @ 1
>>> [   14.941106] pci 0000:00:1a.0: calling  quirk_usb_early_handoff+0x0/0x6a0 @ 1
>>>
>>> thanks, Jesse Hathaway
> 
> Most likely the problem occurs somewhere inside
> quirk_usb_handoff_xhci().  Can Jesse add debugging statements to that
> routine in order to pin down exactly where the problem lies?
> 
> Alan Stern
> 

lspci log from bugzilla shows 0000:00:1a.0 is a EHCI device,
so probably woth adding debugging to quirk_usb_disable_ehci() as well

00:1a.0 USB controller: Intel Corporation C610/X99 series chipset USB Enhanced Host Controller #2 (rev 05) (prog-if 20 [EHCI])

-Mathias

Re: Regression causes a hang on boot with a Comtrol PCI card

[Alan Stern]

On Tue, 2 Apr 2019, Mathias Nyman wrote:

> On 2.4.2019 17.29, Alan Stern wrote:
> > On Mon, 1 Apr 2019, Bjorn Helgaas wrote:
> > 
> >> [+cc Mathias, Greg, Alan, linux-usb]
> >>
> >> Beginning of thread: https://lore.kernel.org/linux-pci/CANSNSoWiKd98Dt1N2sSjP9Af8zk1NPV-=3P4VLtFs_cSQG4RUg@mail.gmail.com
> >>
> >> Synopsis: v5.0 hangs at boot unless the following commits are reverted:
> >>
> >>    1302fcf0d03e ("PCI: Configure *all* devices, not just hot-added ones")
> >>    1c3c5eab1715 ("sched/core: Enable might_sleep() and smp_processor_id() checks early")
> >>
> >> The hang appears to be in quirk_usb_early_handoff().  With
> >> "initcall_debug", we see the call but not the completion:
> >>
> >> On Fri, Mar 22, 2019 at 03:02:11PM -0500, Jesse Hathaway wrote:
> >>>> So apparently the hang happens while we're running the "final" PCI
> >>>> fixups.  This happens after all the rest of PCI is initialized.
> >>>>
> >>>> Can you boot v5.0 vanilla with "initcall_debug"?  Maybe we can narrow
> >>>> it down to a specific quirk.
> >>>
> >>> yup, added the "initcall_debug" output to the ticket:
> >>> https://bugzilla.kernel.org/show_bug.cgi?id=202927, here is the tail end
> >>>
> >>> [   14.896337] NET: Registered protocol family 1
> >>> [   14.901314] initcall af_unix_init+0x0/0x4e returned 0 after 4866 usecs
> >>> [   14.908694] calling  ipv6_offload_init+0x0/0x7f @ 1
> >>> [   14.914238] initcall ipv6_offload_init+0x0/0x7f returned 0 after 1 usecs
> >>> [   14.921821] calling  vlan_offload_init+0x0/0x20 @ 1
> >>> [   14.927365] initcall vlan_offload_init+0x0/0x20 returned 0 after 0 usecs
> >>> [   14.934948] calling  pci_apply_final_quirks+0x0/0x126 @ 1
> >>> [   14.941106] pci 0000:00:1a.0: calling  quirk_usb_early_handoff+0x0/0x6a0 @ 1
> >>>
> >>> thanks, Jesse Hathaway
> > 
> > Most likely the problem occurs somewhere inside
> > quirk_usb_handoff_xhci().  Can Jesse add debugging statements to that
> > routine in order to pin down exactly where the problem lies?
> > 
> > Alan Stern
> > 
> 
> lspci log from bugzilla shows 0000:00:1a.0 is a EHCI device,
> so probably woth adding debugging to quirk_usb_disable_ehci() as well
> 
> 00:1a.0 USB controller: Intel Corporation C610/X99 series chipset USB Enhanced Host Controller #2 (rev 05) (prog-if 20 [EHCI])

Oops!  Quite right, my mistake.  After all these years, I ought to
remember that Intel puts their motherboards' EHCI and UHCI controllers
at PCI addresses 00:1a and 00:1d.

Alan Stern

Re: Regression causes a hang on boot with a Comtrol PCI card

[Jesse Hathaway]

On Tue, Apr 2, 2019 at 9:29 AM Alan Stern <stern@rowland.harvard.edu> wrote:
> Most likely the problem occurs somewhere inside
> quirk_usb_handoff_xhci().  Can Jesse add debugging statements to that
> routine in order to pin down exactly where the problem lies?

Alan,

I added debug statements to quirk_usb_early_handoff, quirk_usb_disable_ehci &
ehci_bios_handoff. The box hangs right before calling:

pci_write_config_byte(pdev, offset + 3, 1);

which is in ehci_bios_handoff:

[   10.698240] DEBUG: Passed quirk_usb_early_handoff 1300
[   10.704271] DEBUG: Passed quirk_usb_early_handoff 1308
[   10.710206] DEBUG: Passed quirk_usb_disable_ehci 939
[   10.715949] DEBUG: Passed quirk_usb_disable_ehci 945
[   10.721685] DEBUG: Passed quirk_usb_disable_ehci 950
[   10.727423] DEBUG: Passed quirk_usb_disable_ehci 958
[   10.733160] DEBUG: Passed quirk_usb_disable_ehci 964
[   10.738897] DEBUG: Passed quirk_usb_disable_ehci 968
[   10.744633] DEBUG: Passed ehci_bios_handoff 849
[   10.749884] DEBUG: Passed ehci_bios_handoff 884

I have attached the debug output, and my modified pci-quirks.c file
to the bug report, let me know what else I can do to help.

Re: Regression causes a hang on boot with a Comtrol PCI card

[Alan Stern]

On Thu, 4 Apr 2019, Jesse Hathaway wrote:

> On Tue, Apr 2, 2019 at 9:29 AM Alan Stern <stern@rowland.harvard.edu> wrote:
> > Most likely the problem occurs somewhere inside
> > quirk_usb_handoff_xhci().  Can Jesse add debugging statements to that
> > routine in order to pin down exactly where the problem lies?
> 
> Alan,
> 
> I added debug statements to quirk_usb_early_handoff, quirk_usb_disable_ehci &
> ehci_bios_handoff. The box hangs right before calling:
> 
> pci_write_config_byte(pdev, offset + 3, 1);

Right _before_ that line?  Not _after_ it?

That's surprising because the two preceding lines of code are the 
condition of an "if" statement and a dev_dbg() call.  I don't see how 
either of them could cause a hang.

Maybe the hang is a delayed reaction to something happening somewhere
else.  But on the assumption that it isn't, you could try commenting 
out various parts of ehci_bios_handoff to see which ones make a 
difference.

> which is in ehci_bios_handoff:
> 
> [   10.698240] DEBUG: Passed quirk_usb_early_handoff 1300
> [   10.704271] DEBUG: Passed quirk_usb_early_handoff 1308
> [   10.710206] DEBUG: Passed quirk_usb_disable_ehci 939
> [   10.715949] DEBUG: Passed quirk_usb_disable_ehci 945
> [   10.721685] DEBUG: Passed quirk_usb_disable_ehci 950
> [   10.727423] DEBUG: Passed quirk_usb_disable_ehci 958
> [   10.733160] DEBUG: Passed quirk_usb_disable_ehci 964
> [   10.738897] DEBUG: Passed quirk_usb_disable_ehci 968
> [   10.744633] DEBUG: Passed ehci_bios_handoff 849
> [   10.749884] DEBUG: Passed ehci_bios_handoff 884
> 
> I have attached the debug output, and my modified pci-quirks.c file
> to the bug report, let me know what else I can do to help.

Nothing was attached.

Alan Stern

Re: Regression causes a hang on boot with a Comtrol PCI card

[Jesse Hathaway]

[-- Attachment #1: Type: text/plain, Size: 1745 bytes --]

On Thu, Apr 4, 2019 at 12:16 PM Alan Stern <stern@rowland.harvard.edu> wrote:
> > I added debug statements to quirk_usb_early_handoff, quirk_usb_disable_ehci &
> > ehci_bios_handoff. The box hangs right before calling:
> >
> > pci_write_config_byte(pdev, offset + 3, 1);
>
> Right _before_ that line?  Not _after_ it?

Sorry I should have been more precise, it hangs executing the above
pci_write_config_function. I get the debug printk immediately preceding
that line.

> That's surprising because the two preceding lines of code are the
> condition of an "if" statement and a dev_dbg() call.  I don't see how
> either of them could cause a hang.
>
> Maybe the hang is a delayed reaction to something happening somewhere
> else.  But on the assumption that it isn't, you could try commenting
> out various parts of ehci_bios_handoff to see which ones make a
> difference.

will do

> > which is in ehci_bios_handoff:
> >
> > [   10.698240] DEBUG: Passed quirk_usb_early_handoff 1300
> > [   10.704271] DEBUG: Passed quirk_usb_early_handoff 1308
> > [   10.710206] DEBUG: Passed quirk_usb_disable_ehci 939
> > [   10.715949] DEBUG: Passed quirk_usb_disable_ehci 945
> > [   10.721685] DEBUG: Passed quirk_usb_disable_ehci 950
> > [   10.727423] DEBUG: Passed quirk_usb_disable_ehci 958
> > [   10.733160] DEBUG: Passed quirk_usb_disable_ehci 964
> > [   10.738897] DEBUG: Passed quirk_usb_disable_ehci 968
> > [   10.744633] DEBUG: Passed ehci_bios_handoff 849
> > [   10.749884] DEBUG: Passed ehci_bios_handoff 884
> >
> > I have attached the debug output, and my modified pci-quirks.c file
> > to the bug report, let me know what else I can do to help.

sorry I attached them to the bug report, but I have attached them to this
email as well.

[-- Attachment #2: initcall_debug_printk.log --]
[-- Type: text/x-log, Size: 59645 bytes --]

Loading Linux 5.0.0-bt9-amd64 ...
Loading initial ramdisk ...
[    0.000000] Linux version 5.0.0-bt9-amd64 (root@41a966e12c40) (gcc version 6.3.0 20170516 (Debian 6.3.0-18+deb9u1)) #1 SMP Wed Apr 3 21:43:23 UTC 2019
[    0.000000] Command line: BOOT_IMAGE=/vmlinuz-5.0.0-bt9-amd64 root=/dev/mapper/vg0-root ro console=tty0 console=ttyS0,115200n8
[    0.000000] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers'
[    0.000000] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers'
[    0.000000] x86/fpu: Supporting XSAVE feature 0x004: 'AVX registers'
[    0.000000] x86/fpu: xstate_offset[2]:  576, xstate_sizes[2]:  256
[    0.000000] x86/fpu: Enabled xstate features 0x7, context size is 832 bytes, using 'standard' format.
[    0.000000] BIOS-provided physical RAM map:
[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009bfff] usable
[    0.000000] BIOS-e820: [mem 0x000000000009c000-0x000000000009ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved
[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000007a288fff] usable
[    0.000000] BIOS-e820: [mem 0x000000007a289000-0x000000007af0afff] reserved
[    0.000000] BIOS-e820: [mem 0x000000007af0b000-0x000000007b93afff] ACPI NVS
[    0.000000] BIOS-e820: [mem 0x000000007b93b000-0x000000007bab4fff] ACPI data
[    0.000000] BIOS-e820: [mem 0x000000007bab5000-0x000000007bae8fff] usable
[    0.000000] BIOS-e820: [mem 0x000000007bae9000-0x000000007bafefff] ACPI data
[    0.000000] BIOS-e820: [mem 0x000000007baff000-0x000000007bafffff] usable
[    0.000000] BIOS-e820: [mem 0x000000007bb00000-0x000000008fffffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000feda8000-0x00000000fedabfff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000ff310000-0x00000000ffffffff] reserved
[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000807fffffff] usable
[    0.000000] NX (Execute Disable) protection: active
[    0.000000] SMBIOS 2.8 present.
[    0.000000] DMI: Dell Inc. PowerEdge R630/0CNCJW, BIOS 2.8.0 005/17/2018
[    0.000000] tsc: Fast TSC calibration using PIT
[    0.000000] tsc: Detected 2300.015 MHz processor
[    0.002163] last_pfn = 0x8080000 max_arch_pfn = 0x400000000
[    0.005345] x86/PAT: Configuration [0-7]: WB  WC  UC- UC  WB  WP  UC- WT
[    0.005898] x2apic: enabled by BIOS, switching to x2apic ops
[    0.005902] last_pfn = 0x7bb00 max_arch_pfn = 0x400000000
[    0.013383] Using GB pages for direct mapping
[    0.013572] RAMDISK: [mem 0x353b9000-0x369d3fff]
[    0.013578] ACPI: Early table checksum verification disabled
[    0.013636] ACPI: RSDP 0x00000000000FE320 000024 (v02 DELL  )
[    0.013640] ACPI: XSDT 0x000000007BAB30E8 0000C4 (v01 DELL   PE_SC3   00000000      01000013)
[    0.013646] ACPI: FACP 0x000000007BAAF000 0000F4 (v04 DELL   PE_SC3   00000000 DELL 00000001)
[    0.013650] ACPI: DSDT 0x000000007BA95000 010777 (v02 DELL   PE_SC3   00000003 DELL 00000001)
[    0.013653] ACPI: FACS 0x000000007B833000 000040
[    0.013655] ACPI: MCEJ 0x000000007BAB2000 000130 (v01 INTEL           00000001 INTL 0100000D)
[    0.013658] ACPI: WDAT 0x000000007BAB1000 000134 (v01 DELL   PE_SC3   00000001 DELL 00000001)
[    0.013660] ACPI: SLIC 0x000000007BAB0000 000024 (v01 DELL   PE_SC3   00000001 DELL 00000001)
[    0.013662] ACPI: HPET 0x000000007BAAE000 000038 (v01 DELL   PE_SC3   00000001 DELL 00000001)
[    0.013664] ACPI: APIC 0x000000007BAAC000 001FFC (v03 DELL   PE_SC3   00000000 DELL 00000001)
[    0.013666] ACPI: MCFG 0x000000007BAAB000 00003C (v01 DELL   PE_SC3   00000001 DELL 00000001)
[    0.013668] ACPI: MSCT 0x000000007BAAA000 000090 (v01 DELL   PE_SC3   00000001 DELL 00000001)
[    0.013671] ACPI: SLIT 0x000000007BAA9000 00006C (v01 DELL   PE_SC3   00000001 DELL 00000001)
[    0.013673] ACPI: SRAT 0x000000007BAA6000 002330 (v03 DELL   PE_SC3   00000002 DELL 00000001)
[    0.013675] ACPI: SSDT 0x000000007B952000 1424A9 (v02 DELL   PE_SC3   00004000 INTL 20121114)
[    0.013678] ACPI: SSDT 0x000000007B94F000 00217F (v02 DELL   PE_SC3   00000002 INTL 20121114)
[    0.013680] ACPI: SSDT 0x000000007B94E000 00006E (v02 DELL   PE_SC3   00000002 INTL 20121114)
[    0.013682] ACPI: PRAD 0x000000007B94D000 000132 (v02 DELL   PE_SC3   00000002 INTL 20121114)
[    0.013684] ACPI: SPCR 0x000000007BAFE000 000050 (v01                 00000000      00000000)
[    0.013687] ACPI: DMAR 0x000000007BAFD000 000138 (v01 DELL   PE_SC3   00000001 DELL 00000001)
[    0.013689] ACPI: HEST 0x000000007BAF1000 00017C (v01 DELL   PE_SC3   00000002 DELL 00000001)
[    0.013691] ACPI: BERT 0x000000007BAF0000 000030 (v01 DELL   PE_SC3   00000002 DELL 00000001)
[    0.013693] ACPI: ERST 0x000000007BAEF000 000230 (v01 DELL   PE_SC3   00000002 DELL 00000001)
[    0.013695] ACPI: EINJ 0x000000007BAEE000 000150 (v01 DELL   PE_SC3   00000002 DELL 00000001)
[    0.013705] Setting APIC routing to cluster x2apic.
[    0.013731] SRAT: PXM 0 -> APIC 0x00 -> Node 0
[    0.013732] SRAT: PXM 1 -> APIC 0x20 -> Node 1
[    0.013733] SRAT: PXM 0 -> APIC 0x02 -> Node 0
[    0.013733] SRAT: PXM 1 -> APIC 0x22 -> Node 1
[    0.013734] SRAT: PXM 0 -> APIC 0x04 -> Node 0
[    0.013735] SRAT: PXM 1 -> APIC 0x24 -> Node 1
[    0.013735] SRAT: PXM 0 -> APIC 0x06 -> Node 0
[    0.013736] SRAT: PXM 1 -> APIC 0x26 -> Node 1
[    0.013736] SRAT: PXM 0 -> APIC 0x08 -> Node 0
[    0.013737] SRAT: PXM 1 -> APIC 0x28 -> Node 1
[    0.013738] SRAT: PXM 0 -> APIC 0x0a -> Node 0
[    0.013738] SRAT: PXM 1 -> APIC 0x2a -> Node 1
[    0.013739] SRAT: PXM 0 -> APIC 0x0c -> Node 0
[    0.013740] SRAT: PXM 1 -> APIC 0x2c -> Node 1
[    0.013740] SRAT: PXM 0 -> APIC 0x0e -> Node 0
[    0.013741] SRAT: PXM 1 -> APIC 0x2e -> Node 1
[    0.013741] SRAT: PXM 0 -> APIC 0x10 -> Node 0
[    0.013742] SRAT: PXM 1 -> APIC 0x30 -> Node 1
[    0.013743] SRAT: PXM 0 -> APIC 0x12 -> Node 0
[    0.013743] SRAT: PXM 1 -> APIC 0x32 -> Node 1
[    0.013744] SRAT: PXM 0 -> APIC 0x14 -> Node 0
[    0.013745] SRAT: PXM 1 -> APIC 0x34 -> Node 1
[    0.013746] SRAT: PXM 0 -> APIC 0x16 -> Node 0
[    0.013746] SRAT: PXM 1 -> APIC 0x36 -> Node 1
[    0.013747] SRAT: PXM 0 -> APIC 0x18 -> Node 0
[    0.013747] SRAT: PXM 1 -> APIC 0x38 -> Node 1
[    0.013748] SRAT: PXM 0 -> APIC 0x1a -> Node 0
[    0.013749] SRAT: PXM 1 -> APIC 0x3a -> Node 1
[    0.013749] SRAT: PXM 0 -> APIC 0x1c -> Node 0
[    0.013750] SRAT: PXM 1 -> APIC 0x3c -> Node 1
[    0.013751] SRAT: PXM 0 -> APIC 0x1e -> Node 0
[    0.013751] SRAT: PXM 1 -> APIC 0x3e -> Node 1
[    0.013752] SRAT: PXM 0 -> APIC 0x01 -> Node 0
[    0.013753] SRAT: PXM 1 -> APIC 0x21 -> Node 1
[    0.013753] SRAT: PXM 0 -> APIC 0x03 -> Node 0
[    0.013754] SRAT: PXM 1 -> APIC 0x23 -> Node 1
[    0.013755] SRAT: PXM 0 -> APIC 0x05 -> Node 0
[    0.013755] SRAT: PXM 1 -> APIC 0x25 -> Node 1
[    0.013756] SRAT: PXM 0 -> APIC 0x07 -> Node 0
[    0.013757] SRAT: PXM 1 -> APIC 0x27 -> Node 1
[    0.013757] SRAT: PXM 0 -> APIC 0x09 -> Node 0
[    0.013758] SRAT: PXM 1 -> APIC 0x29 -> Node 1
[    0.013758] SRAT: PXM 0 -> APIC 0x0b -> Node 0
[    0.013759] SRAT: PXM 1 -> APIC 0x2b -> Node 1
[    0.013760] SRAT: PXM 0 -> APIC 0x0d -> Node 0
[    0.013760] SRAT: PXM 1 -> APIC 0x2d -> Node 1
[    0.013761] SRAT: PXM 0 -> APIC 0x0f -> Node 0
[    0.013762] SRAT: PXM 1 -> APIC 0x2f -> Node 1
[    0.013762] SRAT: PXM 0 -> APIC 0x11 -> Node 0
[    0.013763] SRAT: PXM 1 -> APIC 0x31 -> Node 1
[    0.013763] SRAT: PXM 0 -> APIC 0x13 -> Node 0
[    0.013764] SRAT: PXM 1 -> APIC 0x33 -> Node 1
[    0.013765] SRAT: PXM 0 -> APIC 0x15 -> Node 0
[    0.013765] SRAT: PXM 1 -> APIC 0x35 -> Node 1
[    0.013766] SRAT: PXM 0 -> APIC 0x17 -> Node 0
[    0.013766] SRAT: PXM 1 -> APIC 0x37 -> Node 1
[    0.013767] SRAT: PXM 0 -> APIC 0x19 -> Node 0
[    0.013768] SRAT: PXM 1 -> APIC 0x39 -> Node 1
[    0.013768] SRAT: PXM 0 -> APIC 0x1b -> Node 0
[    0.013769] SRAT: PXM 1 -> APIC 0x3b -> Node 1
[    0.013770] SRAT: PXM 0 -> APIC 0x1d -> Node 0
[    0.013770] SRAT: PXM 1 -> APIC 0x3d -> Node 1
[    0.013771] SRAT: PXM 0 -> APIC 0x1f -> Node 0
[    0.013771] SRAT: PXM 1 -> APIC 0x3f -> Node 1
[    0.013782] ACPI: SRAT: Node 0 PXM 0 [mem 0x00000000-0x407fffffff]
[    0.013783] ACPI: SRAT: Node 1 PXM 1 [mem 0x4080000000-0x807fffffff]
[    0.013791] NODE_DATA(0) allocated [mem 0x407fffb000-0x407fffffff]
[    0.013796] NODE_DATA(1) allocated [mem 0x807fffa000-0x807fffefff]
[    0.014232] Zone ranges:
[    0.014233]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
[    0.014234]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
[    0.014236]   Normal   [mem 0x0000000100000000-0x000000807fffffff]
[    0.014237]   Device   empty
[    0.014238] Movable zone start for each node
[    0.014238] Early memory node ranges
[    0.014239]   node   0: [mem 0x0000000000001000-0x000000000009bfff]
[    0.014240]   node   0: [mem 0x0000000000100000-0x000000007a288fff]
[    0.014241]   node   0: [mem 0x000000007bab5000-0x000000007bae8fff]
[    0.014242]   node   0: [mem 0x000000007baff000-0x000000007bafffff]
[    0.014243]   node   0: [mem 0x0000000100000000-0x000000407fffffff]
[    0.014243]   node   1: [mem 0x0000004080000000-0x000000807fffffff]
[    0.014644] Zeroed struct page in unavailable ranges: 23975 pages
[    0.014645] Initmem setup node 0 [mem 0x0000000000001000-0x000000407fffffff]
[    1.402605] Initmem setup node 1 [mem 0x0000004080000000-0x000000807fffffff]
[    2.863113] ACPI: PM-Timer IO Port: 0x408
[    2.863140] ACPI: X2APIC_NMI (uid[0x00] high level lint[0x1])
[    2.863141] ACPI: X2APIC_NMI (uid[0x01] high level lint[0x1])
[    2.863142] ACPI: X2APIC_NMI (uid[0x02] high level lint[0x1])
[    2.863142] ACPI: X2APIC_NMI (uid[0x03] high level lint[0x1])
[    2.863143] ACPI: X2APIC_NMI (uid[0x04] high level lint[0x1])
[    2.863144] ACPI: X2APIC_NMI (uid[0x05] high level lint[0x1])
[    2.863144] ACPI: X2APIC_NMI (uid[0x06] high level lint[0x1])
[    2.863145] ACPI: X2APIC_NMI (uid[0x07] high level lint[0x1])
[    2.863146] ACPI: X2APIC_NMI (uid[0x08] high level lint[0x1])
[    2.863146] ACPI: X2APIC_NMI (uid[0x09] high level lint[0x1])
[    2.863147] ACPI: X2APIC_NMI (uid[0x0a] high level lint[0x1])
[    2.863148] ACPI: X2APIC_NMI (uid[0x0b] high level lint[0x1])
[    2.863148] ACPI: X2APIC_NMI (uid[0x0c] high level lint[0x1])
[    2.863149] ACPI: X2APIC_NMI (uid[0x0d] high level lint[0x1])
[    2.863149] ACPI: X2APIC_NMI (uid[0x0e] high level lint[0x1])
[    2.863150] ACPI: X2APIC_NMI (uid[0x0f] high level lint[0x1])
[    2.863151] ACPI: X2APIC_NMI (uid[0x10] high level lint[0x1])
[    2.863151] ACPI: X2APIC_NMI (uid[0x11] high level lint[0x1])
[    2.863152] ACPI: X2APIC_NMI (uid[0x12] high level lint[0x1])
[    2.863153] ACPI: X2APIC_NMI (uid[0x13] high level lint[0x1])
[    2.863153] ACPI: X2APIC_NMI (uid[0x14] high level lint[0x1])
[    2.863154] ACPI: X2APIC_NMI (uid[0x15] high level lint[0x1])
[    2.863155] ACPI: X2APIC_NMI (uid[0x16] high level lint[0x1])
[    2.863155] ACPI: X2APIC_NMI (uid[0x17] high level lint[0x1])
[    2.863156] ACPI: X2APIC_NMI (uid[0x18] high level lint[0x1])
[    2.863157] ACPI: X2APIC_NMI (uid[0x19] high level lint[0x1])
[    2.863157] ACPI: X2APIC_NMI (uid[0x1a] high level lint[0x1])
[    2.863158] ACPI: X2APIC_NMI (uid[0x1b] high level lint[0x1])
[    2.863159] ACPI: X2APIC_NMI (uid[0x1c] high level lint[0x1])
[    2.863159] ACPI: X2APIC_NMI (uid[0x1d] high level lint[0x1])
[    2.863160] ACPI: X2APIC_NMI (uid[0x1e] high level lint[0x1])
[    2.863160] ACPI: X2APIC_NMI (uid[0x1f] high level lint[0x1])
[    2.863161] ACPI: X2APIC_NMI (uid[0x20] high level lint[0x1])
[    2.863162] ACPI: X2APIC_NMI (uid[0x21] high level lint[0x1])
[    2.863162] ACPI: X2APIC_NMI (uid[0x22] high level lint[0x1])
[    2.863163] ACPI: X2APIC_NMI (uid[0x23] high level lint[0x1])
[    2.863164] ACPI: X2APIC_NMI (uid[0x24] high level lint[0x1])
[    2.863164] ACPI: X2APIC_NMI (uid[0x25] high level lint[0x1])
[    2.863165] ACPI: X2APIC_NMI (uid[0x26] high level lint[0x1])
[    2.863166] ACPI: X2APIC_NMI (uid[0x27] high level lint[0x1])
[    2.863166] ACPI: X2APIC_NMI (uid[0x28] high level lint[0x1])
[    2.863167] ACPI: X2APIC_NMI (uid[0x29] high level lint[0x1])
[    2.863168] ACPI: X2APIC_NMI (uid[0x2a] high level lint[0x1])
[    2.863168] ACPI: X2APIC_NMI (uid[0x2b] high level lint[0x1])
[    2.863169] ACPI: X2APIC_NMI (uid[0x2c] high level lint[0x1])
[    2.863169] ACPI: X2APIC_NMI (uid[0x2d] high level lint[0x1])
[    2.863170] ACPI: X2APIC_NMI (uid[0x2e] high level lint[0x1])
[    2.863171] ACPI: X2APIC_NMI (uid[0x2f] high level lint[0x1])
[    2.863171] ACPI: X2APIC_NMI (uid[0x30] high level lint[0x1])
[    2.863172] ACPI: X2APIC_NMI (uid[0x31] high level lint[0x1])
[    2.863173] ACPI: X2APIC_NMI (uid[0x32] high level lint[0x1])
[    2.863173] ACPI: X2APIC_NMI (uid[0x33] high level lint[0x1])
[    2.863174] ACPI: X2APIC_NMI (uid[0x34] high level lint[0x1])
[    2.863175] ACPI: X2APIC_NMI (uid[0x35] high level lint[0x1])
[    2.863175] ACPI: X2APIC_NMI (uid[0x36] high level lint[0x1])
[    2.863176] ACPI: X2APIC_NMI (uid[0x37] high level lint[0x1])
[    2.863177] ACPI: X2APIC_NMI (uid[0x38] high level lint[0x1])
[    2.863177] ACPI: X2APIC_NMI (uid[0x39] high level lint[0x1])
[    2.863178] ACPI: X2APIC_NMI (uid[0x3a] high level lint[0x1])
[    2.863179] ACPI: X2APIC_NMI (uid[0x3b] high level lint[0x1])
[    2.863179] ACPI: X2APIC_NMI (uid[0x3c] high level lint[0x1])
[    2.863180] ACPI: X2APIC_NMI (uid[0x3d] high level lint[0x1])
[    2.863181] ACPI: X2APIC_NMI (uid[0x3e] high level lint[0x1])
[    2.863181] ACPI: X2APIC_NMI (uid[0x3f] high level lint[0x1])
[    2.863182] ACPI: X2APIC_NMI (uid[0x40] high level lint[0x1])
[    2.863182] ACPI: X2APIC_NMI (uid[0x41] high level lint[0x1])
[    2.863183] ACPI: X2APIC_NMI (uid[0x42] high level lint[0x1])
[    2.863184] ACPI: X2APIC_NMI (uid[0x43] high level lint[0x1])
[    2.863184] ACPI: X2APIC_NMI (uid[0x44] high level lint[0x1])
[    2.863185] ACPI: X2APIC_NMI (uid[0x45] high level lint[0x1])
[    2.863186] ACPI: X2APIC_NMI (uid[0x46] high level lint[0x1])
[    2.863186] ACPI: X2APIC_NMI (uid[0x47] high level lint[0x1])
[    2.863187] ACPI: X2APIC_NMI (uid[0x48] high level lint[0x1])
[    2.863188] ACPI: X2APIC_NMI (uid[0x49] high level lint[0x1])
[    2.863188] ACPI: X2APIC_NMI (uid[0x4a] high level lint[0x1])
[    2.863189] ACPI: X2APIC_NMI (uid[0x4b] high level lint[0x1])
[    2.863189] ACPI: X2APIC_NMI (uid[0x4c] high level lint[0x1])
[    2.863190] ACPI: X2APIC_NMI (uid[0x4d] high level lint[0x1])
[    2.863191] ACPI: X2APIC_NMI (uid[0x4e] high level lint[0x1])
[    2.863191] ACPI: X2APIC_NMI (uid[0x4f] high level lint[0x1])
[    2.863192] ACPI: X2APIC_NMI (uid[0x50] high level lint[0x1])
[    2.863193] ACPI: X2APIC_NMI (uid[0x51] high level lint[0x1])
[    2.863193] ACPI: X2APIC_NMI (uid[0x52] high level lint[0x1])
[    2.863194] ACPI: X2APIC_NMI (uid[0x53] high level lint[0x1])
[    2.863195] ACPI: X2APIC_NMI (uid[0x54] high level lint[0x1])
[    2.863195] ACPI: X2APIC_NMI (uid[0x55] high level lint[0x1])
[    2.863196] ACPI: X2APIC_NMI (uid[0x56] high level lint[0x1])
[    2.863197] ACPI: X2APIC_NMI (uid[0x57] high level lint[0x1])
[    2.863197] ACPI: X2APIC_NMI (uid[0x58] high level lint[0x1])
[    2.863198] ACPI: X2APIC_NMI (uid[0x59] high level lint[0x1])
[    2.863199] ACPI: X2APIC_NMI (uid[0x5a] high level lint[0x1])
[    2.863199] ACPI: X2APIC_NMI (uid[0x5b] high level lint[0x1])
[    2.863200] ACPI: X2APIC_NMI (uid[0x5c] high level lint[0x1])
[    2.863201] ACPI: X2APIC_NMI (uid[0x5d] high level lint[0x1])
[    2.863201] ACPI: X2APIC_NMI (uid[0x5e] high level lint[0x1])
[    2.863202] ACPI: X2APIC_NMI (uid[0x5f] high level lint[0x1])
[    2.863202] ACPI: X2APIC_NMI (uid[0x60] high level lint[0x1])
[    2.863203] ACPI: X2APIC_NMI (uid[0x61] high level lint[0x1])
[    2.863204] ACPI: X2APIC_NMI (uid[0x62] high level lint[0x1])
[    2.863204] ACPI: X2APIC_NMI (uid[0x63] high level lint[0x1])
[    2.863205] ACPI: X2APIC_NMI (uid[0x64] high level lint[0x1])
[    2.863206] ACPI: X2APIC_NMI (uid[0x65] high level lint[0x1])
[    2.863206] ACPI: X2APIC_NMI (uid[0x66] high level lint[0x1])
[    2.863207] ACPI: X2APIC_NMI (uid[0x67] high level lint[0x1])
[    2.863208] ACPI: X2APIC_NMI (uid[0x68] high level lint[0x1])
[    2.863208] ACPI: X2APIC_NMI (uid[0x69] high level lint[0x1])
[    2.863209] ACPI: X2APIC_NMI (uid[0x6a] high level lint[0x1])
[    2.863210] ACPI: X2APIC_NMI (uid[0x6b] high level lint[0x1])
[    2.863210] ACPI: X2APIC_NMI (uid[0x6c] high level lint[0x1])
[    2.863211] ACPI: X2APIC_NMI (uid[0x6d] high level lint[0x1])
[    2.863211] ACPI: X2APIC_NMI (uid[0x6e] high level lint[0x1])
[    2.863212] ACPI: X2APIC_NMI (uid[0x6f] high level lint[0x1])
[    2.863213] ACPI: X2APIC_NMI (uid[0x70] high level lint[0x1])
[    2.863213] ACPI: X2APIC_NMI (uid[0x71] high level lint[0x1])
[    2.863214] ACPI: X2APIC_NMI (uid[0x72] high level lint[0x1])
[    2.863215] ACPI: X2APIC_NMI (uid[0x73] high level lint[0x1])
[    2.863215] ACPI: X2APIC_NMI (uid[0x74] high level lint[0x1])
[    2.863216] ACPI: X2APIC_NMI (uid[0x75] high level lint[0x1])
[    2.863217] ACPI: X2APIC_NMI (uid[0x76] high level lint[0x1])
[    2.863217] ACPI: X2APIC_NMI (uid[0x77] high level lint[0x1])
[    2.863218] ACPI: X2APIC_NMI (uid[0x78] high level lint[0x1])
[    2.863219] ACPI: X2APIC_NMI (uid[0x79] high level lint[0x1])
[    2.863219] ACPI: X2APIC_NMI (uid[0x7a] high level lint[0x1])
[    2.863220] ACPI: X2APIC_NMI (uid[0x7b] high level lint[0x1])
[    2.863220] ACPI: X2APIC_NMI (uid[0x7c] high level lint[0x1])
[    2.863221] ACPI: X2APIC_NMI (uid[0x7d] high level lint[0x1])
[    2.863222] ACPI: X2APIC_NMI (uid[0x7e] high level lint[0x1])
[    2.863222] ACPI: X2APIC_NMI (uid[0x7f] high level lint[0x1])
[    2.863223] ACPI: X2APIC_NMI (uid[0x80] high level lint[0x1])
[    2.863224] ACPI: X2APIC_NMI (uid[0x81] high level lint[0x1])
[    2.863224] ACPI: X2APIC_NMI (uid[0x82] high level lint[0x1])
[    2.863225] ACPI: X2APIC_NMI (uid[0x83] high level lint[0x1])
[    2.863226] ACPI: X2APIC_NMI (uid[0x84] high level lint[0x1])
[    2.863226] ACPI: X2APIC_NMI (uid[0x85] high level lint[0x1])
[    2.863227] ACPI: X2APIC_NMI (uid[0x86] high level lint[0x1])
[    2.863228] ACPI: X2APIC_NMI (uid[0x87] high level lint[0x1])
[    2.863228] ACPI: X2APIC_NMI (uid[0x88] high level lint[0x1])
[    2.863229] ACPI: X2APIC_NMI (uid[0x89] high level lint[0x1])
[    2.863229] ACPI: X2APIC_NMI (uid[0x8a] high level lint[0x1])
[    2.863230] ACPI: X2APIC_NMI (uid[0x8b] high level lint[0x1])
[    2.863231] ACPI: X2APIC_NMI (uid[0x8c] high level lint[0x1])
[    2.863231] ACPI: X2APIC_NMI (uid[0x8d] high level lint[0x1])
[    2.863232] ACPI: X2APIC_NMI (uid[0x8e] high level lint[0x1])
[    2.863233] ACPI: X2APIC_NMI (uid[0x8f] high level lint[0x1])
[    2.863233] ACPI: X2APIC_NMI (uid[0x90] high level lint[0x1])
[    2.863234] ACPI: X2APIC_NMI (uid[0x91] high level lint[0x1])
[    2.863235] ACPI: X2APIC_NMI (uid[0x92] high level lint[0x1])
[    2.863235] ACPI: X2APIC_NMI (uid[0x93] high level lint[0x1])
[    2.863236] ACPI: X2APIC_NMI (uid[0x94] high level lint[0x1])
[    2.863237] ACPI: X2APIC_NMI (uid[0x95] high level lint[0x1])
[    2.863237] ACPI: X2APIC_NMI (uid[0x96] high level lint[0x1])
[    2.863238] ACPI: X2APIC_NMI (uid[0x97] high level lint[0x1])
[    2.863238] ACPI: X2APIC_NMI (uid[0x98] high level lint[0x1])
[    2.863239] ACPI: X2APIC_NMI (uid[0x99] high level lint[0x1])
[    2.863240] ACPI: X2APIC_NMI (uid[0x9a] high level lint[0x1])
[    2.863240] ACPI: X2APIC_NMI (uid[0x9b] high level lint[0x1])
[    2.863241] ACPI: X2APIC_NMI (uid[0x9c] high level lint[0x1])
[    2.863242] ACPI: X2APIC_NMI (uid[0x9d] high level lint[0x1])
[    2.863242] ACPI: X2APIC_NMI (uid[0x9e] high level lint[0x1])
[    2.863243] ACPI: X2APIC_NMI (uid[0x9f] high level lint[0x1])
[    2.863244] ACPI: X2APIC_NMI (uid[0xa0] high level lint[0x1])
[    2.863244] ACPI: X2APIC_NMI (uid[0xa1] high level lint[0x1])
[    2.863245] ACPI: X2APIC_NMI (uid[0xa2] high level lint[0x1])
[    2.863246] ACPI: X2APIC_NMI (uid[0xa3] high level lint[0x1])
[    2.863246] ACPI: X2APIC_NMI (uid[0xa4] high level lint[0x1])
[    2.863247] ACPI: X2APIC_NMI (uid[0xa5] high level lint[0x1])
[    2.863247] ACPI: X2APIC_NMI (uid[0xa6] high level lint[0x1])
[    2.863248] ACPI: X2APIC_NMI (uid[0xa7] high level lint[0x1])
[    2.863249] ACPI: X2APIC_NMI (uid[0xa8] high level lint[0x1])
[    2.863249] ACPI: X2APIC_NMI (uid[0xa9] high level lint[0x1])
[    2.863250] ACPI: X2APIC_NMI (uid[0xaa] high level lint[0x1])
[    2.863251] ACPI: X2APIC_NMI (uid[0xab] high level lint[0x1])
[    2.863251] ACPI: X2APIC_NMI (uid[0xac] high level lint[0x1])
[    2.863252] ACPI: X2APIC_NMI (uid[0xad] high level lint[0x1])
[    2.863253] ACPI: X2APIC_NMI (uid[0xae] high level lint[0x1])
[    2.863253] ACPI: X2APIC_NMI (uid[0xaf] high level lint[0x1])
[    2.863254] ACPI: X2APIC_NMI (uid[0xb0] high level lint[0x1])
[    2.863255] ACPI: X2APIC_NMI (uid[0xb1] high level lint[0x1])
[    2.863255] ACPI: X2APIC_NMI (uid[0xb2] high level lint[0x1])
[    2.863256] ACPI: X2APIC_NMI (uid[0xb3] high level lint[0x1])
[    2.863257] ACPI: X2APIC_NMI (uid[0xb4] high level lint[0x1])
[    2.863257] ACPI: X2APIC_NMI (uid[0xb5] high level lint[0x1])
[    2.863258] ACPI: X2APIC_NMI (uid[0xb6] high level lint[0x1])
[    2.863259] ACPI: X2APIC_NMI (uid[0xb7] high level lint[0x1])
[    2.863259] ACPI: X2APIC_NMI (uid[0xb8] high level lint[0x1])
[    2.863260] ACPI: X2APIC_NMI (uid[0xb9] high level lint[0x1])
[    2.863260] ACPI: X2APIC_NMI (uid[0xba] high level lint[0x1])
[    2.863261] ACPI: X2APIC_NMI (uid[0xbb] high level lint[0x1])
[    2.863262] ACPI: X2APIC_NMI (uid[0xbc] high level lint[0x1])
[    2.863262] ACPI: X2APIC_NMI (uid[0xbd] high level lint[0x1])
[    2.863263] ACPI: X2APIC_NMI (uid[0xbe] high level lint[0x1])
[    2.863264] ACPI: X2APIC_NMI (uid[0xbf] high level lint[0x1])
[    2.863266] ACPI: LAPIC_NMI (acpi_id[0x00] high level lint[0x1])
[    2.863267] ACPI: LAPIC_NMI (acpi_id[0x01] high level lint[0x1])
[    2.863267] ACPI: LAPIC_NMI (acpi_id[0x02] high level lint[0x1])
[    2.863268] ACPI: LAPIC_NMI (acpi_id[0x03] high level lint[0x1])
[    2.863269] ACPI: LAPIC_NMI (acpi_id[0x04] high level lint[0x1])
[    2.863269] ACPI: LAPIC_NMI (acpi_id[0x05] high level lint[0x1])
[    2.863270] ACPI: LAPIC_NMI (acpi_id[0x06] high level lint[0x1])
[    2.863271] ACPI: LAPIC_NMI (acpi_id[0x07] high level lint[0x1])
[    2.863271] ACPI: LAPIC_NMI (acpi_id[0x08] high level lint[0x1])
[    2.863272] ACPI: LAPIC_NMI (acpi_id[0x09] high level lint[0x1])
[    2.863273] ACPI: LAPIC_NMI (acpi_id[0x0a] high level lint[0x1])
[    2.863273] ACPI: LAPIC_NMI (acpi_id[0x0b] high level lint[0x1])
[    2.863274] ACPI: LAPIC_NMI (acpi_id[0x0c] high level lint[0x1])
[    2.863275] ACPI: LAPIC_NMI (acpi_id[0x0d] high level lint[0x1])
[    2.863275] ACPI: LAPIC_NMI (acpi_id[0x0e] high level lint[0x1])
[    2.863276] ACPI: LAPIC_NMI (acpi_id[0x0f] high level lint[0x1])
[    2.863276] ACPI: LAPIC_NMI (acpi_id[0x10] high level lint[0x1])
[    2.863277] ACPI: LAPIC_NMI (acpi_id[0x11] high level lint[0x1])
[    2.863278] ACPI: LAPIC_NMI (acpi_id[0x12] high level lint[0x1])
[    2.863278] ACPI: LAPIC_NMI (acpi_id[0x13] high level lint[0x1])
[    2.863279] ACPI: LAPIC_NMI (acpi_id[0x14] high level lint[0x1])
[    2.863280] ACPI: LAPIC_NMI (acpi_id[0x15] high level lint[0x1])
[    2.863280] ACPI: LAPIC_NMI (acpi_id[0x16] high level lint[0x1])
[    2.863281] ACPI: LAPIC_NMI (acpi_id[0x17] high level lint[0x1])
[    2.863282] ACPI: LAPIC_NMI (acpi_id[0x18] high level lint[0x1])
[    2.863282] ACPI: LAPIC_NMI (acpi_id[0x19] high level lint[0x1])
[    2.863283] ACPI: LAPIC_NMI (acpi_id[0x1a] high level lint[0x1])
[    2.863284] ACPI: LAPIC_NMI (acpi_id[0x1b] high level lint[0x1])
[    2.863284] ACPI: LAPIC_NMI (acpi_id[0x1c] high level lint[0x1])
[    2.863285] ACPI: LAPIC_NMI (acpi_id[0x1d] high level lint[0x1])
[    2.863285] ACPI: LAPIC_NMI (acpi_id[0x1e] high level lint[0x1])
[    2.863286] ACPI: LAPIC_NMI (acpi_id[0x1f] high level lint[0x1])
[    2.863287] ACPI: LAPIC_NMI (acpi_id[0x20] high level lint[0x1])
[    2.863287] ACPI: LAPIC_NMI (acpi_id[0x21] high level lint[0x1])
[    2.863288] ACPI: LAPIC_NMI (acpi_id[0x22] high level lint[0x1])
[    2.863289] ACPI: LAPIC_NMI (acpi_id[0x23] high level lint[0x1])
[    2.863289] ACPI: LAPIC_NMI (acpi_id[0x24] high level lint[0x1])
[    2.863290] ACPI: LAPIC_NMI (acpi_id[0x25] high level lint[0x1])
[    2.863291] ACPI: LAPIC_NMI (acpi_id[0x26] high level lint[0x1])
[    2.863291] ACPI: LAPIC_NMI (acpi_id[0x27] high level lint[0x1])
[    2.863292] ACPI: LAPIC_NMI (acpi_id[0x28] high level lint[0x1])
[    2.863293] ACPI: LAPIC_NMI (acpi_id[0x29] high level lint[0x1])
[    2.863293] ACPI: LAPIC_NMI (acpi_id[0x2a] high level lint[0x1])
[    2.863294] ACPI: LAPIC_NMI (acpi_id[0x2b] high level lint[0x1])
[    2.863294] ACPI: LAPIC_NMI (acpi_id[0x2c] high level lint[0x1])
[    2.863295] ACPI: LAPIC_NMI (acpi_id[0x2d] high level lint[0x1])
[    2.863296] ACPI: LAPIC_NMI (acpi_id[0x2e] high level lint[0x1])
[    2.863296] ACPI: LAPIC_NMI (acpi_id[0x2f] high level lint[0x1])
[    2.863297] ACPI: LAPIC_NMI (acpi_id[0x30] high level lint[0x1])
[    2.863298] ACPI: LAPIC_NMI (acpi_id[0x31] high level lint[0x1])
[    2.863298] ACPI: LAPIC_NMI (acpi_id[0x32] high level lint[0x1])
[    2.863299] ACPI: LAPIC_NMI (acpi_id[0x33] high level lint[0x1])
[    2.863300] ACPI: LAPIC_NMI (acpi_id[0x34] high level lint[0x1])
[    2.863300] ACPI: LAPIC_NMI (acpi_id[0x35] high level lint[0x1])
[    2.863301] ACPI: LAPIC_NMI (acpi_id[0x36] high level lint[0x1])
[    2.863302] ACPI: LAPIC_NMI (acpi_id[0x37] high level lint[0x1])
[    2.863302] ACPI: LAPIC_NMI (acpi_id[0x38] high level lint[0x1])
[    2.863303] ACPI: LAPIC_NMI (acpi_id[0x39] high level lint[0x1])
[    2.863303] ACPI: LAPIC_NMI (acpi_id[0x3a] high level lint[0x1])
[    2.863304] ACPI: LAPIC_NMI (acpi_id[0x3b] high level lint[0x1])
[    2.863305] ACPI: LAPIC_NMI (acpi_id[0x3c] high level lint[0x1])
[    2.863305] ACPI: LAPIC_NMI (acpi_id[0x3d] high level lint[0x1])
[    2.863306] ACPI: LAPIC_NMI (acpi_id[0x3e] high level lint[0x1])
[    2.863307] ACPI: LAPIC_NMI (acpi_id[0x3f] high level lint[0x1])
[    2.863307] ACPI: LAPIC_NMI (acpi_id[0x40] high level lint[0x1])
[    2.863308] ACPI: LAPIC_NMI (acpi_id[0x41] high level lint[0x1])
[    2.863309] ACPI: LAPIC_NMI (acpi_id[0x42] high level lint[0x1])
[    2.863309] ACPI: LAPIC_NMI (acpi_id[0x43] high level lint[0x1])
[    2.863310] ACPI: LAPIC_NMI (acpi_id[0x44] high level lint[0x1])
[    2.863311] ACPI: LAPIC_NMI (acpi_id[0x45] high level lint[0x1])
[    2.863311] ACPI: LAPIC_NMI (acpi_id[0x46] high level lint[0x1])
[    2.863312] ACPI: LAPIC_NMI (acpi_id[0x47] high level lint[0x1])
[    2.863312] ACPI: LAPIC_NMI (acpi_id[0x48] high level lint[0x1])
[    2.863313] ACPI: LAPIC_NMI (acpi_id[0x49] high level lint[0x1])
[    2.863314] ACPI: LAPIC_NMI (acpi_id[0x4a] high level lint[0x1])
[    2.863314] ACPI: LAPIC_NMI (acpi_id[0x4b] high level lint[0x1])
[    2.863315] ACPI: LAPIC_NMI (acpi_id[0x4c] high level lint[0x1])
[    2.863316] ACPI: LAPIC_NMI (acpi_id[0x4d] high level lint[0x1])
[    2.863316] ACPI: LAPIC_NMI (acpi_id[0x4e] high level lint[0x1])
[    2.863317] ACPI: LAPIC_NMI (acpi_id[0x4f] high level lint[0x1])
[    2.863318] ACPI: LAPIC_NMI (acpi_id[0x50] high level lint[0x1])
[    2.863318] ACPI: LAPIC_NMI (acpi_id[0x51] high level lint[0x1])
[    2.863319] ACPI: LAPIC_NMI (acpi_id[0x52] high level lint[0x1])
[    2.863320] ACPI: LAPIC_NMI (acpi_id[0x53] high level lint[0x1])
[    2.863320] ACPI: LAPIC_NMI (acpi_id[0x54] high level lint[0x1])
[    2.863321] ACPI: LAPIC_NMI (acpi_id[0x55] high level lint[0x1])
[    2.863321] ACPI: LAPIC_NMI (acpi_id[0x56] high level lint[0x1])
[    2.863322] ACPI: LAPIC_NMI (acpi_id[0x57] high level lint[0x1])
[    2.863323] ACPI: LAPIC_NMI (acpi_id[0x58] high level lint[0x1])
[    2.863323] ACPI: LAPIC_NMI (acpi_id[0x59] high level lint[0x1])
[    2.863324] ACPI: LAPIC_NMI (acpi_id[0x5a] high level lint[0x1])
[    2.863325] ACPI: LAPIC_NMI (acpi_id[0x5b] high level lint[0x1])
[    2.863325] ACPI: LAPIC_NMI (acpi_id[0x5c] high level lint[0x1])
[    2.863326] ACPI: LAPIC_NMI (acpi_id[0x5d] high level lint[0x1])
[    2.863327] ACPI: LAPIC_NMI (acpi_id[0x5e] high level lint[0x1])
[    2.863327] ACPI: LAPIC_NMI (acpi_id[0x5f] high level lint[0x1])
[    2.863328] ACPI: LAPIC_NMI (acpi_id[0x60] high level lint[0x1])
[    2.863329] ACPI: LAPIC_NMI (acpi_id[0x61] high level lint[0x1])
[    2.863329] ACPI: LAPIC_NMI (acpi_id[0x62] high level lint[0x1])
[    2.863330] ACPI: LAPIC_NMI (acpi_id[0x63] high level lint[0x1])
[    2.863330] ACPI: LAPIC_NMI (acpi_id[0x64] high level lint[0x1])
[    2.863331] ACPI: LAPIC_NMI (acpi_id[0x65] high level lint[0x1])
[    2.863332] ACPI: LAPIC_NMI (acpi_id[0x66] high level lint[0x1])
[    2.863332] ACPI: LAPIC_NMI (acpi_id[0x67] high level lint[0x1])
[    2.863333] ACPI: LAPIC_NMI (acpi_id[0x68] high level lint[0x1])
[    2.863334] ACPI: LAPIC_NMI (acpi_id[0x69] high level lint[0x1])
[    2.863334] ACPI: LAPIC_NMI (acpi_id[0x6a] high level lint[0x1])
[    2.863335] ACPI: LAPIC_NMI (acpi_id[0x6b] high level lint[0x1])
[    2.863336] ACPI: LAPIC_NMI (acpi_id[0x6c] high level lint[0x1])
[    2.863336] ACPI: LAPIC_NMI (acpi_id[0x6d] high level lint[0x1])
[    2.863337] ACPI: LAPIC_NMI (acpi_id[0x6e] high level lint[0x1])
[    2.863338] ACPI: LAPIC_NMI (acpi_id[0x6f] high level lint[0x1])
[    2.863338] ACPI: LAPIC_NMI (acpi_id[0x70] high level lint[0x1])
[    2.863339] ACPI: LAPIC_NMI (acpi_id[0x71] high level lint[0x1])
[    2.863339] ACPI: LAPIC_NMI (acpi_id[0x72] high level lint[0x1])
[    2.863340] ACPI: LAPIC_NMI (acpi_id[0x73] high level lint[0x1])
[    2.863341] ACPI: LAPIC_NMI (acpi_id[0x74] high level lint[0x1])
[    2.863341] ACPI: LAPIC_NMI (acpi_id[0x75] high level lint[0x1])
[    2.863342] ACPI: LAPIC_NMI (acpi_id[0x76] high level lint[0x1])
[    2.863343] ACPI: LAPIC_NMI (acpi_id[0x77] high level lint[0x1])
[    2.863343] ACPI: LAPIC_NMI (acpi_id[0x78] high level lint[0x1])
[    2.863344] ACPI: LAPIC_NMI (acpi_id[0x79] high level lint[0x1])
[    2.863345] ACPI: LAPIC_NMI (acpi_id[0x7a] high level lint[0x1])
[    2.863345] ACPI: LAPIC_NMI (acpi_id[0x7b] high level lint[0x1])
[    2.863346] ACPI: LAPIC_NMI (acpi_id[0x7c] high level lint[0x1])
[    2.863347] ACPI: LAPIC_NMI (acpi_id[0x7d] high level lint[0x1])
[    2.863347] ACPI: LAPIC_NMI (acpi_id[0x7e] high level lint[0x1])
[    2.863348] ACPI: LAPIC_NMI (acpi_id[0x7f] high level lint[0x1])
[    2.863349] ACPI: LAPIC_NMI (acpi_id[0x80] high level lint[0x1])
[    2.863349] ACPI: LAPIC_NMI (acpi_id[0x81] high level lint[0x1])
[    2.863350] ACPI: LAPIC_NMI (acpi_id[0x82] high level lint[0x1])
[    2.863350] ACPI: LAPIC_NMI (acpi_id[0x83] high level lint[0x1])
[    2.863351] ACPI: LAPIC_NMI (acpi_id[0x84] high level lint[0x1])
[    2.863352] ACPI: LAPIC_NMI (acpi_id[0x85] high level lint[0x1])
[    2.863352] ACPI: LAPIC_NMI (acpi_id[0x86] high level lint[0x1])
[    2.863353] ACPI: LAPIC_NMI (acpi_id[0x87] high level lint[0x1])
[    2.863354] ACPI: LAPIC_NMI (acpi_id[0x88] high level lint[0x1])
[    2.863354] ACPI: LAPIC_NMI (acpi_id[0x89] high level lint[0x1])
[    2.863355] ACPI: LAPIC_NMI (acpi_id[0x8a] high level lint[0x1])
[    2.863356] ACPI: LAPIC_NMI (acpi_id[0x8b] high level lint[0x1])
[    2.863356] ACPI: LAPIC_NMI (acpi_id[0x8c] high level lint[0x1])
[    2.863357] ACPI: LAPIC_NMI (acpi_id[0x8d] high level lint[0x1])
[    2.863358] ACPI: LAPIC_NMI (acpi_id[0x8e] high level lint[0x1])
[    2.863358] ACPI: LAPIC_NMI (acpi_id[0x8f] high level lint[0x1])
[    2.863359] ACPI: LAPIC_NMI (acpi_id[0x90] high level lint[0x1])
[    2.863359] ACPI: LAPIC_NMI (acpi_id[0x91] high level lint[0x1])
[    2.863360] ACPI: LAPIC_NMI (acpi_id[0x92] high level lint[0x1])
[    2.863361] ACPI: LAPIC_NMI (acpi_id[0x93] high level lint[0x1])
[    2.863361] ACPI: LAPIC_NMI (acpi_id[0x94] high level lint[0x1])
[    2.863362] ACPI: LAPIC_NMI (acpi_id[0x95] high level lint[0x1])
[    2.863363] ACPI: LAPIC_NMI (acpi_id[0x96] high level lint[0x1])
[    2.863363] ACPI: LAPIC_NMI (acpi_id[0x97] high level lint[0x1])
[    2.863364] ACPI: LAPIC_NMI (acpi_id[0x98] high level lint[0x1])
[    2.863365] ACPI: LAPIC_NMI (acpi_id[0x99] high level lint[0x1])
[    2.863365] ACPI: LAPIC_NMI (acpi_id[0x9a] high level lint[0x1])
[    2.863366] ACPI: LAPIC_NMI (acpi_id[0x9b] high level lint[0x1])
[    2.863366] ACPI: LAPIC_NMI (acpi_id[0x9c] high level lint[0x1])
[    2.863367] ACPI: LAPIC_NMI (acpi_id[0x9d] high level lint[0x1])
[    2.863368] ACPI: LAPIC_NMI (acpi_id[0x9e] high level lint[0x1])
[    2.863368] ACPI: LAPIC_NMI (acpi_id[0x9f] high level lint[0x1])
[    2.863369] ACPI: LAPIC_NMI (acpi_id[0xa0] high level lint[0x1])
[    2.863370] ACPI: LAPIC_NMI (acpi_id[0xa1] high level lint[0x1])
[    2.863370] ACPI: LAPIC_NMI (acpi_id[0xa2] high level lint[0x1])
[    2.863371] ACPI: LAPIC_NMI (acpi_id[0xa3] high level lint[0x1])
[    2.863372] ACPI: LAPIC_NMI (acpi_id[0xa4] high level lint[0x1])
[    2.863372] ACPI: LAPIC_NMI (acpi_id[0xa5] high level lint[0x1])
[    2.863373] ACPI: LAPIC_NMI (acpi_id[0xa6] high level lint[0x1])
[    2.863374] ACPI: LAPIC_NMI (acpi_id[0xa7] high level lint[0x1])
[    2.863374] ACPI: LAPIC_NMI (acpi_id[0xa8] high level lint[0x1])
[    2.863375] ACPI: LAPIC_NMI (acpi_id[0xa9] high level lint[0x1])
[    2.863376] ACPI: LAPIC_NMI (acpi_id[0xaa] high level lint[0x1])
[    2.863376] ACPI: LAPIC_NMI (acpi_id[0xab] high level lint[0x1])
[    2.863377] ACPI: LAPIC_NMI (acpi_id[0xac] high level lint[0x1])
[    2.863378] ACPI: LAPIC_NMI (acpi_id[0xad] high level lint[0x1])
[    2.863378] ACPI: LAPIC_NMI (acpi_id[0xae] high level lint[0x1])
[    2.863379] ACPI: LAPIC_NMI (acpi_id[0xaf] high level lint[0x1])
[    2.863379] ACPI: LAPIC_NMI (acpi_id[0xb0] high level lint[0x1])
[    2.863380] ACPI: LAPIC_NMI (acpi_id[0xb1] high level lint[0x1])
[    2.863381] ACPI: LAPIC_NMI (acpi_id[0xb2] high level lint[0x1])
[    2.863381] ACPI: LAPIC_NMI (acpi_id[0xb3] high level lint[0x1])
[    2.863382] ACPI: LAPIC_NMI (acpi_id[0xb4] high level lint[0x1])
[    2.863383] ACPI: LAPIC_NMI (acpi_id[0xb5] high level lint[0x1])
[    2.863383] ACPI: LAPIC_NMI (acpi_id[0xb6] high level lint[0x1])
[    2.863384] ACPI: LAPIC_NMI (acpi_id[0xb7] high level lint[0x1])
[    2.863385] ACPI: LAPIC_NMI (acpi_id[0xb8] high level lint[0x1])
[    2.863385] ACPI: LAPIC_NMI (acpi_id[0xb9] high level lint[0x1])
[    2.863386] ACPI: LAPIC_NMI (acpi_id[0xba] high level lint[0x1])
[    2.863387] ACPI: LAPIC_NMI (acpi_id[0xbb] high level lint[0x1])
[    2.863387] ACPI: LAPIC_NMI (acpi_id[0xbc] high level lint[0x1])
[    2.863388] ACPI: LAPIC_NMI (acpi_id[0xbd] high level lint[0x1])
[    2.863388] ACPI: LAPIC_NMI (acpi_id[0xbe] high level lint[0x1])
[    2.863389] ACPI: LAPIC_NMI (acpi_id[0xbf] high level lint[0x1])
[    2.863402] IOAPIC[0]: apic_id 8, version 32, address 0xfec00000, GSI 0-23
[    2.863406] IOAPIC[1]: apic_id 9, version 32, address 0xfec01000, GSI 24-47
[    2.863410] IOAPIC[2]: apic_id 10, version 32, address 0xfec40000, GSI 48-71
[    2.863414] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
[    2.863415] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
[    2.863423] Using ACPI (MADT) for SMP configuration information
[    2.863425] ACPI: HPET id: 0x8086a701 base: 0xfed00000
[    2.863429] ACPI: SPCR: SPCR table version 1
[    2.863431] ACPI: SPCR: console: uart,io,0x3f8,115200
[    2.863434] smpboot: Allowing 64 CPUs, 0 hotplug CPUs
[    2.863450] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
[    2.863452] PM: Registered nosave memory: [mem 0x0009c000-0x0009ffff]
[    2.863453] PM: Registered nosave memory: [mem 0x000a0000-0x000dffff]
[    2.863453] PM: Registered nosave memory: [mem 0x000e0000-0x000fffff]
[    2.863455] PM: Registered nosave memory: [mem 0x7a289000-0x7af0afff]
[    2.863455] PM: Registered nosave memory: [mem 0x7af0b000-0x7b93afff]
[    2.863456] PM: Registered nosave memory: [mem 0x7b93b000-0x7bab4fff]
[    2.863457] PM: Registered nosave memory: [mem 0x7bae9000-0x7bafefff]
[    2.863459] PM: Registered nosave memory: [mem 0x7bb00000-0x8fffffff]
[    2.863459] PM: Registered nosave memory: [mem 0x90000000-0xfeda7fff]
[    2.863460] PM: Registered nosave memory: [mem 0xfeda8000-0xfedabfff]
[    2.863460] PM: Registered nosave memory: [mem 0xfedac000-0xff30ffff]
[    2.863461] PM: Registered nosave memory: [mem 0xff310000-0xffffffff]
[    2.863463] [mem 0x90000000-0xfeda7fff] available for PCI devices
[    2.863464] Booting paravirtualized kernel on bare hardware
[    2.863468] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645519600211568 ns
[    2.948420] random: get_random_bytes called from start_kernel+0x94/0x515 with crng_init=0
[    2.948426] setup_percpu: NR_CPUS:512 nr_cpumask_bits:512 nr_cpu_ids:64 nr_node_ids:2
[    2.951454] percpu: Embedded 44 pages/cpu @(____ptrval____) s142936 r8192 d29096 u262144
[    2.951504] Built 2 zonelists, mobility grouping on.  Total pages: 132096953
[    2.951506] Policy zone: Normal
[    2.951507] Kernel command line: BOOT_IMAGE=/vmlinuz-5.0.0-bt9-amd64 root=/dev/mapper/vg0-root ro console=tty0 console=ttyS0,115200n8
[    2.951554] printk: log_buf_len individual max cpu contribution: 4096 bytes
[    2.951554] printk: log_buf_len total cpu_extra contributions: 258048 bytes
[    2.951555] printk: log_buf_len min size: 131072 bytes
[    2.951652] printk: log_buf_len: 524288 bytes
[    2.951653] printk: early log buf free: 90032(68%)
[    4.376929] Memory: 528260608K/536775012K available (10243K kernel code, 1164K rwdata, 3224K rodata, 1576K init, 2388K bss, 8514404K reserved, 0K cma-reserved)
[    4.377413] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=64, Nodes=2
[    4.377427] Kernel/User page tables isolation: enabled
[    4.377466] ftrace: allocating 31754 entries in 125 pages
[    4.390075] rcu: Hierarchical RCU implementation.
[    4.390077] rcu:     RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=64.
[    4.390078] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    4.390079] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=64
[    4.392626] NR_IRQS: 33024, nr_irqs: 1752, preallocated irqs: 16
[    4.400481] Console: colour VGA+ 80x25
[    4.466037] printk: console [tty0] enabled
[    8.319659] printk: console [ttyS0] enabled
[    8.324490] mempolicy: Enabling automatic NUMA balancing. Configure with numa_balancing= or the kernel.numa_balancing sysctl
[    8.337163] ACPI: Core revision 20181213
[    8.342695] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 133484882848 ns
[    8.353029] APIC: Switch to symmetric I/O mode setup
[    8.358685] DMAR: Host address width 46
[    8.363074] DMAR: DRHD base: 0x000000fbffc000 flags: 0x0
[    8.369118] DMAR: dmar0: reg_base_addr fbffc000 ver 1:0 cap d2078c106f0466 ecap f020df
[    8.378096] DMAR: DRHD base: 0x000000c7ffc000 flags: 0x1
[    8.384140] DMAR: dmar1: reg_base_addr c7ffc000 ver 1:0 cap d2078c106f0466 ecap f020df
[    8.393117] DMAR: RMRR base: 0x0000007ae07000 end: 0x0000007af06fff
[    8.400227] DMAR: ATSR flags: 0x0
[    8.404031] DMAR: ATSR flags: 0x0
[    8.407839] DMAR-IR: IOAPIC id 10 under DRHD base  0xfbffc000 IOMMU 0
[    8.415142] DMAR-IR: IOAPIC id 8 under DRHD base  0xc7ffc000 IOMMU 1
[    8.422340] DMAR-IR: IOAPIC id 9 under DRHD base  0xc7ffc000 IOMMU 1
[    8.429537] DMAR-IR: HPET id 0 under DRHD base 0xc7ffc000
[    8.435674] DMAR-IR: Queued invalidation will be enabled to support x2apic and Intr-remapping.
[    8.445630] DMAR-IR: IRQ remapping was enabled on dmar0 but we are not in kdump mode
[    8.454623] DMAR-IR: IRQ remapping was enabled on dmar1 but we are not in kdump mode
[    8.463530] DMAR-IR: Enabled IRQ remapping in x2apic mode
[    8.470263] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
[    8.497034] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x2127435b20e, max_idle_ns: 440795243721 ns
[    8.508921] Calibrating delay loop (skipped), value calculated using timer frequency.. 4600.03 BogoMIPS (lpj=9200060)
[    8.512914] pid_max: default: 65536 minimum: 512
[    8.517027] LSM: Security Framework initializing
[    8.520915] Yama: becoming mindful.
[    8.524983] AppArmor: AppArmor initialized
[    8.554114] Dentry cache hash table entries: 16777216 (order: 15, 134217728 bytes)
[    8.569642] Inode-cache hash table entries: 8388608 (order: 14, 67108864 bytes)
[    8.573300] Mount-cache hash table entries: 262144 (order: 9, 2097152 bytes)
[    8.577257] Mountpoint-cache hash table entries: 262144 (order: 9, 2097152 bytes)
[    8.581309] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
[    8.584915] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
[    8.588919] mce: CPU supports 22 MCE banks
[    8.592933] mce: CPU0: Thermal monitoring enabled (TM1)
[    8.600936] process: using mwait in idle threads
[    8.604916] Last level iTLB entries: 4KB 1024, 2MB 1024, 4MB 1024
[    8.608914] Last level dTLB entries: 4KB 1024, 2MB 1024, 4MB 1024, 1GB 4
[    8.612915] Spectre V2 : Mitigation: Full generic retpoline
[    8.616914] Spectre V2 : Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch
[    8.620914] Spectre V2 : Enabling Restricted Speculation for firmware calls
[    8.624922] Spectre V2 : mitigation: Enabling conditional Indirect Branch Prediction Barrier
[    8.628914] Spectre V2 : User space: Mitigation: STIBP via seccomp and prctl
[    8.632915] Speculative Store Bypass: Mitigation: Speculative Store Bypass disabled via prctl and seccomp
[    8.637107] Freeing SMP alternatives memory: 24K
[    8.645067] smpboot: CPU0: Intel(R) Xeon(R) CPU E5-2698 v3 @ 2.30GHz (family: 0x6, model: 0x3f, stepping: 0x2)
[    8.649065] Performance Events: PEBS fmt2+, Haswell events, 16-deep LBR, full-width counters, Intel PMU driver.
[    8.652919] ... version:                3
[    8.656914] ... bit width:              48
[    8.660914] ... generic registers:      4
[    8.664914] ... value mask:             0000ffffffffffff
[    8.668914] ... max period:             00007fffffffffff
[    8.672914] ... fixed-purpose events:   3
[    8.676914] ... event mask:             000000070000000f
[    8.680980] rcu: Hierarchical SRCU implementation.
[    8.689899] NMI watchdog: Enabled. Permanently consumes one hw-PMU counter.
[    8.693773] smp: Bringing up secondary CPUs ...
[    8.697033] x86: Booting SMP configuration:
[    8.700918] .... node  #1, CPUs:        #1
[    8.788916] .... node  #0, CPUs:    #2
[    8.792917] .... node  #1, CPUs:    #3
[    8.796916] .... node  #0, CPUs:    #4
[    8.800917] .... node  #1, CPUs:    #5
[    8.804916] .... node  #0, CPUs:    #6
[    8.808917] .... node  #1, CPUs:    #7
[    8.812915] .... node  #0, CPUs:    #8
[    8.816917] .... node  #1, CPUs:    #9
[    8.820916] .... node  #0, CPUs:   #10
[    8.824917] .... node  #1, CPUs:   #11
[    8.828916] .... node  #0, CPUs:   #12
[    8.832917] .... node  #1, CPUs:   #13
[    8.836916] .... node  #0, CPUs:   #14
[    8.840916] .... node  #1, CPUs:   #15
[    8.844916] .... node  #0, CPUs:   #16
[    8.848917] .... node  #1, CPUs:   #17
[    8.852916] .... node  #0, CPUs:   #18
[    8.856916] .... node  #1, CPUs:   #19
[    8.860916] .... node  #0, CPUs:   #20
[    8.864917] .... node  #1, CPUs:   #21
[    8.868916] .... node  #0, CPUs:   #22
[    8.872916] .... node  #1, CPUs:   #23
[    8.876916] .... node  #0, CPUs:   #24
[    8.880917] .... node  #1, CPUs:   #25
[    8.884915] .... node  #0, CPUs:   #26
[    8.888917] .... node  #1, CPUs:   #27
[    8.892915] .... node  #0, CPUs:   #28
[    8.896917] .... node  #1, CPUs:   #29
[    8.900916] .... node  #0, CPUs:   #30
[    8.904916] .... node  #1, CPUs:   #31
[    8.908915] .... node  #0, CPUs:   #32
[    8.912917] .... node  #1, CPUs:   #33
[    8.916916] .... node  #0, CPUs:   #34
[    8.920916] .... node  #1, CPUs:   #35
[    8.924916] .... node  #0, CPUs:   #36
[    8.928917] .... node  #1, CPUs:   #37
[    8.932916] .... node  #0, CPUs:   #38
[    8.936916] .... node  #1, CPUs:   #39
[    8.940916] .... node  #0, CPUs:   #40
[    8.944917] .... node  #1, CPUs:   #41
[    8.948916] .... node  #0, CPUs:   #42
[    8.952917] .... node  #1, CPUs:   #43
[    8.956916] .... node  #0, CPUs:   #44
[    8.960917] .... node  #1, CPUs:   #45
[    8.964916] .... node  #0, CPUs:   #46
[    8.968916] .... node  #1, CPUs:   #47
[    8.972916] .... node  #0, CPUs:   #48
[    8.976917] .... node  #1, CPUs:   #49
[    8.980916] .... node  #0, CPUs:   #50
[    8.984917] .... node  #1, CPUs:   #51
[    8.988916] .... node  #0, CPUs:   #52
[    8.992917] .... node  #1, CPUs:   #53
[    8.996916] .... node  #0, CPUs:   #54
[    9.000916] .... node  #1, CPUs:   #55
[    9.004916] .... node  #0, CPUs:   #56
[    9.008917] .... node  #1, CPUs:   #57
[    9.012915] .... node  #0, CPUs:   #58
[    9.016916] .... node  #1, CPUs:   #59
[    9.020916] .... node  #0, CPUs:   #60
[    9.024920] .... node  #1, CPUs:   #61
[    9.028916] .... node  #0, CPUs:   #62
[    9.032916] .... node  #1, CPUs:   #63
[    9.034440] smp: Brought up 2 nodes, 64 CPUs
[    9.040915] smpboot: Max logical packages: 2
[    9.044915] smpboot: Total of 64 processors activated (294440.57 BogoMIPS)
[    9.068964] devtmpfs: initialized
[    9.072792] x86/mm: Memory block size: 2048MB
[    9.079289] PM: Registering ACPI NVS region [mem 0x7af0b000-0x7b93afff] (10682368 bytes)
[    9.089377] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[    9.096977] futex hash table entries: 16384 (order: 8, 1048576 bytes)
[    9.105379] pinctrl core: initialized pinctrl subsystem
[    9.113200] NET: Registered protocol family 16
[    9.117011] audit: initializing netlink subsys (disabled)
[    9.124950] audit: type=2000 audit(1554390968.708:1): state=initialized audit_enabled=0 res=1
[    9.132920] cpuidle: using governor ladder
[    9.136928] cpuidle: using governor menu
[    9.144950] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it
[    9.152915] ACPI: bus type PCI registered
[    9.156915] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
[    9.165050] PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0x80000000-0x8fffffff] (base 0x80000000)
[    9.172938] PCI: MMCONFIG at [mem 0x80000000-0x8fffffff] reserved in E820
[    9.180926] PCI: Using configuration type 1 for base access
[    9.188924] PCI: Dell System detected, enabling pci=bfsort.
[    9.192932] core: PMU erratum BJ122, BV98, HSD29 worked around, HT is on
[    9.205024] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
[    9.212918] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[    9.221154] ACPI: Added _OSI(Module Device)
[    9.224917] ACPI: Added _OSI(Processor Device)
[    9.228918] ACPI: Added _OSI(3.0 _SCP Extensions)
[    9.236914] ACPI: Added _OSI(Processor Aggregator Device)
[    9.240915] ACPI: Added _OSI(Linux-Dell-Video)
[    9.248915] ACPI: Added _OSI(Linux-Lenovo-NV-HDMI-Audio)
[    9.252914] ACPI: Added _OSI(Linux-HPI-Hybrid-Graphics)
[    9.388453] ACPI: 4 ACPI AML tables successfully acquired and loaded
[    9.407927] ACPI: [Firmware Bug]: BIOS _OSI(Linux) query ignored
[    9.425992] ACPI: Interpreter enabled
[    9.428925] ACPI: (supports S0 S5)
[    9.432805] ACPI: Using IOAPIC for interrupt routing
[    9.436960] HEST: Table parsing has been initialized.
[    9.444917] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
[    9.453486] ACPI: Enabled 2 GPEs in block 00 to 3F
[    9.472627] ACPI: PCI Root Bridge [UNC1] (domain 0000 [bus ff])
[    9.480919] acpi PNP0A03:02: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
[    9.488978] acpi PNP0A03:02: PCIe AER handled by firmware
[    9.493027] acpi PNP0A03:02: _OSC: OS now controls [PCIeHotplug SHPCHotplug PME PCIeCapability LTR]
[    9.504915] acpi PNP0A03:02: FADT indicates ASPM is unsupported, using BIOS configuration
[    9.512947] PCI host bridge to bus 0000:ff
[    9.516916] pci_bus 0000:ff: root bus resource [bus ff]
[    9.528249] ACPI: PCI Root Bridge [UNC0] (domain 0000 [bus 7f])
[    9.532917] acpi PNP0A03:03: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
[    9.544984] acpi PNP0A03:03: PCIe AER handled by firmware
[    9.549040] acpi PNP0A03:03: _OSC: OS now controls [PCIeHotplug SHPCHotplug PME PCIeCapability LTR]
[    9.560915] acpi PNP0A03:03: FADT indicates ASPM is unsupported, using BIOS configuration
[    9.568957] PCI host bridge to bus 0000:7f
[    9.572916] pci_bus 0000:7f: root bus resource [bus 7f]
[    9.585809] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-7e])
[    9.592917] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
[    9.600971] acpi PNP0A08:00: PCIe AER handled by firmware
[    9.608977] acpi PNP0A08:00: _OSC: platform does not support [SHPCHotplug LTR]
[    9.617024] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME PCIeCapability]
[    9.624915] acpi PNP0A08:00: FADT indicates ASPM is unsupported, using BIOS configuration
[    9.633091] PCI host bridge to bus 0000:00
[    9.636916] pci_bus 0000:00: root bus resource [io  0x0000-0x03bb window]
[    9.644915] pci_bus 0000:00: root bus resource [io  0x03bc-0x03df window]
[    9.652916] pci_bus 0000:00: root bus resource [io  0x03e0-0x0cf7 window]
[    9.660915] pci_bus 0000:00: root bus resource [io  0x1000-0x7fff window]
[    9.668915] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
[    9.676915] pci_bus 0000:00: root bus resource [mem 0x90000000-0xc7ffbfff window]
[    9.684915] pci_bus 0000:00: root bus resource [mem 0x38000000000-0x3bfffffffff window]
[    9.696915] pci_bus 0000:00: root bus resource [bus 00-7e]
[    9.705243] pci 0000:00:01.0: PCI bridge to [bus 03]
[    9.712950] pci 0000:00:02.0: PCI bridge to [bus 04]
[    9.717158] pci 0000:01:00.0: VF(n) BAR0 space: [mem 0x92008000-0x92107fff 64bit pref] (contains BAR0 for 64 VFs)
[    9.728927] pci 0000:01:00.0: VF(n) BAR3 space: [mem 0x92108000-0x92207fff 64bit pref] (contains BAR3 for 64 VFs)
[    9.741252] pci 0000:01:00.1: VF(n) BAR0 space: [mem 0x91e04000-0x91f03fff 64bit pref] (contains BAR0 for 64 VFs)
[    9.752927] pci 0000:01:00.1: VF(n) BAR3 space: [mem 0x91f04000-0x92003fff 64bit pref] (contains BAR3 for 64 VFs)
[    9.765121] pci 0000:00:03.0: PCI bridge to [bus 01-02]
[    9.768943] pci 0000:00:03.2: PCI bridge to [bus 05]
[    9.776947] pci 0000:00:1c.0: PCI bridge to [bus 06]
[    9.781243] pci 0000:07:00.0: 8.000 Gb/s available PCIe bandwidth, limited by 5 GT/s x2 link at 0000:00:1c.4 (capable of 16.000 Gb/s with 5 GT/s x4 link)
[    9.797328] pci 0000:00:1c.4: PCI bridge to [bus 07]
[    9.818110] pci 0000:00:1c.7: PCI bridge to [bus 08-0c]
[    9.833093] pci 0000:08:00.0: PCI bridge to [bus 09-0c]
[    9.847869] pci 0000:09:00.0: PCI bridge to [bus 0a-0b]
[    9.854454] pci_bus 0000:0b: extended config space not accessible
[    9.866882] pci 0000:0a:00.0: PCI bridge to [bus 0b]
[    9.874313] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 9 10 11 12 14 *15)
[    9.880952] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 9 10 11 12 *14 15)
[    9.888949] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 7 9 10 *11 12 14 15)
[    9.896948] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 *6 7 9 10 11 12 14 15)
[    9.904948] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 9 10 11 12 14 15) *0, disabled.
[    9.916950] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 7 9 10 11 12 14 15) *0, disabled.
[    9.924949] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 7 9 10 11 12 14 15) *0, disabled.
[    9.936948] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 7 9 10 11 12 14 15) *0, disabled.
[    9.945126] ACPI: PCI Root Bridge [PCI1] (domain 0000 [bus 80-fe])
[    9.952917] acpi PNP0A08:01: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
[    9.960977] acpi PNP0A08:01: PCIe AER handled by firmware
[    9.969027] acpi PNP0A08:01: _OSC: OS now controls [PCIeHotplug SHPCHotplug PME PCIeCapability LTR]
[    9.976915] acpi PNP0A08:01: FADT indicates ASPM is unsupported, using BIOS configuration
[    9.985043] PCI host bridge to bus 0000:80
[    9.992916] pci_bus 0000:80: root bus resource [io  0x8000-0xffff window]
[   10.000915] pci_bus 0000:80: root bus resource [mem 0xc8000000-0xfbffbfff window]
[   10.008915] pci_bus 0000:80: root bus resource [mem 0x3c000000000-0x3ffffffffff window]
[   10.016917] pci_bus 0000:80: root bus resource [bus 80-fe]
[   10.036928] pci 0000:80:01.0: PCI bridge to [bus 81-82]
[   10.040959] pci_bus 0000:82: extended config space not accessible
[   10.049183] pci 0000:81:00.0: PCI bridge to [bus 82]
[   10.052973] pci 0000:80:03.0: PCI bridge to [bus 83]
[   10.061148] pci 0000:0b:00.0: vgaarb: setting as boot VGA device
[   10.064913] pci 0000:0b:00.0: vgaarb: VGA device added: decodes=io+mem,owns=io+mem,locks=none
[   10.076919] pci 0000:0b:00.0: vgaarb: bridge control possible
[   10.080914] vgaarb: loaded
[   10.084097] pps_core: LinuxPPS API ver. 1 registered
[   10.092915] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[   10.100916] PTP clock support registered
[   10.104938] EDAC MC: Ver: 3.0.0
[   10.109154] PCI: Using ACPI for IRQ routing
[   10.123448] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
[   10.128916] hpet0: 8 comparators, 64-bit 14.318180 MHz counter
[   10.139039] clocksource: Switched to clocksource tsc-early
[   10.153732] VFS: Disk quotas dquot_6.6.0
[   10.158244] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[   10.166171] AppArmor: AppArmor Filesystem Enabled
[   10.171530] pnp: PnP ACPI init
[   10.175557] system 00:01: [io  0x0500-0x053f] has been reserved
[   10.182269] system 00:01: [io  0x0400-0x047f] has been reserved
[   10.188978] system 00:01: [io  0x0540-0x057f] has been reserved
[   10.195688] system 00:01: [io  0x0600-0x061f] has been reserved
[   10.202396] system 00:01: [io  0x0ca0-0x0ca5] has been reserved
[   10.209104] system 00:01: [io  0x0880-0x0883] has been reserved
[   10.215812] system 00:01: [io  0x0800-0x081f] has been reserved
[   10.222521] system 00:01: [mem 0xfeda8000-0xfedcbfff] could not be reserved
[   10.230396] system 00:01: [mem 0xff000000-0xffffffff] could not be reserved
[   10.238271] system 00:01: [mem 0xfee00000-0xfeefffff] has been reserved
[   10.245757] system 00:01: [mem 0xfed12000-0xfed1200f] has been reserved
[   10.253242] system 00:01: [mem 0xfed12010-0xfed1201f] has been reserved
[   10.260728] system 00:01: [mem 0xfed1b000-0xfed1bfff] has been reserved
[   10.268566] system 00:04: [io  0x0ca8] has been reserved
[   10.274598] system 00:04: [io  0x0cac] has been reserved
[   10.280699] pnp: PnP ACPI: found 5 devices
[   10.291037] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
[   10.301078] pci 0000:03:00.0: can't claim BAR 6 [mem 0xfff00000-0xffffffff pref]: no compatible bridge window
[   10.312279] pci 0000:01:00.0: can't claim BAR 6 [mem 0xfff80000-0xffffffff pref]: no compatible bridge window
[   10.323480] pci 0000:01:00.1: can't claim BAR 6 [mem 0xfff80000-0xffffffff pref]: no compatible bridge window
[   10.334681] pci 0000:00:11.0: can't claim BAR 6 [mem 0xffff0000-0xffffffff pref]: no compatible bridge window
[   10.345882] pci 0000:07:00.0: can't claim BAR 6 [mem 0xfff80000-0xffffffff pref]: no compatible bridge window
[   10.357083] pci 0000:07:00.1: can't claim BAR 6 [mem 0xfff80000-0xffffffff pref]: no compatible bridge window
[   10.369082] pci 0000:00:03.0: BAR 14: assigned [mem 0x92800000-0x928fffff]
[   10.376863] pci 0000:00:11.0: BAR 6: assigned [mem 0x92710000-0x9271ffff pref]
[   10.385052] pci 0000:03:00.0: BAR 6: no space for [mem size 0x00100000 pref]
[   10.393024] pci 0000:03:00.0: BAR 6: failed to assign [mem size 0x00100000 pref]
[   10.401406] pci 0000:00:01.0: PCI bridge to [bus 03]
[   10.407046] pci 0000:00:01.0:   bridge window [io  0x2000-0x2fff]
[   10.413951] pci 0000:00:01.0:   bridge window [mem 0x92500000-0x926fffff]
[   10.421635] pci 0000:00:02.0: PCI bridge to [bus 04]
[   10.427279] pci 0000:01:00.0: BAR 6: assigned [mem 0x92800000-0x9287ffff pref]
[   10.435469] pci 0000:01:00.1: BAR 6: assigned [mem 0x92880000-0x928fffff pref]
[   10.443656] pci 0000:00:03.0: PCI bridge to [bus 01-02]
[   10.449589] pci 0000:00:03.0:   bridge window [mem 0x92800000-0x928fffff]
[   10.457271] pci 0000:00:03.0:   bridge window [mem 0x91a00000-0x922fffff 64bit pref]
[   10.466035] pci 0000:00:03.2: PCI bridge to [bus 05]
[   10.471679] pci 0000:00:1c.0: PCI bridge to [bus 06]
[   10.477329] pci 0000:07:00.0: BAR 6: assigned [mem 0x92480000-0x924fffff pref]
[   10.485518] pci 0000:07:00.1: BAR 6: no space for [mem size 0x00080000 pref]
[   10.493489] pci 0000:07:00.1: BAR 6: failed to assign [mem size 0x00080000 pref]
[   10.501870] pci 0000:00:1c.4: PCI bridge to [bus 07]
[   10.507511] pci 0000:00:1c.4:   bridge window [mem 0x92300000-0x924fffff]
[   10.515209] pci 0000:0a:00.0: PCI bridge to [bus 0b]
[   10.520998] pci 0000:0a:00.0:   bridge window [mem 0x91000000-0x918fffff]
[   10.528773] pci 0000:0a:00.0:   bridge window [mem 0x90000000-0x90ffffff 64bit pref]
[   10.537744] pci 0000:09:00.0: PCI bridge to [bus 0a-0b]
[   10.543820] pci 0000:09:00.0:   bridge window [mem 0x91000000-0x918fffff]
[   10.551595] pci 0000:09:00.0:   bridge window [mem 0x90000000-0x90ffffff 64bit pref]
[   10.560566] pci 0000:08:00.0: PCI bridge to [bus 09-0c]
[   10.566629] pci 0000:08:00.0:   bridge window [mem 0x91000000-0x919fffff]
[   10.574392] pci 0000:08:00.0:   bridge window [mem 0x90000000-0x90ffffff 64bit pref]
[   10.583383] pci 0000:00:1c.7: PCI bridge to [bus 08-0c]
[   10.589317] pci 0000:00:1c.7:   bridge window [mem 0x91000000-0x919fffff]
[   10.596999] pci 0000:00:1c.7:   bridge window [mem 0x90000000-0x90ffffff 64bit pref]
[   10.605855] pci 0000:81:00.0: PCI bridge to [bus 82]
[   10.611500] pci 0000:81:00.0:   bridge window [mem 0xc8000000-0xc80fffff]
[   10.619189] pci 0000:80:01.0: PCI bridge to [bus 81-82]
[   10.625122] pci 0000:80:01.0:   bridge window [mem 0xc8000000-0xc80fffff]
[   10.632806] pci 0000:80:03.0: PCI bridge to [bus 83]
[   10.638536] NET: Registered protocol family 2
[   10.643793] tcp_listen_portaddr_hash hash table entries: 65536 (order: 8, 1048576 bytes)
[   10.653202] TCP established hash table entries: 524288 (order: 10, 4194304 bytes)
[   10.662260] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
[   10.669978] TCP: Hash tables configured (established 524288 bind 65536)
[   10.677668] UDP hash table entries: 65536 (order: 9, 2097152 bytes)
[   10.685088] UDP-Lite hash table entries: 65536 (order: 9, 2097152 bytes)
[   10.693242] NET: Registered protocol family 1
[   10.698240] DEBUG: Passed quirk_usb_early_handoff 1300
[   10.704271] DEBUG: Passed quirk_usb_early_handoff 1308
[   10.710206] DEBUG: Passed quirk_usb_disable_ehci 939
[   10.715949] DEBUG: Passed quirk_usb_disable_ehci 945
[   10.721685] DEBUG: Passed quirk_usb_disable_ehci 950
[   10.727423] DEBUG: Passed quirk_usb_disable_ehci 958
[   10.733160] DEBUG: Passed quirk_usb_disable_ehci 964
[   10.738897] DEBUG: Passed quirk_usb_disable_ehci 968
[   10.744633] DEBUG: Passed ehci_bios_handoff 849
[   10.749884] DEBUG: Passed ehci_bios_handoff 884

[-- Attachment #3: pci-quirks.c --]
[-- Type: text/x-csrc, Size: 36804 bytes --]

// SPDX-License-Identifier: GPL-2.0
/*
 * This file contains code to reset and initialize USB host controllers.
 * Some of it includes work-arounds for PCI hardware and BIOS quirks.
 * It may need to run early during booting -- before USB would normally
 * initialize -- to ensure that Linux doesn't use any legacy modes.
 *
 *  Copyright (c) 1999 Martin Mares <mj@ucw.cz>
 *  (and others)
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/export.h>
#include <linux/acpi.h>
#include <linux/dmi.h>
#include "pci-quirks.h"
#include "xhci-ext-caps.h"


#define UHCI_USBLEGSUP		0xc0		/* legacy support */
#define UHCI_USBCMD		0		/* command register */
#define UHCI_USBINTR		4		/* interrupt register */
#define UHCI_USBLEGSUP_RWC	0x8f00		/* the R/WC bits */
#define UHCI_USBLEGSUP_RO	0x5040		/* R/O and reserved bits */
#define UHCI_USBCMD_RUN		0x0001		/* RUN/STOP bit */
#define UHCI_USBCMD_HCRESET	0x0002		/* Host Controller reset */
#define UHCI_USBCMD_EGSM	0x0008		/* Global Suspend Mode */
#define UHCI_USBCMD_CONFIGURE	0x0040		/* Config Flag */
#define UHCI_USBINTR_RESUME	0x0002		/* Resume interrupt enable */

#define OHCI_CONTROL		0x04
#define OHCI_CMDSTATUS		0x08
#define OHCI_INTRSTATUS		0x0c
#define OHCI_INTRENABLE		0x10
#define OHCI_INTRDISABLE	0x14
#define OHCI_FMINTERVAL		0x34
#define OHCI_HCFS		(3 << 6)	/* hc functional state */
#define OHCI_HCR		(1 << 0)	/* host controller reset */
#define OHCI_OCR		(1 << 3)	/* ownership change request */
#define OHCI_CTRL_RWC		(1 << 9)	/* remote wakeup connected */
#define OHCI_CTRL_IR		(1 << 8)	/* interrupt routing */
#define OHCI_INTR_OC		(1 << 30)	/* ownership change */

#define EHCI_HCC_PARAMS		0x08		/* extended capabilities */
#define EHCI_USBCMD		0		/* command register */
#define EHCI_USBCMD_RUN		(1 << 0)	/* RUN/STOP bit */
#define EHCI_USBSTS		4		/* status register */
#define EHCI_USBSTS_HALTED	(1 << 12)	/* HCHalted bit */
#define EHCI_USBINTR		8		/* interrupt register */
#define EHCI_CONFIGFLAG		0x40		/* configured flag register */
#define EHCI_USBLEGSUP		0		/* legacy support register */
#define EHCI_USBLEGSUP_BIOS	(1 << 16)	/* BIOS semaphore */
#define EHCI_USBLEGSUP_OS	(1 << 24)	/* OS semaphore */
#define EHCI_USBLEGCTLSTS	4		/* legacy control/status */
#define EHCI_USBLEGCTLSTS_SOOE	(1 << 13)	/* SMI on ownership change */

/* AMD quirk use */
#define	AB_REG_BAR_LOW		0xe0
#define	AB_REG_BAR_HIGH		0xe1
#define	AB_REG_BAR_SB700	0xf0
#define	AB_INDX(addr)		((addr) + 0x00)
#define	AB_DATA(addr)		((addr) + 0x04)
#define	AX_INDXC		0x30
#define	AX_DATAC		0x34

#define PT_ADDR_INDX		0xE8
#define PT_READ_INDX		0xE4
#define PT_SIG_1_ADDR		0xA520
#define PT_SIG_2_ADDR		0xA521
#define PT_SIG_3_ADDR		0xA522
#define PT_SIG_4_ADDR		0xA523
#define PT_SIG_1_DATA		0x78
#define PT_SIG_2_DATA		0x56
#define PT_SIG_3_DATA		0x34
#define PT_SIG_4_DATA		0x12
#define PT4_P1_REG		0xB521
#define PT4_P2_REG		0xB522
#define PT2_P1_REG		0xD520
#define PT2_P2_REG		0xD521
#define PT1_P1_REG		0xD522
#define PT1_P2_REG		0xD523

#define	NB_PCIE_INDX_ADDR	0xe0
#define	NB_PCIE_INDX_DATA	0xe4
#define	PCIE_P_CNTL		0x10040
#define	BIF_NB			0x10002
#define	NB_PIF0_PWRDOWN_0	0x01100012
#define	NB_PIF0_PWRDOWN_1	0x01100013

#define USB_INTEL_XUSB2PR      0xD0
#define USB_INTEL_USB2PRM      0xD4
#define USB_INTEL_USB3_PSSEN   0xD8
#define USB_INTEL_USB3PRM      0xDC

/* ASMEDIA quirk use */
#define ASMT_DATA_WRITE0_REG	0xF8
#define ASMT_DATA_WRITE1_REG	0xFC
#define ASMT_CONTROL_REG	0xE0
#define ASMT_CONTROL_WRITE_BIT	0x02
#define ASMT_WRITEREG_CMD	0x10423
#define ASMT_FLOWCTL_ADDR	0xFA30
#define ASMT_FLOWCTL_DATA	0xBA
#define ASMT_PSEUDO_DATA	0

/*
 * amd_chipset_gen values represent AMD different chipset generations
 */
enum amd_chipset_gen {
	NOT_AMD_CHIPSET = 0,
	AMD_CHIPSET_SB600,
	AMD_CHIPSET_SB700,
	AMD_CHIPSET_SB800,
	AMD_CHIPSET_HUDSON2,
	AMD_CHIPSET_BOLTON,
	AMD_CHIPSET_YANGTZE,
	AMD_CHIPSET_TAISHAN,
	AMD_CHIPSET_UNKNOWN,
};

struct amd_chipset_type {
	enum amd_chipset_gen gen;
	u8 rev;
};

static struct amd_chipset_info {
	struct pci_dev	*nb_dev;
	struct pci_dev	*smbus_dev;
	int nb_type;
	struct amd_chipset_type sb_type;
	int isoc_reqs;
	int probe_count;
	int probe_result;
} amd_chipset;

static DEFINE_SPINLOCK(amd_lock);

/*
 * amd_chipset_sb_type_init - initialize amd chipset southbridge type
 *
 * AMD FCH/SB generation and revision is identified by SMBus controller
 * vendor, device and revision IDs.
 *
 * Returns: 1 if it is an AMD chipset, 0 otherwise.
 */
static int amd_chipset_sb_type_init(struct amd_chipset_info *pinfo)
{
	u8 rev = 0;
	pinfo->sb_type.gen = AMD_CHIPSET_UNKNOWN;

	pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI,
			PCI_DEVICE_ID_ATI_SBX00_SMBUS, NULL);
	if (pinfo->smbus_dev) {
		rev = pinfo->smbus_dev->revision;
		if (rev >= 0x10 && rev <= 0x1f)
			pinfo->sb_type.gen = AMD_CHIPSET_SB600;
		else if (rev >= 0x30 && rev <= 0x3f)
			pinfo->sb_type.gen = AMD_CHIPSET_SB700;
		else if (rev >= 0x40 && rev <= 0x4f)
			pinfo->sb_type.gen = AMD_CHIPSET_SB800;
	} else {
		pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
				PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);

		if (pinfo->smbus_dev) {
			rev = pinfo->smbus_dev->revision;
			if (rev >= 0x11 && rev <= 0x14)
				pinfo->sb_type.gen = AMD_CHIPSET_HUDSON2;
			else if (rev >= 0x15 && rev <= 0x18)
				pinfo->sb_type.gen = AMD_CHIPSET_BOLTON;
			else if (rev >= 0x39 && rev <= 0x3a)
				pinfo->sb_type.gen = AMD_CHIPSET_YANGTZE;
		} else {
			pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
							  0x145c, NULL);
			if (pinfo->smbus_dev) {
				rev = pinfo->smbus_dev->revision;
				pinfo->sb_type.gen = AMD_CHIPSET_TAISHAN;
			} else {
				pinfo->sb_type.gen = NOT_AMD_CHIPSET;
				return 0;
			}
		}
	}
	pinfo->sb_type.rev = rev;
	return 1;
}

void sb800_prefetch(struct device *dev, int on)
{
	u16 misc;
	struct pci_dev *pdev = to_pci_dev(dev);

	pci_read_config_word(pdev, 0x50, &misc);
	if (on == 0)
		pci_write_config_word(pdev, 0x50, misc & 0xfcff);
	else
		pci_write_config_word(pdev, 0x50, misc | 0x0300);
}
EXPORT_SYMBOL_GPL(sb800_prefetch);

int usb_amd_find_chipset_info(void)
{
	unsigned long flags;
	struct amd_chipset_info info;
	int ret;

	spin_lock_irqsave(&amd_lock, flags);

	/* probe only once */
	if (amd_chipset.probe_count > 0) {
		amd_chipset.probe_count++;
		spin_unlock_irqrestore(&amd_lock, flags);
		return amd_chipset.probe_result;
	}
	memset(&info, 0, sizeof(info));
	spin_unlock_irqrestore(&amd_lock, flags);

	if (!amd_chipset_sb_type_init(&info)) {
		ret = 0;
		goto commit;
	}

	/* Below chipset generations needn't enable AMD PLL quirk */
	if (info.sb_type.gen == AMD_CHIPSET_UNKNOWN ||
			info.sb_type.gen == AMD_CHIPSET_SB600 ||
			info.sb_type.gen == AMD_CHIPSET_YANGTZE ||
			(info.sb_type.gen == AMD_CHIPSET_SB700 &&
			info.sb_type.rev > 0x3b)) {
		if (info.smbus_dev) {
			pci_dev_put(info.smbus_dev);
			info.smbus_dev = NULL;
		}
		ret = 0;
		goto commit;
	}

	info.nb_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x9601, NULL);
	if (info.nb_dev) {
		info.nb_type = 1;
	} else {
		info.nb_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x1510, NULL);
		if (info.nb_dev) {
			info.nb_type = 2;
		} else {
			info.nb_dev = pci_get_device(PCI_VENDOR_ID_AMD,
						     0x9600, NULL);
			if (info.nb_dev)
				info.nb_type = 3;
		}
	}

	ret = info.probe_result = 1;
	printk(KERN_DEBUG "QUIRK: Enable AMD PLL fix\n");

commit:

	spin_lock_irqsave(&amd_lock, flags);
	if (amd_chipset.probe_count > 0) {
		/* race - someone else was faster - drop devices */

		/* Mark that we where here */
		amd_chipset.probe_count++;
		ret = amd_chipset.probe_result;

		spin_unlock_irqrestore(&amd_lock, flags);

		pci_dev_put(info.nb_dev);
		pci_dev_put(info.smbus_dev);

	} else {
		/* no race - commit the result */
		info.probe_count++;
		amd_chipset = info;
		spin_unlock_irqrestore(&amd_lock, flags);
	}

	return ret;
}
EXPORT_SYMBOL_GPL(usb_amd_find_chipset_info);

int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *pdev)
{
	/* Make sure amd chipset type has already been initialized */
	usb_amd_find_chipset_info();
	if (amd_chipset.sb_type.gen == AMD_CHIPSET_YANGTZE ||
	    amd_chipset.sb_type.gen == AMD_CHIPSET_TAISHAN) {
		dev_dbg(&pdev->dev, "QUIRK: Enable AMD remote wakeup fix\n");
		return 1;
	}
	return 0;
}
EXPORT_SYMBOL_GPL(usb_hcd_amd_remote_wakeup_quirk);

bool usb_amd_hang_symptom_quirk(void)
{
	u8 rev;

	usb_amd_find_chipset_info();
	rev = amd_chipset.sb_type.rev;
	/* SB600 and old version of SB700 have hang symptom bug */
	return amd_chipset.sb_type.gen == AMD_CHIPSET_SB600 ||
			(amd_chipset.sb_type.gen == AMD_CHIPSET_SB700 &&
			 rev >= 0x3a && rev <= 0x3b);
}
EXPORT_SYMBOL_GPL(usb_amd_hang_symptom_quirk);

bool usb_amd_prefetch_quirk(void)
{
	usb_amd_find_chipset_info();
	/* SB800 needs pre-fetch fix */
	return amd_chipset.sb_type.gen == AMD_CHIPSET_SB800;
}
EXPORT_SYMBOL_GPL(usb_amd_prefetch_quirk);

/*
 * The hardware normally enables the A-link power management feature, which
 * lets the system lower the power consumption in idle states.
 *
 * This USB quirk prevents the link going into that lower power state
 * during isochronous transfers.
 *
 * Without this quirk, isochronous stream on OHCI/EHCI/xHCI controllers of
 * some AMD platforms may stutter or have breaks occasionally.
 */
static void usb_amd_quirk_pll(int disable)
{
	u32 addr, addr_low, addr_high, val;
	u32 bit = disable ? 0 : 1;
	unsigned long flags;

	spin_lock_irqsave(&amd_lock, flags);

	if (disable) {
		amd_chipset.isoc_reqs++;
		if (amd_chipset.isoc_reqs > 1) {
			spin_unlock_irqrestore(&amd_lock, flags);
			return;
		}
	} else {
		amd_chipset.isoc_reqs--;
		if (amd_chipset.isoc_reqs > 0) {
			spin_unlock_irqrestore(&amd_lock, flags);
			return;
		}
	}

	if (amd_chipset.sb_type.gen == AMD_CHIPSET_SB800 ||
			amd_chipset.sb_type.gen == AMD_CHIPSET_HUDSON2 ||
			amd_chipset.sb_type.gen == AMD_CHIPSET_BOLTON) {
		outb_p(AB_REG_BAR_LOW, 0xcd6);
		addr_low = inb_p(0xcd7);
		outb_p(AB_REG_BAR_HIGH, 0xcd6);
		addr_high = inb_p(0xcd7);
		addr = addr_high << 8 | addr_low;

		outl_p(0x30, AB_INDX(addr));
		outl_p(0x40, AB_DATA(addr));
		outl_p(0x34, AB_INDX(addr));
		val = inl_p(AB_DATA(addr));
	} else if (amd_chipset.sb_type.gen == AMD_CHIPSET_SB700 &&
			amd_chipset.sb_type.rev <= 0x3b) {
		pci_read_config_dword(amd_chipset.smbus_dev,
					AB_REG_BAR_SB700, &addr);
		outl(AX_INDXC, AB_INDX(addr));
		outl(0x40, AB_DATA(addr));
		outl(AX_DATAC, AB_INDX(addr));
		val = inl(AB_DATA(addr));
	} else {
		spin_unlock_irqrestore(&amd_lock, flags);
		return;
	}

	if (disable) {
		val &= ~0x08;
		val |= (1 << 4) | (1 << 9);
	} else {
		val |= 0x08;
		val &= ~((1 << 4) | (1 << 9));
	}
	outl_p(val, AB_DATA(addr));

	if (!amd_chipset.nb_dev) {
		spin_unlock_irqrestore(&amd_lock, flags);
		return;
	}

	if (amd_chipset.nb_type == 1 || amd_chipset.nb_type == 3) {
		addr = PCIE_P_CNTL;
		pci_write_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_ADDR, addr);
		pci_read_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_DATA, &val);

		val &= ~(1 | (1 << 3) | (1 << 4) | (1 << 9) | (1 << 12));
		val |= bit | (bit << 3) | (bit << 12);
		val |= ((!bit) << 4) | ((!bit) << 9);
		pci_write_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_DATA, val);

		addr = BIF_NB;
		pci_write_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_ADDR, addr);
		pci_read_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_DATA, &val);
		val &= ~(1 << 8);
		val |= bit << 8;

		pci_write_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_DATA, val);
	} else if (amd_chipset.nb_type == 2) {
		addr = NB_PIF0_PWRDOWN_0;
		pci_write_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_ADDR, addr);
		pci_read_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_DATA, &val);
		if (disable)
			val &= ~(0x3f << 7);
		else
			val |= 0x3f << 7;

		pci_write_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_DATA, val);

		addr = NB_PIF0_PWRDOWN_1;
		pci_write_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_ADDR, addr);
		pci_read_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_DATA, &val);
		if (disable)
			val &= ~(0x3f << 7);
		else
			val |= 0x3f << 7;

		pci_write_config_dword(amd_chipset.nb_dev,
					NB_PCIE_INDX_DATA, val);
	}

	spin_unlock_irqrestore(&amd_lock, flags);
	return;
}

void usb_amd_quirk_pll_disable(void)
{
	usb_amd_quirk_pll(1);
}
EXPORT_SYMBOL_GPL(usb_amd_quirk_pll_disable);

static int usb_asmedia_wait_write(struct pci_dev *pdev)
{
	unsigned long retry_count;
	unsigned char value;

	for (retry_count = 1000; retry_count > 0; --retry_count) {

		pci_read_config_byte(pdev, ASMT_CONTROL_REG, &value);

		if (value == 0xff) {
			dev_err(&pdev->dev, "%s: check_ready ERROR", __func__);
			return -EIO;
		}

		if ((value & ASMT_CONTROL_WRITE_BIT) == 0)
			return 0;

		udelay(50);
	}

	dev_warn(&pdev->dev, "%s: check_write_ready timeout", __func__);
	return -ETIMEDOUT;
}

void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev)
{
	if (usb_asmedia_wait_write(pdev) != 0)
		return;

	/* send command and address to device */
	pci_write_config_dword(pdev, ASMT_DATA_WRITE0_REG, ASMT_WRITEREG_CMD);
	pci_write_config_dword(pdev, ASMT_DATA_WRITE1_REG, ASMT_FLOWCTL_ADDR);
	pci_write_config_byte(pdev, ASMT_CONTROL_REG, ASMT_CONTROL_WRITE_BIT);

	if (usb_asmedia_wait_write(pdev) != 0)
		return;

	/* send data to device */
	pci_write_config_dword(pdev, ASMT_DATA_WRITE0_REG, ASMT_FLOWCTL_DATA);
	pci_write_config_dword(pdev, ASMT_DATA_WRITE1_REG, ASMT_PSEUDO_DATA);
	pci_write_config_byte(pdev, ASMT_CONTROL_REG, ASMT_CONTROL_WRITE_BIT);
}
EXPORT_SYMBOL_GPL(usb_asmedia_modifyflowcontrol);

void usb_amd_quirk_pll_enable(void)
{
	usb_amd_quirk_pll(0);
}
EXPORT_SYMBOL_GPL(usb_amd_quirk_pll_enable);

void usb_amd_dev_put(void)
{
	struct pci_dev *nb, *smbus;
	unsigned long flags;

	spin_lock_irqsave(&amd_lock, flags);

	amd_chipset.probe_count--;
	if (amd_chipset.probe_count > 0) {
		spin_unlock_irqrestore(&amd_lock, flags);
		return;
	}

	/* save them to pci_dev_put outside of spinlock */
	nb    = amd_chipset.nb_dev;
	smbus = amd_chipset.smbus_dev;

	amd_chipset.nb_dev = NULL;
	amd_chipset.smbus_dev = NULL;
	amd_chipset.nb_type = 0;
	memset(&amd_chipset.sb_type, 0, sizeof(amd_chipset.sb_type));
	amd_chipset.isoc_reqs = 0;
	amd_chipset.probe_result = 0;

	spin_unlock_irqrestore(&amd_lock, flags);

	pci_dev_put(nb);
	pci_dev_put(smbus);
}
EXPORT_SYMBOL_GPL(usb_amd_dev_put);

/*
 * Check if port is disabled in BIOS on AMD Promontory host.
 * BIOS Disabled ports may wake on connect/disconnect and need
 * driver workaround to keep them disabled.
 * Returns true if port is marked disabled.
 */
bool usb_amd_pt_check_port(struct device *device, int port)
{
	unsigned char value, port_shift;
	struct pci_dev *pdev;
	u16 reg;

	pdev = to_pci_dev(device);
	pci_write_config_word(pdev, PT_ADDR_INDX, PT_SIG_1_ADDR);

	pci_read_config_byte(pdev, PT_READ_INDX, &value);
	if (value != PT_SIG_1_DATA)
		return false;

	pci_write_config_word(pdev, PT_ADDR_INDX, PT_SIG_2_ADDR);

	pci_read_config_byte(pdev, PT_READ_INDX, &value);
	if (value != PT_SIG_2_DATA)
		return false;

	pci_write_config_word(pdev, PT_ADDR_INDX, PT_SIG_3_ADDR);

	pci_read_config_byte(pdev, PT_READ_INDX, &value);
	if (value != PT_SIG_3_DATA)
		return false;

	pci_write_config_word(pdev, PT_ADDR_INDX, PT_SIG_4_ADDR);

	pci_read_config_byte(pdev, PT_READ_INDX, &value);
	if (value != PT_SIG_4_DATA)
		return false;

	/* Check disabled port setting, if bit is set port is enabled */
	switch (pdev->device) {
	case 0x43b9:
	case 0x43ba:
	/*
	 * device is AMD_PROMONTORYA_4(0x43b9) or PROMONTORYA_3(0x43ba)
	 * PT4_P1_REG bits[7..1] represents USB2.0 ports 6 to 0
	 * PT4_P2_REG bits[6..0] represents ports 13 to 7
	 */
		if (port > 6) {
			reg = PT4_P2_REG;
			port_shift = port - 7;
		} else {
			reg = PT4_P1_REG;
			port_shift = port + 1;
		}
		break;
	case 0x43bb:
	/*
	 * device is AMD_PROMONTORYA_2(0x43bb)
	 * PT2_P1_REG bits[7..5] represents USB2.0 ports 2 to 0
	 * PT2_P2_REG bits[5..0] represents ports 9 to 3
	 */
		if (port > 2) {
			reg = PT2_P2_REG;
			port_shift = port - 3;
		} else {
			reg = PT2_P1_REG;
			port_shift = port + 5;
		}
		break;
	case 0x43bc:
	/*
	 * device is AMD_PROMONTORYA_1(0x43bc)
	 * PT1_P1_REG[7..4] represents USB2.0 ports 3 to 0
	 * PT1_P2_REG[5..0] represents ports 9 to 4
	 */
		if (port > 3) {
			reg = PT1_P2_REG;
			port_shift = port - 4;
		} else {
			reg = PT1_P1_REG;
			port_shift = port + 4;
		}
		break;
	default:
		return false;
	}
	pci_write_config_word(pdev, PT_ADDR_INDX, reg);
	pci_read_config_byte(pdev, PT_READ_INDX, &value);

	return !(value & BIT(port_shift));
}
EXPORT_SYMBOL_GPL(usb_amd_pt_check_port);

/*
 * Make sure the controller is completely inactive, unable to
 * generate interrupts or do DMA.
 */
void uhci_reset_hc(struct pci_dev *pdev, unsigned long base)
{
	/* Turn off PIRQ enable and SMI enable.  (This also turns off the
	 * BIOS's USB Legacy Support.)  Turn off all the R/WC bits too.
	 */
	pci_write_config_word(pdev, UHCI_USBLEGSUP, UHCI_USBLEGSUP_RWC);

	/* Reset the HC - this will force us to get a
	 * new notification of any already connected
	 * ports due to the virtual disconnect that it
	 * implies.
	 */
	outw(UHCI_USBCMD_HCRESET, base + UHCI_USBCMD);
	mb();
	udelay(5);
	if (inw(base + UHCI_USBCMD) & UHCI_USBCMD_HCRESET)
		dev_warn(&pdev->dev, "HCRESET not completed yet!\n");

	/* Just to be safe, disable interrupt requests and
	 * make sure the controller is stopped.
	 */
	outw(0, base + UHCI_USBINTR);
	outw(0, base + UHCI_USBCMD);
}
EXPORT_SYMBOL_GPL(uhci_reset_hc);

/*
 * Initialize a controller that was newly discovered or has just been
 * resumed.  In either case we can't be sure of its previous state.
 *
 * Returns: 1 if the controller was reset, 0 otherwise.
 */
int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base)
{
	u16 legsup;
	unsigned int cmd, intr;

	/*
	 * When restarting a suspended controller, we expect all the
	 * settings to be the same as we left them:
	 *
	 *	PIRQ and SMI disabled, no R/W bits set in USBLEGSUP;
	 *	Controller is stopped and configured with EGSM set;
	 *	No interrupts enabled except possibly Resume Detect.
	 *
	 * If any of these conditions are violated we do a complete reset.
	 */
	pci_read_config_word(pdev, UHCI_USBLEGSUP, &legsup);
	if (legsup & ~(UHCI_USBLEGSUP_RO | UHCI_USBLEGSUP_RWC)) {
		dev_dbg(&pdev->dev, "%s: legsup = 0x%04x\n",
				__func__, legsup);
		goto reset_needed;
	}

	cmd = inw(base + UHCI_USBCMD);
	if ((cmd & UHCI_USBCMD_RUN) || !(cmd & UHCI_USBCMD_CONFIGURE) ||
			!(cmd & UHCI_USBCMD_EGSM)) {
		dev_dbg(&pdev->dev, "%s: cmd = 0x%04x\n",
				__func__, cmd);
		goto reset_needed;
	}

	intr = inw(base + UHCI_USBINTR);
	if (intr & (~UHCI_USBINTR_RESUME)) {
		dev_dbg(&pdev->dev, "%s: intr = 0x%04x\n",
				__func__, intr);
		goto reset_needed;
	}
	return 0;

reset_needed:
	dev_dbg(&pdev->dev, "Performing full reset\n");
	uhci_reset_hc(pdev, base);
	return 1;
}
EXPORT_SYMBOL_GPL(uhci_check_and_reset_hc);

static inline int io_type_enabled(struct pci_dev *pdev, unsigned int mask)
{
	u16 cmd;
	return !pci_read_config_word(pdev, PCI_COMMAND, &cmd) && (cmd & mask);
}

#define pio_enabled(dev) io_type_enabled(dev, PCI_COMMAND_IO)
#define mmio_enabled(dev) io_type_enabled(dev, PCI_COMMAND_MEMORY)

static void quirk_usb_handoff_uhci(struct pci_dev *pdev)
{
	unsigned long base = 0;
	int i;

	if (!pio_enabled(pdev))
		return;

	for (i = 0; i < PCI_ROM_RESOURCE; i++)
		if ((pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
			base = pci_resource_start(pdev, i);
			break;
		}

	if (base)
		uhci_check_and_reset_hc(pdev, base);
}

static int mmio_resource_enabled(struct pci_dev *pdev, int idx)
{
	return pci_resource_start(pdev, idx) && mmio_enabled(pdev);
}

static void quirk_usb_handoff_ohci(struct pci_dev *pdev)
{
	void __iomem *base;
	u32 control;
	u32 fminterval = 0;
	bool no_fminterval = false;
	int cnt;

	if (!mmio_resource_enabled(pdev, 0))
		return;

	base = pci_ioremap_bar(pdev, 0);
	if (base == NULL)
		return;

	/*
	 * ULi M5237 OHCI controller locks the whole system when accessing
	 * the OHCI_FMINTERVAL offset.
	 */
	if (pdev->vendor == PCI_VENDOR_ID_AL && pdev->device == 0x5237)
		no_fminterval = true;

	control = readl(base + OHCI_CONTROL);

/* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
#ifdef __hppa__
#define	OHCI_CTRL_MASK		(OHCI_CTRL_RWC | OHCI_CTRL_IR)
#else
#define	OHCI_CTRL_MASK		OHCI_CTRL_RWC

	if (control & OHCI_CTRL_IR) {
		int wait_time = 500; /* arbitrary; 5 seconds */
		writel(OHCI_INTR_OC, base + OHCI_INTRENABLE);
		writel(OHCI_OCR, base + OHCI_CMDSTATUS);
		while (wait_time > 0 &&
				readl(base + OHCI_CONTROL) & OHCI_CTRL_IR) {
			wait_time -= 10;
			msleep(10);
		}
		if (wait_time <= 0)
			dev_warn(&pdev->dev,
				 "OHCI: BIOS handoff failed (BIOS bug?) %08x\n",
				 readl(base + OHCI_CONTROL));
	}
#endif

	/* disable interrupts */
	writel((u32) ~0, base + OHCI_INTRDISABLE);

	/* Go into the USB_RESET state, preserving RWC (and possibly IR) */
	writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
	readl(base + OHCI_CONTROL);

	/* software reset of the controller, preserving HcFmInterval */
	if (!no_fminterval)
		fminterval = readl(base + OHCI_FMINTERVAL);

	writel(OHCI_HCR, base + OHCI_CMDSTATUS);

	/* reset requires max 10 us delay */
	for (cnt = 30; cnt > 0; --cnt) {	/* ... allow extra time */
		if ((readl(base + OHCI_CMDSTATUS) & OHCI_HCR) == 0)
			break;
		udelay(1);
	}

	if (!no_fminterval)
		writel(fminterval, base + OHCI_FMINTERVAL);

	/* Now the controller is safely in SUSPEND and nothing can wake it up */
	iounmap(base);
}

static const struct dmi_system_id ehci_dmi_nohandoff_table[] = {
	{
		/*  Pegatron Lucid (ExoPC) */
		.matches = {
			DMI_MATCH(DMI_BOARD_NAME, "EXOPG06411"),
			DMI_MATCH(DMI_BIOS_VERSION, "Lucid-CE-133"),
		},
	},
	{
		/*  Pegatron Lucid (Ordissimo AIRIS) */
		.matches = {
			DMI_MATCH(DMI_BOARD_NAME, "M11JB"),
			DMI_MATCH(DMI_BIOS_VERSION, "Lucid-"),
		},
	},
	{
		/*  Pegatron Lucid (Ordissimo) */
		.matches = {
			DMI_MATCH(DMI_BOARD_NAME, "Ordissimo"),
			DMI_MATCH(DMI_BIOS_VERSION, "Lucid-"),
		},
	},
	{
		/* HASEE E200 */
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "HASEE"),
			DMI_MATCH(DMI_BOARD_NAME, "E210"),
			DMI_MATCH(DMI_BIOS_VERSION, "6.00"),
		},
	},
	{ }
};

static void ehci_bios_handoff(struct pci_dev *pdev,
					void __iomem *op_reg_base,
					u32 cap, u8 offset)
{
	int try_handoff = 1, tried_handoff = 0;

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	/*
	 * The Pegatron Lucid tablet sporadically waits for 98 seconds trying
	 * the handoff on its unused controller.  Skip it.
	 *
	 * The HASEE E200 hangs when the semaphore is set (bugzilla #77021).
	 */
	if (pdev->vendor == 0x8086 && (pdev->device == 0x283a ||
			pdev->device == 0x27cc)) {
		if (dmi_check_system(ehci_dmi_nohandoff_table))
			try_handoff = 0;
	}

	if (try_handoff && (cap & EHCI_USBLEGSUP_BIOS)) {
		dev_dbg(&pdev->dev, "EHCI: BIOS handoff\n");

#if 0
/* aleksey_gorelov@phoenix.com reports that some systems need SMI forced on,
 * but that seems dubious in general (the BIOS left it off intentionally)
 * and is known to prevent some systems from booting.  so we won't do this
 * unless maybe we can determine when we're on a system that needs SMI forced.
 */
		/* BIOS workaround (?): be sure the pre-Linux code
		 * receives the SMI
		 */
		pci_read_config_dword(pdev, offset + EHCI_USBLEGCTLSTS, &val);
		pci_write_config_dword(pdev, offset + EHCI_USBLEGCTLSTS,
				       val | EHCI_USBLEGCTLSTS_SOOE);
#endif

		/* some systems get upset if this semaphore is
		 * set for any other reason than forcing a BIOS
		 * handoff..
		 */
		pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);
		pci_write_config_byte(pdev, offset + 3, 1);
		pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);
	}

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	/* if boot firmware now owns EHCI, spin till it hands it over. */
	if (try_handoff) {
		int msec = 1000;
		while ((cap & EHCI_USBLEGSUP_BIOS) && (msec > 0)) {
			tried_handoff = 1;
			msleep(10);
			msec -= 10;
			pci_read_config_dword(pdev, offset, &cap);
		}
	}

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	if (cap & EHCI_USBLEGSUP_BIOS) {
		/* well, possibly buggy BIOS... try to shut it down,
		 * and hope nothing goes too wrong
		 */
		if (try_handoff)
			dev_warn(&pdev->dev,
				 "EHCI: BIOS handoff failed (BIOS bug?) %08x\n",
				 cap);
		pci_write_config_byte(pdev, offset + 2, 0);
	}

	/* just in case, always disable EHCI SMIs */
	pci_write_config_dword(pdev, offset + EHCI_USBLEGCTLSTS, 0);

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	/* If the BIOS ever owned the controller then we can't expect
	 * any power sessions to remain intact.
	 */
	if (tried_handoff)
		writel(0, op_reg_base + EHCI_CONFIGFLAG);

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);
}

static void quirk_usb_disable_ehci(struct pci_dev *pdev)
{
	void __iomem *base, *op_reg_base;
	u32	hcc_params, cap, val;
	u8	offset, cap_length;
	int	wait_time, count = 256/4;

	if (!mmio_resource_enabled(pdev, 0))
		return;

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	base = pci_ioremap_bar(pdev, 0);
	if (base == NULL)
		return;

  pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	cap_length = readb(base);
	op_reg_base = base + cap_length;

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	/* EHCI 0.96 and later may have "extended capabilities"
	 * spec section 5.1 explains the bios handoff, e.g. for
	 * booting from USB disk or using a usb keyboard
	 */
	hcc_params = readl(base + EHCI_HCC_PARAMS);

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	offset = (hcc_params >> 8) & 0xff;
	while (offset && --count) {
		pci_read_config_dword(pdev, offset, &cap);

		pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

		switch (cap & 0xff) {
		case 1:
			pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);
			ehci_bios_handoff(pdev, op_reg_base, cap, offset);
			break;
		case 0: /* Illegal reserved cap, set cap=0 so we exit */
			cap = 0; /* fall through */
		default:
			dev_warn(&pdev->dev,
				 "EHCI: unrecognized capability %02x\n",
				 cap & 0xff);
		}
		offset = (cap >> 8) & 0xff;
	}

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	if (!count)
		dev_printk(KERN_DEBUG, &pdev->dev, "EHCI: capability loop?\n");

	/*
	 * halt EHCI & disable its interrupts in any case
	 */
	val = readl(op_reg_base + EHCI_USBSTS);
	if ((val & EHCI_USBSTS_HALTED) == 0) {
		val = readl(op_reg_base + EHCI_USBCMD);
		val &= ~EHCI_USBCMD_RUN;
		writel(val, op_reg_base + EHCI_USBCMD);

		wait_time = 2000;
		do {
			writel(0x3f, op_reg_base + EHCI_USBSTS);
			udelay(100);
			wait_time -= 100;
			val = readl(op_reg_base + EHCI_USBSTS);
			if ((val == ~(u32)0) || (val & EHCI_USBSTS_HALTED)) {
				break;
			}
		} while (wait_time > 0);
	}
	writel(0, op_reg_base + EHCI_USBINTR);
	writel(0x3f, op_reg_base + EHCI_USBSTS);

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);
	iounmap(base);
}

/*
 * handshake - spin reading a register until handshake completes
 * @ptr: address of hc register to be read
 * @mask: bits to look at in result of read
 * @done: value of those bits when handshake succeeds
 * @wait_usec: timeout in microseconds
 * @delay_usec: delay in microseconds to wait between polling
 *
 * Polls a register every delay_usec microseconds.
 * Returns 0 when the mask bits have the value done.
 * Returns -ETIMEDOUT if this condition is not true after
 * wait_usec microseconds have passed.
 */
static int handshake(void __iomem *ptr, u32 mask, u32 done,
		int wait_usec, int delay_usec)
{
	u32	result;

	do {
		result = readl(ptr);
		result &= mask;
		if (result == done)
			return 0;
		udelay(delay_usec);
		wait_usec -= delay_usec;
	} while (wait_usec > 0);
	return -ETIMEDOUT;
}

/*
 * Intel's Panther Point chipset has two host controllers (EHCI and xHCI) that
 * share some number of ports.  These ports can be switched between either
 * controller.  Not all of the ports under the EHCI host controller may be
 * switchable.
 *
 * The ports should be switched over to xHCI before PCI probes for any device
 * start.  This avoids active devices under EHCI being disconnected during the
 * port switchover, which could cause loss of data on USB storage devices, or
 * failed boot when the root file system is on a USB mass storage device and is
 * enumerated under EHCI first.
 *
 * We write into the xHC's PCI configuration space in some Intel-specific
 * registers to switch the ports over.  The USB 3.0 terminations and the USB
 * 2.0 data wires are switched separately.  We want to enable the SuperSpeed
 * terminations before switching the USB 2.0 wires over, so that USB 3.0
 * devices connect at SuperSpeed, rather than at USB 2.0 speeds.
 */
void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev)
{
	u32		ports_available;
	bool		ehci_found = false;
	struct pci_dev	*companion = NULL;

	/* Sony VAIO t-series with subsystem device ID 90a8 is not capable of
	 * switching ports from EHCI to xHCI
	 */
	if (xhci_pdev->subsystem_vendor == PCI_VENDOR_ID_SONY &&
	    xhci_pdev->subsystem_device == 0x90a8)
		return;

	/* make sure an intel EHCI controller exists */
	for_each_pci_dev(companion) {
		if (companion->class == PCI_CLASS_SERIAL_USB_EHCI &&
		    companion->vendor == PCI_VENDOR_ID_INTEL) {
			ehci_found = true;
			break;
		}
	}

	if (!ehci_found)
		return;

	/* Don't switchover the ports if the user hasn't compiled the xHCI
	 * driver.  Otherwise they will see "dead" USB ports that don't power
	 * the devices.
	 */
	if (!IS_ENABLED(CONFIG_USB_XHCI_HCD)) {
		dev_warn(&xhci_pdev->dev,
			 "CONFIG_USB_XHCI_HCD is turned off, defaulting to EHCI.\n");
		dev_warn(&xhci_pdev->dev,
				"USB 3.0 devices will work at USB 2.0 speeds.\n");
		usb_disable_xhci_ports(xhci_pdev);
		return;
	}

	/* Read USB3PRM, the USB 3.0 Port Routing Mask Register
	 * Indicate the ports that can be changed from OS.
	 */
	pci_read_config_dword(xhci_pdev, USB_INTEL_USB3PRM,
			&ports_available);

	dev_dbg(&xhci_pdev->dev, "Configurable ports to enable SuperSpeed: 0x%x\n",
			ports_available);

	/* Write USB3_PSSEN, the USB 3.0 Port SuperSpeed Enable
	 * Register, to turn on SuperSpeed terminations for the
	 * switchable ports.
	 */
	pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN,
			ports_available);

	pci_read_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN,
			&ports_available);
	dev_dbg(&xhci_pdev->dev,
		"USB 3.0 ports that are now enabled under xHCI: 0x%x\n",
		ports_available);

	/* Read XUSB2PRM, xHCI USB 2.0 Port Routing Mask Register
	 * Indicate the USB 2.0 ports to be controlled by the xHCI host.
	 */

	pci_read_config_dword(xhci_pdev, USB_INTEL_USB2PRM,
			&ports_available);

	dev_dbg(&xhci_pdev->dev, "Configurable USB 2.0 ports to hand over to xCHI: 0x%x\n",
			ports_available);

	/* Write XUSB2PR, the xHC USB 2.0 Port Routing Register, to
	 * switch the USB 2.0 power and data lines over to the xHCI
	 * host.
	 */
	pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
			ports_available);

	pci_read_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
			&ports_available);
	dev_dbg(&xhci_pdev->dev,
		"USB 2.0 ports that are now switched over to xHCI: 0x%x\n",
		ports_available);
}
EXPORT_SYMBOL_GPL(usb_enable_intel_xhci_ports);

void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
{
	pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, 0x0);
	pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, 0x0);
}
EXPORT_SYMBOL_GPL(usb_disable_xhci_ports);

/**
 * PCI Quirks for xHCI.
 *
 * Takes care of the handoff between the Pre-OS (i.e. BIOS) and the OS.
 * It signals to the BIOS that the OS wants control of the host controller,
 * and then waits 1 second for the BIOS to hand over control.
 * If we timeout, assume the BIOS is broken and take control anyway.
 */
static void quirk_usb_handoff_xhci(struct pci_dev *pdev)
{
	void __iomem *base;
	int ext_cap_offset;
	void __iomem *op_reg_base;
	u32 val;
	int timeout;
	int len = pci_resource_len(pdev, 0);

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	if (!mmio_resource_enabled(pdev, 0))
		return;

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	base = ioremap_nocache(pci_resource_start(pdev, 0), len);
	if (base == NULL)
		return;

	/*
	 * Find the Legacy Support Capability register -
	 * this is optional for xHCI host controllers.
	 */
	ext_cap_offset = xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_LEGACY);

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	if (!ext_cap_offset)
		goto hc_init;

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	if ((ext_cap_offset + sizeof(val)) > len) {
		/* We're reading garbage from the controller */
		dev_warn(&pdev->dev, "xHCI controller failing to respond");
		goto iounmap;
	}
	val = readl(base + ext_cap_offset);

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	/* Auto handoff never worked for these devices. Force it and continue */
	if ((pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241) ||
			(pdev->vendor == PCI_VENDOR_ID_RENESAS
			 && pdev->device == 0x0014)) {
		val = (val | XHCI_HC_OS_OWNED) & ~XHCI_HC_BIOS_OWNED;
		writel(val, base + ext_cap_offset);
	}

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	/* If the BIOS owns the HC, signal that the OS wants it, and wait */
	if (val & XHCI_HC_BIOS_OWNED) {
		writel(val | XHCI_HC_OS_OWNED, base + ext_cap_offset);

		/* Wait for 1 second with 10 microsecond polling interval */
		timeout = handshake(base + ext_cap_offset, XHCI_HC_BIOS_OWNED,
				0, 1000000, 10);

		/* Assume a buggy BIOS and take HC ownership anyway */
		if (timeout) {
			dev_warn(&pdev->dev,
				 "xHCI BIOS handoff failed (BIOS bug ?) %08x\n",
				 val);
			writel(val & ~XHCI_HC_BIOS_OWNED, base + ext_cap_offset);
		}
	}

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	val = readl(base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);
	/* Mask off (turn off) any enabled SMIs */
	val &= XHCI_LEGACY_DISABLE_SMI;
	/* Mask all SMI events bits, RW1C */
	val |= XHCI_LEGACY_SMI_EVENTS;
	/* Disable any BIOS SMIs and clear all SMI events*/
	writel(val, base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

hc_init:
	if (pdev->vendor == PCI_VENDOR_ID_INTEL)
		usb_enable_intel_xhci_ports(pdev);

	op_reg_base = base + XHCI_HC_LENGTH(readl(base));

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	/* Wait for the host controller to be ready before writing any
	 * operational or runtime registers.  Wait 5 seconds and no more.
	 */
	timeout = handshake(op_reg_base + XHCI_STS_OFFSET, XHCI_STS_CNR, 0,
			5000000, 10);
	/* Assume a buggy HC and start HC initialization anyway */
	if (timeout) {
		val = readl(op_reg_base + XHCI_STS_OFFSET);
		dev_warn(&pdev->dev,
			 "xHCI HW not ready after 5 sec (HC bug?) status = 0x%x\n",
			 val);
	}

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	/* Send the halt and disable interrupts command */
	val = readl(op_reg_base + XHCI_CMD_OFFSET);
	val &= ~(XHCI_CMD_RUN | XHCI_IRQS);
	writel(val, op_reg_base + XHCI_CMD_OFFSET);

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	/* Wait for the HC to halt - poll every 125 usec (one microframe). */
	timeout = handshake(op_reg_base + XHCI_STS_OFFSET, XHCI_STS_HALT, 1,
			XHCI_MAX_HALT_USEC, 125);
	if (timeout) {
		val = readl(op_reg_base + XHCI_STS_OFFSET);
		dev_warn(&pdev->dev,
			 "xHCI HW did not halt within %d usec status = 0x%x\n",
			 XHCI_MAX_HALT_USEC, val);
	}

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

iounmap:
	iounmap(base);
}

static void quirk_usb_early_handoff(struct pci_dev *pdev)
{
	/* Skip Netlogic mips SoC's internal PCI USB controller.
	 * This device does not need/support EHCI/OHCI handoff
	 */
	if (pdev->vendor == 0x184e)	/* vendor Netlogic */
		return;
	if (pdev->class != PCI_CLASS_SERIAL_USB_UHCI &&
			pdev->class != PCI_CLASS_SERIAL_USB_OHCI &&
			pdev->class != PCI_CLASS_SERIAL_USB_EHCI &&
			pdev->class != PCI_CLASS_SERIAL_USB_XHCI)
		return;

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	if (pci_enable_device(pdev) < 0) {
		dev_warn(&pdev->dev,
			 "Can't enable PCI device, BIOS handoff failed.\n");
		return;
	}

	pr_err("DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__);

	if (pdev->class == PCI_CLASS_SERIAL_USB_UHCI)
		quirk_usb_handoff_uhci(pdev);
	else if (pdev->class == PCI_CLASS_SERIAL_USB_OHCI)
		quirk_usb_handoff_ohci(pdev);
	else if (pdev->class == PCI_CLASS_SERIAL_USB_EHCI)
		quirk_usb_disable_ehci(pdev);
	else if (pdev->class == PCI_CLASS_SERIAL_USB_XHCI)
		quirk_usb_handoff_xhci(pdev);
	pci_disable_device(pdev);
}
DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
			PCI_CLASS_SERIAL_USB, 8, quirk_usb_early_handoff);

Re: Regression causes a hang on boot with a Comtrol PCI card

[Alan Stern]

On Thu, 4 Apr 2019, Jesse Hathaway wrote:

> On Thu, Apr 4, 2019 at 12:16 PM Alan Stern <stern@rowland.harvard.edu> wrote:
> > > I added debug statements to quirk_usb_early_handoff, quirk_usb_disable_ehci &
> > > ehci_bios_handoff. The box hangs right before calling:
> > >
> > > pci_write_config_byte(pdev, offset + 3, 1);
> >
> > Right _before_ that line?  Not _after_ it?
> 
> Sorry I should have been more precise, it hangs executing the above
> pci_write_config_function. I get the debug printk immediately preceding
> that line.
> 
> > That's surprising because the two preceding lines of code are the
> > condition of an "if" statement and a dev_dbg() call.  I don't see how
> > either of them could cause a hang.
> >
> > Maybe the hang is a delayed reaction to something happening somewhere
> > else.  But on the assumption that it isn't, you could try commenting
> > out various parts of ehci_bios_handoff to see which ones make a
> > difference.
> 
> will do
> 
> > > which is in ehci_bios_handoff:
> > >
> > > [   10.698240] DEBUG: Passed quirk_usb_early_handoff 1300
> > > [   10.704271] DEBUG: Passed quirk_usb_early_handoff 1308
> > > [   10.710206] DEBUG: Passed quirk_usb_disable_ehci 939
> > > [   10.715949] DEBUG: Passed quirk_usb_disable_ehci 945
> > > [   10.721685] DEBUG: Passed quirk_usb_disable_ehci 950
> > > [   10.727423] DEBUG: Passed quirk_usb_disable_ehci 958
> > > [   10.733160] DEBUG: Passed quirk_usb_disable_ehci 964
> > > [   10.738897] DEBUG: Passed quirk_usb_disable_ehci 968
> > > [   10.744633] DEBUG: Passed ehci_bios_handoff 849
> > > [   10.749884] DEBUG: Passed ehci_bios_handoff 884
> > >
> > > I have attached the debug output, and my modified pci-quirks.c file
> > > to the bug report, let me know what else I can do to help.
> 
> sorry I attached them to the bug report, but I have attached them to this
> email as well.

Okay.  You could try skipping that pci_write_config_byte() call.  The 
following loop would probably time out, and you might find that the 
code crashes later on.

You could also try setting try_handoff to 0 near the start of the
routine.  Your system plus the Comtrol PCI card could have the same
sort of bug as reported in Bugzilla #77021.

Alan Stern

Re: Regression causes a hang on boot with a Comtrol PCI card

[Jesse Hathaway]

On Thu, Apr 4, 2019 at 2:14 PM Alan Stern <stern@rowland.harvard.edu> wrote:
> Okay.  You could try skipping that pci_write_config_byte() call.  The
> following loop would probably time out, and you might find that the
> code crashes later on.
>
> You could also try setting try_handoff to 0 near the start of the
> routine.  Your system plus the Comtrol PCI card could have the same
> sort of bug as reported in Bugzilla #77021.

I tried both of those options and the output was similar, here is the output
with try_handoff set to 0. In both cases the box then hangs on initializing
pstore. Excuse my ignorance on understanding how having the Comtrol
card present would effect the USB handoff, but would there be any
value in trying to boot this box via UEFI, rather than via the BIOS? Does
UEFI handle the handoff differently?

[   11.391514] DEBUG: Passed quirk_usb_disable_ehci 945
[   11.397250] DEBUG: Passed quirk_usb_disable_ehci 950
[   11.402988] DEBUG: Passed quirk_usb_disable_ehci 958
[   11.408724] DEBUG: Passed quirk_usb_disable_ehci 964
[   11.414461] DEBUG: Passed quirk_usb_disable_ehci 968
[   11.420197] DEBUG: Passed ehci_bios_handoff 849
[   11.425448] DEBUG: Passed ehci_bios_handoff 889
[   11.430699] DEBUG: Passed ehci_bios_handoff 902
[   11.435952] DEBUG: Passed ehci_bios_handoff 918
[   11.441203] DEBUG: Passed ehci_bios_handoff 926
[   11.446455] DEBUG: Passed quirk_usb_disable_ehci 981
[   11.452292] DEBUG: Passed quirk_usb_disable_ehci 1009
[   11.458180] pci 0000:00:1d.0: quirk_usb_early_handoff+0x0/0x865
took 82350 usecs
[   11.466568] pci 0000:01:00.0: calling  quirk_e100_interrupt+0x0/0x1a0 @ 1
[   11.474249] pci 0000:01:00.0: quirk_e100_interrupt+0x0/0x1a0 took 0 usecs
[   11.481931] pci 0000:01:00.1: calling  quirk_e100_interrupt+0x0/0x1a0 @ 1
[   11.489612] pci 0000:01:00.1: quirk_e100_interrupt+0x0/0x1a0 took 0 usecs
[   11.497296] pci 0000:03:00.0: calling  quirk_blacklist_vpd+0x0/0x30 @ 1
[   11.504783] pci 0000:03:00.0: [Firmware Bug]: disabling VPD access
(can't determine size of non-standard VPD format)
[   11.516663] pci 0000:03:00.0: quirk_blacklist_vpd+0x0/0x30 took 11600 usecs
[   11.524538] pci 0000:07:00.0: calling  quirk_e100_interrupt+0x0/0x1a0 @ 1
[   11.532219] pci 0000:07:00.0: quirk_e100_interrupt+0x0/0x1a0 took 0 usecs
[   11.539901] pci 0000:07:00.1: calling  quirk_e100_interrupt+0x0/0x1a0 @ 1
[   11.547582] pci 0000:07:00.1: quirk_e100_interrupt+0x0/0x1a0 took 0 usecs
[   11.555374] pci 0000:0b:00.0: calling  pci_fixup_video+0x0/0x110 @ 1
[   11.562797] pci 0000:0b:00.0: Video device with shadowed ROM at
[mem 0x000c0000-0x000dffff]
[   11.572248] pci 0000:0b:00.0: pci_fixup_video+0x0/0x110 took 9453 usecs
[   11.579991] Unpacking initramfs...
[   11.923856] Freeing initrd memory: 22636K
[   11.950050] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
[   11.957345] software IO TLB: mapped [mem 0x76289000-0x7a289000] (64MB)
[   11.967721] Initialise system trusted keyrings
[   11.972908] workingset: timestamp_bits=40 max_order=27 bucket_order=0
[   11.981517] zbud: loaded
[   12.138528] Key type asymmetric registered
[   12.143201] Asymmetric key parser 'x509' registered
[   12.148754] Block layer SCSI generic (bsg) driver version 0.4
loaded (major 247)
[   12.157245] io scheduler mq-deadline registered
[   12.163318] pcieport 0000:00:01.0: Signaling PME with IRQ 25
[   12.169926] pcieport 0000:00:02.0: Signaling PME with IRQ 26
[   12.176519] pcieport 0000:00:03.0: Signaling PME with IRQ 27
[   12.183109] pcieport 0000:00:03.2: Signaling PME with IRQ 28
[   12.189678] pcieport 0000:00:1c.0: Signaling PME with IRQ 29
[   12.196248] pcieport 0000:00:1c.4: Signaling PME with IRQ 30
[   12.202833] pcieport 0000:00:1c.7: Signaling PME with IRQ 31
[   12.212006] pcieport 0000:80:01.0: Signaling PME with IRQ 33
[   12.218609] pcieport 0000:80:03.0: Signaling PME with IRQ 34
[   12.225404] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
[   12.238133] ERST: Error Record Serialization Table (ERST) support
is initialized.
[   12.246614] pstore: Registered erst as persistent store backend

Re: Regression causes a hang on boot with a Comtrol PCI card

[Alan Stern]

On Fri, 5 Apr 2019, Jesse Hathaway wrote:

> On Thu, Apr 4, 2019 at 2:14 PM Alan Stern <stern@rowland.harvard.edu> wrote:
> > Okay.  You could try skipping that pci_write_config_byte() call.  The
> > following loop would probably time out, and you might find that the
> > code crashes later on.
> >
> > You could also try setting try_handoff to 0 near the start of the
> > routine.  Your system plus the Comtrol PCI card could have the same
> > sort of bug as reported in Bugzilla #77021.
> 
> I tried both of those options and the output was similar, here is the output
> with try_handoff set to 0. In both cases the box then hangs on initializing
> pstore.

Well, at least that's forward progress.  I don't know what pstore is or
what connection it has to the USB subsystem.  Does the machine hang 
similarly if you boot without the Comtrol PCI card present?

For that matter, what happens if you remove EHCI from the kernel 
configuration completely?

>  Excuse my ignorance on understanding how having the Comtrol
> card present would effect the USB handoff, but would there be any
> value in trying to boot this box via UEFI, rather than via the BIOS? Does
> UEFI handle the handoff differently?

The UEFI and the legacy BIOS are two separate pieces of code with no 
particular connection to one another.  It's a good bet that they do 
pretty much everything differently.

As for how the PCI card affects the USB handoff, it depends on how the
BIOS behaves.  Normally the BIOS will take control of all the available
EHCI controllers during bootup (so that it can use them to communicate
with a USB keyboard or mouse), including controllers on add-on PCI
cards as well as those on the motherboard.  When the kernel starts up,
it tries to take ownership of the controllers away from the BIOS
(that's the handoff) so that Linux can use them.  However, if the BIOS
was never tested for handoff of USB controllers on add-on PCI cards, it
could easily have a bug that would crash the machine.

Alan Stern

Re: Regression causes a hang on boot with a Comtrol PCI card

[Jesse Hathaway]

On Sat, Apr 6, 2019 at 10:32 AM Alan Stern <stern@rowland.harvard.edu> wrote:
> Well, at least that's forward progress.  I don't know what pstore is or
> what connection it has to the USB subsystem.  Does the machine hang
> similarly if you boot without the Comtrol PCI card present?

Yes the box boots fine when the Comtrol PCI card is *not* present.

> For that matter, what happens if you remove EHCI from the kernel
> configuration completely?

If I remove USB support, the box still hangs after registering the pstore, but
if I remove pstore support and APEI support from the kernel then the box boots
without issue.

> As for how the PCI card affects the USB handoff, it depends on how the
> BIOS behaves.  Normally the BIOS will take control of all the available
> EHCI controllers during bootup (so that it can use them to communicate
> with a USB keyboard or mouse), including controllers on add-on PCI
> cards as well as those on the motherboard.  When the kernel starts up,
> it tries to take ownership of the controllers away from the BIOS
> (that's the handoff) so that Linux can use them.  However, if the BIOS
> was never tested for handoff of USB controllers on add-on PCI cards, it
> could easily have a bug that would crash the machine.

The Comtrol card provides 32 serial ports, via a breakout box, but it has
no USB functionality, which was why I was surprised that its presence
somehow breaks the USB hand off.

Re: Regression causes a hang on boot with a Comtrol PCI card

[Alan Stern]

On Mon, 15 Apr 2019, Jesse Hathaway wrote:

> On Sat, Apr 6, 2019 at 10:32 AM Alan Stern <stern@rowland.harvard.edu> wrote:
> > Well, at least that's forward progress.  I don't know what pstore is or
> > what connection it has to the USB subsystem.  Does the machine hang
> > similarly if you boot without the Comtrol PCI card present?
> 
> Yes the box boots fine when the Comtrol PCI card is *not* present.
> 
> > For that matter, what happens if you remove EHCI from the kernel
> > configuration completely?
> 
> If I remove USB support, the box still hangs after registering the pstore, but
> if I remove pstore support and APEI support from the kernel then the box boots
> without issue.
> 
> > As for how the PCI card affects the USB handoff, it depends on how the
> > BIOS behaves.  Normally the BIOS will take control of all the available
> > EHCI controllers during bootup (so that it can use them to communicate
> > with a USB keyboard or mouse), including controllers on add-on PCI
> > cards as well as those on the motherboard.  When the kernel starts up,
> > it tries to take ownership of the controllers away from the BIOS
> > (that's the handoff) so that Linux can use them.  However, if the BIOS
> > was never tested for handoff of USB controllers on add-on PCI cards, it
> > could easily have a bug that would crash the machine.
> 
> The Comtrol card provides 32 serial ports, via a breakout box, but it has
> no USB functionality, which was why I was surprised that its presence
> somehow breaks the USB hand off.

Well, I am completely mystified.  Nor do I understand how the commits
you identified could be related, although maybe the relationship is
very indirect.

Whatever the source of the problem, I don't think you're going to find 
it by looking at the USB code.  Perhaps the early initialization of the 
functions that _are_ present on the Comtrol card somehow messes up 
other parts of the system.

Alan Stern

Re: Regression causes a hang on boot with a Comtrol PCI card

[Jesse Hathaway]

On Tue, Apr 16, 2019 at 10:00 AM Alan Stern <stern@rowland.harvard.edu> wrote:
> Whatever the source of the problem, I don't think you're going to find
> it by looking at the USB code.  Perhaps the early initialization of the
> functions that _are_ present on the Comtrol card somehow messes up
> other parts of the system.

Thanks for all you help Alan,

I think at this point my Linux kernel debugging knowledge has run
aground. I would
love to crack this nut, but I doubt that will be possible with my
current knowledge base.
For now I am going to run the patched kernel even if I don't
understand precisely why
they prevent the box from hanging on boot when the Comtrol card is present.

Re: Regression causes a hang on boot with a Comtrol PCI card

[Alan Stern]

On Tue, 23 Apr 2019, Jesse Hathaway wrote:

> On Tue, Apr 16, 2019 at 10:00 AM Alan Stern <stern@rowland.harvard.edu> wrote:
> > Whatever the source of the problem, I don't think you're going to find
> > it by looking at the USB code.  Perhaps the early initialization of the
> > functions that _are_ present on the Comtrol card somehow messes up
> > other parts of the system.
> 
> Thanks for all you help Alan,
> 
> I think at this point my Linux kernel debugging knowledge has run
> aground. I would
> love to crack this nut, but I doubt that will be possible with my
> current knowledge base.
> For now I am going to run the patched kernel even if I don't
> understand precisely why
> they prevent the box from hanging on boot when the Comtrol card is present.

Okay, that's understandable.  Sorry I couldn't do more to help.

Alan Stern