Re: Pentium-M?

Re: Pentium-M?

[Mikael Pettersson]

On Sat, 23 Aug 2003 13:50:02 +0200, Jan De Luyck <lkml@kcore.org> wrote:
>Just a short question. For the Pentium-M as used in the centrino platform, 
>what do I select in the 2.6.0-test4 kernel configuration as the CPU?
>
>I figure it's not a PIV, but is it a P3? Or is it something special?

The P-M core is PIII, to which SSE2, some P4-like model-specific
registers, and (it seems) a P4 bus were added.

For now, treat it simply as a PIII.

/Mikael

Re: Pentium-M?

[Zwane Mwaikambo]

On Sat, 23 Aug 2003, Mikael Pettersson wrote:

> On Sat, 23 Aug 2003 13:50:02 +0200, Jan De Luyck <lkml@kcore.org> wrote:
> >Just a short question. For the Pentium-M as used in the centrino platform, 
> >what do I select in the 2.6.0-test4 kernel configuration as the CPU?
> >
> >I figure it's not a PIV, but is it a P3? Or is it something special?
> 
> The P-M core is PIII, to which SSE2, some P4-like model-specific
> registers, and (it seems) a P4 bus were added.
> 
> For now, treat it simply as a PIII.

That's interesting, intel compiler recommends P4 type optimisations, 
also worth noting that the P-M has hardware prefetch.

Re: Pentium-M?

[Barry K. Nathan]

On Sat, Aug 23, 2003 at 09:03:17AM -0400, Zwane Mwaikambo wrote:
> That's interesting, intel compiler recommends P4 type optimisations, 
> also worth noting that the P-M has hardware prefetch.

I'm pretty sure the "Tualatin" Pentium III's also have hardware prefetch.
So it's not something specific to the P4 or P-M.

-Barry K. Nathan <barryn@pobox.com>

Re: Pentium-M?

[Zwane Mwaikambo]

On Sat, 23 Aug 2003, Barry K. Nathan wrote:

> On Sat, Aug 23, 2003 at 09:03:17AM -0400, Zwane Mwaikambo wrote:
> > That's interesting, intel compiler recommends P4 type optimisations, 
> > also worth noting that the P-M has hardware prefetch.
> 
> I'm pretty sure the "Tualatin" Pentium III's also have hardware prefetch.
> So it's not something specific to the P4 or P-M.

Someone else (in concordance with Mikael) also pointed out that the 
cacheline size is also the same as the PIII and not P4. So it's best 
going for PIII optimisations. It's best ignoring my previous comment then.

Thanks,
	Zwane

Re: Pentium-M?

[Christian Axelsson]

Hmm.. I have compiled my whole system with -march=pentium4 and yet not 
had a single breakage. Are you sure that this is p3?

-- 
Christan Axelsson
smiler@lanil.mine.nu

Re: Pentium-M?

[dean gaudet]

On Sat, 23 Aug 2003, Zwane Mwaikambo wrote:

> On Sat, 23 Aug 2003, Barry K. Nathan wrote:
>
> > On Sat, Aug 23, 2003 at 09:03:17AM -0400, Zwane Mwaikambo wrote:
> > > That's interesting, intel compiler recommends P4 type optimisations,
> > > also worth noting that the P-M has hardware prefetch.
> >
> > I'm pretty sure the "Tualatin" Pentium III's also have hardware prefetch.
> > So it's not something specific to the P4 or P-M.

yeah tualatin has hw prefetch.  p-m can handle more streams than tualatin.


> Someone else (in concordance with Mikael) also pointed out that the
> cacheline size is also the same as the PIII and not P4. So it's best
> going for PIII optimisations. It's best ignoring my previous comment then.

P-M has a 64-byte L1 dcacheline size same as P4 -- p3 has only 32 bytes.
see <http://sandpile.org/impl/pm.htm> for example.  (it's possible to
prove it experimentally if you want :)  but i thought kernel cacheline
size stuff was only important for SMP locking alignments?

there's details regarding the differences between P-M and P4 in the latest
"P4 optimisation guide", which was document id 24896609 at
developer.intel.com last time i fetched it, it might have been rev'd since
then.

basically the main disadvantage to selecting P4 for kernel compiling on a
centrino is that P-M has the same complex-simple-simple (4-1-1) uop
decoding machinery as the entire P6 family line... whereas P4's trace
cache somewhat offsets the P4's decoder's quirks.  so stuff scheduled for
p4 may not produce the best complex-simple-simple sequence that a p6
family processor wants to see.  i'm not really sure how well gcc does in
either case though... (whereas icc does a stellar job.)

i bet intel is saying "optimise for p4" for two reasons:

(a) the reality is way too complex to describe
(b) p4 is their long-term bet and they'd rather code be targetted to it
    specifically

however, if/when gcc picks up some of the more wacked p4 optimisations,
such as turning multiplication by 32 into:

	add eax,eax
	add eax,eax
	add eax,eax
	add eax,eax
	add eax,eax

then you'll start to see penalties on p6 cores ... the p4 does not like
shifts or lea.  the above runs in 2.5 cycles on a p4 (double-pumped ALUs)
whereas a shift or lea would be 4 clocks.

-dean

Re: Pentium-M?

[Mikael Pettersson]

On Sun, 24 Aug 2003 22:20:13 +0200, Christian Axelsson <smiler@lanil.mine.nu> wrote:
>Hmm.. I have compiled my whole system with -march=pentium4 and yet not 
>had a single breakage. Are you sure that this is p3?

Oh yes. The core is most definitely P6+tweaks and not NetBurst.
This can be deduced from facts like:
- CPUID family is 6 not 15
- performance counter architecture is like PIII with some minor
  tweaks but definitely nothing like P4
- treated separately from NetBurst in code optimization manual

The reason compiling with -march=pentium4 doesn't break is that
the differences ISA-wise are almost nil.

/Mikael

Pentium-M?

[Jan De Luyck]

Hello List,

Just a short question. For the Pentium-M as used in the centrino platform, 
what do I select in the 2.6.0-test4 kernel configuration as the CPU?

I figure it's not a PIV, but is it a P3? Or is it something special?

Thanks!

Jan
-- 
I don't want to alarm anybody, but there is an excellent chance that
the Earth will be destroyed in the next several days.  Congress is
thinking about eliminating a federal program under which scientists
broadcast signals to alien beings.  This would be a large mistake.
Alien beings have nuclear blaster death cannons.  You cannot cut off
their federal programs as if they were merely poor people ...
		-- Davy Barry, "THE ALIENS ARE COMING, THE ALIENS ARE
		   COMING!"

Re: Pentium-M?

[Zwane Mwaikambo]

On Sat, 23 Aug 2003, Jan De Luyck wrote:

> Hello List,
> 
> Just a short question. For the Pentium-M as used in the centrino platform, 
> what do I select in the 2.6.0-test4 kernel configuration as the CPU?
> 
> I figure it's not a PIV, but is it a P3? Or is it something special?

For all intents and purposes it's a P4, so select P4.

	Zwane