From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755277AbdEHUFa (ORCPT ); Mon, 8 May 2017 16:05:30 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:21877 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751349AbdEHUF1 (ORCPT ); Mon, 8 May 2017 16:05:27 -0400 X-IronPort-AV: E=Sophos;i="5.38,310,1491231600"; d="scan'208";a="243045529" From: Chris Brandt To: Andy Shevchenko CC: jmondi , Linus Walleij , Jacopo Mondi , Geert Uytterhoeven , Laurent Pinchart , Rob Herring , "Mark Rutland" , Russell King - ARM Linux , Linux-Renesas , "linux-gpio@vger.kernel.org" , devicetree , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Thread-Topic: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Thread-Index: AQHSvy8kW/T8jbNXV0G/jE8WsCEqd6HZTneAgAEnEICAACrhkIAAE36AgAAKEjCAACHsAIANr5WAgAIa0gCAAAIDAIAAAdTAgAAkzACAAAks0A== Date: Mon, 8 May 2017 20:05:20 +0000 Message-ID: References: <1493281194-5200-1-git-send-email-jacopo+renesas@jmondi.org> <1493281194-5200-2-git-send-email-jacopo+renesas@jmondi.org> <20170508160120.GB25206@w540> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: gmail.com; dkim=none (message not signed) header.d=none;gmail.com; dmarc=none action=none header.from=renesas.com; x-originating-ip: [4.59.13.106] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;SG2PR06MB1167;7:o8qv/GYQiMFgvjS/TWUuqCATEm2s6TxnCkgBpstwsPkqYN0p6wk+phxadHkFs1ZY+hOQYYE10bhJ1oVrsom1w7flTnT+jrkoXTu+fTP5RgpLA/rSkh7NsA0u2DMvGxPPrDykBybEMWsS9/ImGkodL6PsQ6JMEbEyxqK+iYTcj3penQ4HOxht7/mU5hDoZ0Pg3bmAtzKPbFc48vwBARpVLO6jLcA0uS/KPmQPFm0wRs4lpMB4PoC/cFl9ErZF33wSNSRJjwgzybwPLY3hweAabetvetkfFUkwxH7qfkAysgjFMfj2JTIpU9/VjQrt7kXgDo7l7FT+SokF1W5lmQbR9w==;20:5vs1m20RAUXJCEhxwqFqVdm5F1GY2qQs1wd601Q+j4Tw9RogvzEQTe9gD7JsK/MIQACaf3khCDp8KcZQqTSxlpHGOKVywkHI2dYA2ghtM7N3GYlnQ0xlmfHvAdwXLjOCkqvJl6oojHFZpwOvLLilAm+0ANy4ahWCtQFXs8PxBDU= x-ms-office365-filtering-correlation-id: e99dd16d-31d2-43de-5848-08d4964d8e0e x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(22001)(2017030254075)(48565401081)(201703131423075)(201703031133081)(201702281549075);SRVR:SG2PR06MB1167; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(6040450)(601004)(2401047)(8121501046)(5005006)(93006095)(93001095)(3002001)(10201501046)(6055026)(6041248)(20161123562025)(20161123555025)(20161123564025)(20161123558100)(20161123560025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(6072148);SRVR:SG2PR06MB1167;BCL:0;PCL:0;RULEID:;SRVR:SG2PR06MB1167; x-forefront-prvs: 0301360BF5 x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(6009001)(39410400002)(39860400002)(39400400002)(39450400003)(39840400002)(39850400002)(24454002)(39060400002)(25786009)(3846002)(102836003)(74316002)(189998001)(54906002)(9686003)(86362001)(2950100002)(6916009)(6506006)(77096006)(55016002)(4326008)(6436002)(99286003)(122556002)(2900100001)(7696004)(7736002)(229853002)(305945005)(478600001)(38730400002)(3280700002)(53936002)(6246003)(110136004)(6116002)(5660300001)(66066001)(7416002)(93886004)(8676002)(81166006)(54356999)(3660700001)(50986999)(2906002)(76176999)(8936002)(33656002)(41533002);DIR:OUT;SFP:1102;SCL:1;SRVR:SG2PR06MB1167;H:SG2PR06MB1165.apcprd06.prod.outlook.com;FPR:;SPF:None;MLV:ovrnspm;PTR:InfoNoRecords;LANG:en; spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-originalarrivaltime: 08 May 2017 20:05:20.3573 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-Transport-CrossTenantHeadersStamped: SG2PR06MB1167 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id v48K5Zkq015942 Hello Andy, On Monday, May 08, 2017, Andy Shevchenko wrote: > > Bi-Directional: > > > > For any pin that needs to drive (send) or sense (receive) signals, the > pin > > mux controller can only enable 1 direction of buffers (in this case, it > > only the output buffers). Therefore the appropriate bit in the > > 'bi-directional' register is set in order to enable the signal path in > both > > directions (ie, enable the input buffers). > > So, I see this way how it can be enabled: > 1. IP_ENI + IP_ENO internally defines BiDi when PMC and PIPC bits are set > 2. BiDi bit is set and BUFOE is set > > Now the question is what the real use case for 2? For #1, IP_ENI and IP_ENO are controlled by PFC/PFCE/PFCAE. Those basically equate to the pin function register (as in, what IP block gets wired up to each pin.) However, it seems that PFC/PFCE/PFCAE cannot enable both IP_ENI and IP_ENO signals at the same time (the diagram doesn't really show you that piece of info), hence they had to make an 'override' register can called it PBDC (bir-dir register) to manually turn the input buffers on when needed. Seems like a HW hack if you ask me. > If we find one we need to rename and fix a description of the pin > control configuration property. > > like: > @PIN_CONFIG_OUTPUT_INPUT_ENABLE: this will configure the pin as an output. > ... > Note: As long as it's enabled the pin's input enabled as well and vice > versa. So your suggestion is to rename PIN_CONFIG_OUTPUT to PIN_CONFIG_OUTPUT_INPUT_ENABLE? I would say the description for @PIN_CONFIG_INPUT_ENABLE is probably 'technically' correct for our bi-dir needs, but I didn't like it because it might confuse users making a DT file for their board (unless of course they studied the hardware manual in detail to finally come to the conclusion of the screwy PFC hardware). > >> > and SWIO_[INPUT|OUTPUT] directly there? > > > > In the hardware manual, there is a list of pin functions that if you > want > > to use, you cannot use the stand pinmux register method that you use for > > all the other pins. Instead, you are instructed to do a different > > procedure. If course electrically, input/output buffers are still turned > > on/off or whatever, but the root reason of why you need to do this > > differently for these specific pin/function is not known. > > > > The "SWIO_" portion of the naming comes from the hardware manual which > > refers to this as "Software I/O Control Alternative Mode" (which in my > > opinion means the HW guys couldn't get the pin directions/buffers to be > set > > automatically for some reason, so they decided it's the SW guys problem > now > > for those pins) > > Okay, these are related to pin muxing explicitly. > So, you have 10 functions overall? > What prevents you describe them accordingly and hide this > implementation detail in the driver? The one issue I was trying to avoid by hiding things in the driver with some type of look-up table was that this series of parts comes in different subsets/packages and sometimes the functions comes out on different port numbers. So now you need multiple look-up tables and then also a way to signal what part/package you have so you use the correct look-up table. It seemed easier (and safer) to just pass the info in (if you needed it) in the Device Tree for the board. Of these 'special' pins (Table 54.7): For 16 of them, they truly can operate as input or output, so the user needs to specify that direction they need in the DT. For LVDS, Sound and WDT, those will be fixed, so they would be the only ones you could do a table for, but as I mentioned, Sound and WDT don't always come out in the same place so a lookup table isn't so cut and dry. > >> Second question, what makes it differ to what already exists? > > > > We have 3 different flags (properties) that need to be specified for > some > > pins in some circumstances. > > At first, we just tried to pass this additional information in when > > defining what function the pin should be just for those pins whose > > direction (ie, buffers) would not be set up automatically. > > However, this was rejected and we were told to pick from the existing > set > > generic properties. > > But, 3 different generic pinctrl properties that fit what we needed > didn't > > exist. So, we used the existing "input-enable" and "output-enable", but > > then created "bi-directional". > > Yes, that figure helped me a lot to understand. I see from your other email you sent to Jacopo, it looks like the link I sent you only brought you to the shorter 'data sheet' version of the hardware manual, not the full manual that includes 'Figure 54.1'. Sorry about that. Chris