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From: "Duan, Zhenzhong" <zhenzhong.duan@intel.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "bhelgaas@google.com" <bhelgaas@google.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Yang, Lixiao" <lixiao.yang@intel.com>,
	"Peng, Chao P" <chao.p.peng@intel.com>
Subject: RE: RESEND: MMCONFIG related question
Date: Mon, 16 Jan 2023 01:53:45 +0000	[thread overview]
Message-ID: <SJ0PR11MB674419202D61518CB81282DD92C19@SJ0PR11MB6744.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20230113135343.GA1834989@bhelgaas>



>-----Original Message-----
>From: Bjorn Helgaas <helgaas@kernel.org>
>Sent: Friday, January 13, 2023 9:54 PM
>To: Duan, Zhenzhong <zhenzhong.duan@intel.com>
>Cc: bhelgaas@google.com; linux-kernel@vger.kernel.org; Yang, Lixiao
><lixiao.yang@intel.com>; Peng, Chao P <chao.p.peng@intel.com>
>Subject: Re: RESEND: MMCONFIG related question
>
>On Fri, Jan 13, 2023 at 10:15:45AM +0000, Duan, Zhenzhong wrote:
>> Recently Lixiao reported sriov disappered for cards which supported
>> sriov. We found it's related to commit "07eab0901ed efi/x86: Remove
>> EfiMemoryMappedIO from E820 map" which removed
>EfiMemoryMappedIO
>> regions from E820 map which lead to pci_mmcfg_reject_broken() check
>> failed, raw_pci_ext_ops isn't set to pci_mmcfg finally, below is the
>> related log. I know maybe bios should add MMCONFIG region into ACPI
>> motherboard resources, just want to ask if we would support the case
>> when MMCONFIG is missed in ACPI motherboard resources as I see it's
>> treated as "Firmware Info" not "Firmware bug". Thanks
>
>The patches here:
>https://lore.kernel.org/linux-pci/20230110180243.1590045-1-
>helgaas@kernel.org/
>should resolve this problem.
Will try.

>
>> Also has another question, if MMCONFIG happened to be in
>> EfiMemoryMappedIO, even if it's removed from E820 map so that there is
>> no CRS clip for that region, could it be used for BAR space?
>
>MMCONFIG cannot be used for BAR space.  MMCONFIG should be reported
>via PNP0C02 _CRS.  BAR space, i.e., a PCI host bridge aperture, should be
>reported via PNP0A03 _CRS.
>
>> Will there be conflict for BAR and MMCONFIG access?
>
>I don't think so, but I don't completely understand the scenario you're asking
>about.
I mean the case when MMCONFIG space reported by ACPI table overlap with PCI host bridge aperture reported by PNP0A03 _CRS. Just realized this case should be firmware bug, sorry for confusing.

>
>The E820 clipping of PCI host bridge windows is only intended to work around
>an issue where PNP0A03 _CRS reports space that is not part of the host bridge
>windows.  E.g., there were a few platforms that seemed to report host bridge
>register space via _CRS.
Understood, thanks Bjorn.


      reply	other threads:[~2023-01-16  1:54 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-13 10:15 RESEND: MMCONFIG related question Duan, Zhenzhong
2023-01-13 13:53 ` Bjorn Helgaas
2023-01-16  1:53   ` Duan, Zhenzhong [this message]

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