From: Jingoo Han <jingoohan1@gmail.com>
To: Dilip Kota <eswara.kota@linux.intel.com>,
"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"andrew.murray@arm.com" <andrew.murray@arm.com>,
"helgaas@kernel.org" <helgaas@kernel.org>,
"robh@kernel.org" <robh@kernel.org>,
"martin.blumenstingl@googlemail.com"
<martin.blumenstingl@googlemail.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"andriy.shevchenko@intel.com" <andriy.shevchenko@intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"cheol.yong.kim@intel.com" <cheol.yong.kim@intel.com>,
"chuanhua.lei@linux.intel.com" <chuanhua.lei@linux.intel.com>,
"qi-ming.wu@intel.com" <qi-ming.wu@intel.com>,
Han Jingoo <jingoohan1@gmail.com>
Subject: Re: [PATCH v7 2/3] dwc: PCI: intel: PCIe RC controller driver
Date: Fri, 15 Nov 2019 20:40:51 +0000 [thread overview]
Message-ID: <SL2P216MB01056231B6036941BEF71738AA700@SL2P216MB0105.KORP216.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <99a29f5a4ce18df26bd300ac6728433ec025631b.1573784557.git.eswara.kota@linux.intel.com>
On 11/14/19, 9:31 PM, Dilip Kota wrote:
> Add support to PCIe RC controller on Intel Gateway SoCs.
> PCIe controller is based of Synopsys DesignWare PCIe core.
>
> Intel PCIe driver requires Upconfigure support, Fast Training
> Sequence and link speed configurations. So adding the respective
> helper functions in the PCIe DesignWare framework.
> It also programs hardware autonomous speed during speed
> configuration so defining it in pci_regs.h.
>
> Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> ---
[.....]
> drivers/pci/controller/dwc/Kconfig | 10 +
> drivers/pci/controller/dwc/Makefile | 1 +
> drivers/pci/controller/dwc/pcie-designware.c | 57 +++
> drivers/pci/controller/dwc/pcie-designware.h | 12 +
> drivers/pci/controller/dwc/pcie-intel-gw.c | 542 +++++++++++++++++++++++++++
> include/uapi/linux/pci_regs.h | 1 +
> 6 files changed, 623 insertions(+)
> create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c
>
> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> index 0ba988b5b5bc..fb6d474477df 100644
> --- a/drivers/pci/controller/dwc/Kconfig
> +++ b/drivers/pci/controller/dwc/Kconfig
> @@ -82,6 +82,16 @@ config PCIE_DW_PLAT_EP
> order to enable device-specific features PCI_DW_PLAT_EP must be
> selected.
>
> +config PCIE_INTEL_GW
> + bool "Intel Gateway PCIe host controller support"
> + depends on OF && (X86 || COMPILE_TEST)
> + select PCIE_DW_HOST
> + help
> + Say 'Y' here to enable PCIe Host controller support on Intel
> + Gateway SoCs.
> + The PCIe controller uses the DesignWare core plus Intel-specific
> + hardware wrappers.
> +
Please add this config alphabetical order!
So, this config should be after 'config PCI_IMX6'.
There is no reason to put this config at the first place.
> config PCI_EXYNOS
> bool "Samsung Exynos PCIe controller"
> depends on SOC_EXYNOS5440 || COMPILE_TEST
> diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile
> index b30336181d46..99db83cd2f35 100644
> --- a/drivers/pci/controller/dwc/Makefile
> +++ b/drivers/pci/controller/dwc/Makefile
> @@ -3,6 +3,7 @@ obj-$(CONFIG_PCIE_DW) += pcie-designware.o
> obj-$(CONFIG_PCIE_DW_HOST) += pcie-designware-host.o
> obj-$(CONFIG_PCIE_DW_EP) += pcie-designware-ep.o
> obj-$(CONFIG_PCIE_DW_PLAT) += pcie-designware-plat.o
> +obj-$(CONFIG_PCIE_INTEL_GW) += pcie-intel-gw.o
Ditto.
Best regards,
Jingoo Han
> obj-$(CONFIG_PCI_DRA7XX) += pci-dra7xx.o
> obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o
> obj-$(CONFIG_PCI_IMX6) += pci-imx6.o
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 820488dfeaed..479e250695a0 100644
[.....]
next prev parent reply other threads:[~2019-11-15 20:41 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-15 2:30 [PATCH v7 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file Dilip Kota
2019-11-15 2:30 ` [PATCH v7 1/3] dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller Dilip Kota
2019-11-15 2:30 ` [PATCH v7 2/3] dwc: PCI: intel: PCIe RC controller driver Dilip Kota
2019-11-15 10:19 ` Andy Shevchenko
2019-11-18 8:24 ` Dilip Kota
2019-11-15 20:40 ` Jingoo Han [this message]
2019-11-18 7:58 ` Dilip Kota
2019-11-18 16:40 ` Jingoo Han
2019-11-19 1:26 ` Dilip Kota
2019-11-19 2:33 ` Jingoo Han
2019-11-19 3:15 ` Dilip Kota
2019-11-19 3:54 ` Jingoo Han
2019-11-19 9:19 ` Dilip Kota
2019-11-15 2:30 ` [PATCH v7 3/3] PCI: artpec6: Configure FTS with dwc helper function Dilip Kota
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