From: Sai Krishna Potthuri <lakshmis@xilinx.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Michal Simek <michals@xilinx.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
devicetree <devicetree@vger.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
git <git@xilinx.com>,
"saikrishna12468@gmail.com" <saikrishna12468@gmail.com>
Subject: RE: [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support
Date: Thu, 25 Mar 2021 10:15:30 +0000 [thread overview]
Message-ID: <SN6PR02MB39173864459C1AFC0590E5DEBD629@SN6PR02MB3917.namprd02.prod.outlook.com> (raw)
In-Reply-To: <CACRpkdaJRm4x+RaAYhy5gv7Ss897=0U=mCTbXcVAO4wKrRKZEw@mail.gmail.com>
Hi Linus,
> -----Original Message-----
> From: Linus Walleij <linus.walleij@linaro.org>
> Sent: Thursday, March 25, 2021 2:27 PM
> To: Sai Krishna Potthuri <lakshmis@xilinx.com>
> Cc: Andy Shevchenko <andy.shevchenko@gmail.com>; Rob Herring
> <robh+dt@kernel.org>; Michal Simek <michals@xilinx.com>; Greg Kroah-
> Hartman <gregkh@linuxfoundation.org>; linux-arm Mailing List <linux-arm-
> kernel@lists.infradead.org>; Linux Kernel Mailing List <linux-
> kernel@vger.kernel.org>; devicetree <devicetree@vger.kernel.org>; open
> list:GPIO SUBSYSTEM <linux-gpio@vger.kernel.org>; git <git@xilinx.com>;
> saikrishna12468@gmail.com
> Subject: Re: [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support
>
> On Mon, Mar 22, 2021 at 4:25 PM Sai Krishna Potthuri
> <lakshmis@xilinx.com> wrote:
> > [Andy]
>
> > > > > > + PIN_CONFIG_IOSTANDARD = PIN_CONFIG_END + 1, };
> > > > >
> > > > > I'm lost here. What is IO standard exactly? Why it can't be in
> > > > > generic headers?
> > > > It represents LVCMOS 3.3 volts/ LVCMOS 1.8 volts.
> > > > Since this is specific to Xilinx ZynqMP platform, considered to be
> > > > added in the driver file.
> > >
> > > So, why can't we create a couple of bits to represent this voltages
> > > in the generic header and gain usability for others as well?
> >
> > I see some drivers are maintaining the configuration list in the
> > driver file, if the configuration is specific to the driver.
> >
> > We can move this to generic header if it is used by others as well.
> > Ok, will wait for Linus to comment.
> > >
> > > Linus?
>
> While it is fine to add custom pin config options to pin controllers for
> hopelessly idiomatic stuff, this does look like it should be using
> PIN_CONFIG_POWER_SOURCE with the voltage rail as parameter, see
> include/linux/pinctrl/pinconf-generic.h
Thanks.
I will update the driver to use 'power-source' option.
Regards
Sai Krishna
>
> If you're not using that then tell us why.
>
> Yours,
> Linus Walleij
next prev parent reply other threads:[~2021-03-25 10:16 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-17 8:25 [PATCH v4 0/3] Add ZynqMP pinctrl driver Sai Krishna Potthuri
2021-03-17 8:25 ` [PATCH v4 1/3] firmware: xilinx: Add pinctrl support Sai Krishna Potthuri
2021-03-17 8:25 ` [PATCH v4 2/3] dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driver Sai Krishna Potthuri
2021-03-25 9:00 ` Linus Walleij
2021-03-17 8:25 ` [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support Sai Krishna Potthuri
2021-03-17 12:55 ` Andy Shevchenko
2021-03-18 14:42 ` Sai Krishna Potthuri
2021-03-19 10:23 ` Andy Shevchenko
2021-03-22 15:25 ` Sai Krishna Potthuri
2021-03-22 17:16 ` Andy Shevchenko
2021-03-23 8:08 ` Sai Krishna Potthuri
2021-03-25 8:57 ` Linus Walleij
2021-03-25 10:15 ` Sai Krishna Potthuri [this message]
2021-03-23 13:42 ` Greg Kroah-Hartman
2021-03-24 8:29 ` Michal Simek
2021-03-24 8:49 ` Greg Kroah-Hartman
2021-03-24 9:02 ` Michal Simek
2021-03-24 9:13 ` Greg Kroah-Hartman
2021-03-24 9:16 ` Michal Simek
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