From: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
To: "Pandruvada, Srinivas" <srinivas.pandruvada@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devel@acpica.org" <devel@acpica.org>,
"Natarajan, Janakarajan" <Janakarajan.Natarajan@amd.com>,
"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>
Cc: "lenb@kernel.org" <lenb@kernel.org>,
"viresh.kumar@linaro.org" <viresh.kumar@linaro.org>,
"Moore, Robert" <robert.moore@intel.com>,
"Schmauss, Erik" <erik.schmauss@intel.com>,
"rjw@rjwysocki.net" <rjw@rjwysocki.net>
Subject: RE: [PATCH 5/6] acpi/cppc: Add support for optional CPPC registers
Date: Fri, 29 Mar 2019 20:18:04 +0000 [thread overview]
Message-ID: <SN6PR12MB26399489011DD026910B6049F85A0@SN6PR12MB2639.namprd12.prod.outlook.com> (raw)
In-Reply-To: <f3a749646c66a84e17383204385d8c73750d4813.camel@intel.com>
> -----Original Message-----
> From: linux-acpi-owner@vger.kernel.org <linux-acpi-owner@vger.kernel.org> On Behalf Of Pandruvada, Srinivas
> Sent: Wednesday, March 27, 2019 10:48 AM
> To: linux-kernel@vger.kernel.org; devel@acpica.org; Natarajan, Janakarajan <Janakarajan.Natarajan@amd.com>; linux-
> acpi@vger.kernel.org; linux-pm@vger.kernel.org
> Cc: Ghannam, Yazen <Yazen.Ghannam@amd.com>; lenb@kernel.org; viresh.kumar@linaro.org; Moore, Robert
> <robert.moore@intel.com>; Schmauss, Erik <erik.schmauss@intel.com>; rjw@rjwysocki.net
> Subject: Re: [PATCH 5/6] acpi/cppc: Add support for optional CPPC registers
>
> On Fri, 2019-03-22 at 20:26 +0000, Natarajan, Janakarajan wrote:
> > From: Yazen Ghannam <Yazen.Ghannam@amd.com>
> >
> > Newer AMD processors support a subset of the optional CPPC registers.
> > Create show, store and helper routines for supported CPPC registers.
> >
> > Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
> > [ carved out into a patch, cleaned up, productized ]
> > Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
> >
>
> [..]
>
> > + /* desired_perf is the only mandatory value in perf_ctrls */
> > + if (cpc_read(cpu, desired_reg, &desired))
> > + ret = -EFAULT;
> > +
> > + if (CPC_SUPPORTED(max_reg) && cpc_read(cpu, max_reg, &max))
> > + ret = -EFAULT;
> > +
> We should create and use different macro other than CPPC_SUPPORTED.
> CPC_SUPPORTED doesn't validate the correctness of object type for a
> field. For example "Maximum Performance Register" can only be buffer
> not integer. In this way invalid field definitions can be ignored.
>
So create something like "CPPC_SUPPORTED_BUFFER" for buffer-only registers?
And then buffer/integer registers will continue to use "CPPC_SUPPORTED".
These seem to be the only two cases at this time. Is this okay?
Thanks,
Yazen
>
> > + if (CPC_SUPPORTED(min_reg) && cpc_read(cpu, min_reg, &min))
> > + ret = -EFAULT;
> > +
> > + if (CPC_SUPPORTED(energy_reg) && cpc_read(cpu, energy_reg,
> > &energy))
> > + ret = -EFAULT;
> > +
> > + if (CPC_SUPPORTED(auto_sel_enable_reg) &&
> > + cpc_read(cpu, auto_sel_enable_reg, &auto_sel_enable))
> > + ret = -EFAULT;
> > +
> Here it is fine to use CPC_SUPPORTED as the "Autonomous Selection
> Enable" can be both integer and buffer.
>
> Thanks,
> Srinivas
next prev parent reply other threads:[~2019-03-29 20:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-22 20:25 [PATCH 0/6] CPPC optional registers AMD support Natarajan, Janakarajan
2019-03-22 20:25 ` [PATCH 1/6] acpi/cppc: Ensure only supported CPPC sysfs entries are created Natarajan, Janakarajan
2019-03-22 20:26 ` [PATCH 2/6] acpi/cppc: Modify show_cppc_data macro Natarajan, Janakarajan
2019-03-22 20:26 ` [PATCH 3/6] acpi/cppc: Rework cppc_set_perf() to use cppc_regs index Natarajan, Janakarajan
2019-03-22 20:26 ` [PATCH 4/6] acpi/cppc: Add macros to define a R/W sysfs entry for CPPC registers Natarajan, Janakarajan
2019-03-22 20:26 ` [PATCH 5/6] acpi/cppc: Add support for optional " Natarajan, Janakarajan
2019-03-27 15:47 ` Pandruvada, Srinivas
2019-03-29 20:18 ` Ghannam, Yazen [this message]
2019-03-29 23:02 ` Rafael J. Wysocki
2019-03-30 2:40 ` Pandruvada, Srinivas
2019-03-22 20:26 ` [PATCH 6/6] acpi/cppc: Add support for CPPC Enable register Natarajan, Janakarajan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=SN6PR12MB26399489011DD026910B6049F85A0@SN6PR12MB2639.namprd12.prod.outlook.com \
--to=yazen.ghannam@amd.com \
--cc=Janakarajan.Natarajan@amd.com \
--cc=devel@acpica.org \
--cc=erik.schmauss@intel.com \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=rjw@rjwysocki.net \
--cc=robert.moore@intel.com \
--cc=srinivas.pandruvada@intel.com \
--cc=viresh.kumar@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).