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charset="us-ascii" Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1566898183; bh=XsMgSPEDUppyjIR+35o7fwfJ4AF3j1IDfiuEBB7sCs8=; h=X-PGP-Universal:ARC-Seal:ARC-Message-Signature: ARC-Authentication-Results:From:To:CC:Subject:Thread-Topic: Thread-Index:Date:Message-ID:References:In-Reply-To: Accept-Language:X-MS-Has-Attach:X-MS-TNEF-Correlator:msip_labels: authentication-results:x-originating-ip:x-ms-publictraffictype: x-ms-office365-filtering-correlation-id:x-microsoft-antispam: x-ms-traffictypediagnostic:x-ms-exchange-transport-forked: x-microsoft-antispam-prvs:x-ms-oob-tlc-oobclassifiers: x-forefront-prvs:x-forefront-antispam-report:received-spf: x-ms-exchange-senderadcheck:x-microsoft-antispam-message-info: MIME-Version:X-MS-Exchange-CrossTenant-Network-Message-Id: X-MS-Exchange-CrossTenant-originalarrivaltime: X-MS-Exchange-CrossTenant-fromentityheader: X-MS-Exchange-CrossTenant-id:X-MS-Exchange-CrossTenant-mailboxtype: X-MS-Exchange-CrossTenant-userprincipalname: X-MS-Exchange-Transport-CrossTenantHeadersStamped:X-OriginatorOrg: Content-Language:Content-Type:Content-Transfer-Encoding; b=h7UktN/DlPELnkq2i5yp1Q9ZACNTD4AOwjGWReubkE4gR0+piWHW3yTkAFiTs7II/ Iv/W/np1K12Xur860MLU3RfqmQAArFxNY3smtMBvViu+vjPEjHZBrhvMfpZT/uFuuk LxGQ2WeNf37L3YjMGS+6oWXV6dsOUUvsBinYJOsqBx6dMqgnrbRlodSgslTnBiOoKE 8RZ/dEgzj3ZPx6SYsWe5h/Xws3r1YEYuMHk1rp2/cRqn+x+mv6Ps7pbIk6WFGCyCBn KZnHkvohywzu3vlDcgqplHPR8M3nlv0urAFZw4vl9rG5B/nudkay/qKymmQ4/W9UPL QrzEt5zFOJ5tQ== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Thierry Reding > Sent: Tuesday, August 13, 2019 3:19 PM > To: Krishna Yarlagadda > Cc: gregkh@linuxfoundation.org; robh+dt@kernel.org; > mark.rutland@arm.com; Jonathan Hunter ; Laxman > Dewangan ; jslaby@suse.com; linux- > serial@vger.kernel.org; devicetree@vger.kernel.org; linux- > tegra@vger.kernel.org; linux-kernel@vger.kernel.org; Shardar Mohammed > > Subject: Re: [PATCH 05/14] serial: tegra: flush the RX fifo on frame erro= r >=20 > On Mon, Aug 12, 2019 at 04:58:14PM +0530, Krishna Yarlagadda wrote: > > From: Shardar Shariff Md > > > > FIFO reset/flush code implemented now does not follow programming > > guidelines. RTS line has to be turned off while flushing fifos to > > avoid new transfers. Also check LSR bits UART_LSR_TEMT and > UART_LSR_DR > > to confirm fifos are flushed. >=20 > You use inconsistent spelling for FIFO here. Will fix in next version and take care of this in all patches >=20 > > Signed-off-by: Shardar Shariff Md > > Signed-off-by: Krishna Yarlagadda > > --- > > drivers/tty/serial/serial-tegra.c | 15 +++++++++++++++ > > 1 file changed, 15 insertions(+) > > > > diff --git a/drivers/tty/serial/serial-tegra.c > > b/drivers/tty/serial/serial-tegra.c > > index ae7225c..f6a3f4e 100644 > > --- a/drivers/tty/serial/serial-tegra.c > > +++ b/drivers/tty/serial/serial-tegra.c > > @@ -266,6 +266,10 @@ static void tegra_uart_wait_sym_time(struct > > tegra_uart_port *tup, static void tegra_uart_fifo_reset(struct > > tegra_uart_port *tup, u8 fcr_bits) { > > unsigned long fcr =3D tup->fcr_shadow; > > + unsigned int lsr, tmout =3D 10000; > > + > > + if (tup->rts_active) > > + set_rts(tup, false); > > > > if (tup->cdata->allow_txfifo_reset_fifo_mode) { > > fcr |=3D fcr_bits & (UART_FCR_CLEAR_RCVR | > UART_FCR_CLEAR_XMIT); @@ > > -289,6 +293,17 @@ static void tegra_uart_fifo_reset(struct tegra_uart_p= ort > *tup, u8 fcr_bits) > > * to propagate, otherwise data could be lost. > > */ > > tegra_uart_wait_cycle_time(tup, 32); > > + > > + do { > > + lsr =3D tegra_uart_read(tup, UART_LSR); > > + if (lsr | UART_LSR_TEMT) > > + if (!(lsr & UART_LSR_DR)) >=20 > Can't both of these go on the same line? >=20 > Thierry >=20 They can be. Will fix in next version KY > > + break; > > + udelay(1); > > + } while (--tmout); > > + > > + if (tup->rts_active) > > + set_rts(tup, true); > > } > > > > static int tegra_set_baudrate(struct tegra_uart_port *tup, unsigned > > int baud) > > -- > > 2.7.4 > >