From: Paul Cercueil <paul@crapouillou.net>
To: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Cc: linus.walleij@linaro.org, linux-mips@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] pinctrl: ingenic: Convert to immutable irq chip
Date: Tue, 07 Jun 2022 17:26:53 +0100 [thread overview]
Message-ID: <TC84DR.BXHQAW8NSA8H@crapouillou.net> (raw)
In-Reply-To: <20220607110525.36922-1-aidanmacdonald.0x0@gmail.com>
Hi Aidan,
Le mar., juin 7 2022 at 12:05:25 +0100, Aidan MacDonald
<aidanmacdonald.0x0@gmail.com> a écrit :
> Update the driver to use an immutable IRQ chip to fix this warning:
>
> "not an immutable chip, please consider fixing it!"
>
> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
> ---
> drivers/pinctrl/pinctrl-ingenic.c | 33
> ++++++++++++++++++-------------
> 1 file changed, 19 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-ingenic.c
> b/drivers/pinctrl/pinctrl-ingenic.c
> index 1ca11616db74..37258fb05be3 100644
> --- a/drivers/pinctrl/pinctrl-ingenic.c
> +++ b/drivers/pinctrl/pinctrl-ingenic.c
> @@ -135,7 +135,6 @@ struct ingenic_pinctrl {
> struct ingenic_gpio_chip {
> struct ingenic_pinctrl *jzpc;
> struct gpio_chip gc;
> - struct irq_chip irq_chip;
> unsigned int irq, reg_base;
> };
>
> @@ -3419,6 +3418,8 @@ static void ingenic_gpio_irq_enable(struct
> irq_data *irqd)
> struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);
> int irq = irqd->hwirq;
>
> + gpiochip_enable_irq(gc, irq);
> +
> if (is_soc_or_above(jzgc->jzpc, ID_JZ4770))
> ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_INT, irq, true);
> else if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
> @@ -3443,6 +3444,8 @@ static void ingenic_gpio_irq_disable(struct
> irq_data *irqd)
> ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, false);
> else
> ingenic_gpio_set_bit(jzgc, JZ4730_GPIO_GPIER, irq, false);
> +
> + gpiochip_disable_irq(gc, irq);
> }
>
> static void ingenic_gpio_irq_ack(struct irq_data *irqd)
> @@ -3684,6 +3687,20 @@ static void ingenic_gpio_irq_release(struct
> irq_data *data)
> return gpiochip_relres_irq(gpio_chip, data->hwirq);
> }
>
> +static const struct irq_chip ingenic_gpio_irqchip = {
> + .name = "gpio",
> + .irq_enable = ingenic_gpio_irq_enable,
> + .irq_disable = ingenic_gpio_irq_disable,
> + .irq_unmask = ingenic_gpio_irq_unmask,
> + .irq_mask = ingenic_gpio_irq_mask,
> + .irq_ack = ingenic_gpio_irq_ack,
> + .irq_set_type = ingenic_gpio_irq_set_type,
> + .irq_set_wake = ingenic_gpio_irq_set_wake,
> + .irq_request_resources = ingenic_gpio_irq_request,
> + .irq_release_resources = ingenic_gpio_irq_release,
> + .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE,
> +};
> +
> static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc,
> int pin, int func)
> {
> @@ -4172,20 +4189,8 @@ static int __init ingenic_gpio_probe(struct
> ingenic_pinctrl *jzpc,
> if (!jzgc->irq)
> return -EINVAL;
>
> - jzgc->irq_chip.name = jzgc->gc.label;
> - jzgc->irq_chip.irq_enable = ingenic_gpio_irq_enable;
> - jzgc->irq_chip.irq_disable = ingenic_gpio_irq_disable;
> - jzgc->irq_chip.irq_unmask = ingenic_gpio_irq_unmask;
> - jzgc->irq_chip.irq_mask = ingenic_gpio_irq_mask;
> - jzgc->irq_chip.irq_ack = ingenic_gpio_irq_ack;
> - jzgc->irq_chip.irq_set_type = ingenic_gpio_irq_set_type;
> - jzgc->irq_chip.irq_set_wake = ingenic_gpio_irq_set_wake;
> - jzgc->irq_chip.irq_request_resources = ingenic_gpio_irq_request;
> - jzgc->irq_chip.irq_release_resources = ingenic_gpio_irq_release;
> - jzgc->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND;
> -
> girq = &jzgc->gc.irq;
> - girq->chip = &jzgc->irq_chip;
> + gpio_irq_chip_set_chip(girq, &ingenic_gpio_irqchip);
This will change each irq_chip's name to "gpio", do we want that?
You didn't remove jzgc->irq_chip, so maybe what you could do is
jzgc->irq_chip = ingenic_gpio_irqchip;
jzgc->irq_chip.name = jzgc->gc.label;
gpio_irq_chip_set_chip(girq, &jzgc->irq_chip);
Thoughts?
Cheers,
-Paul
> girq->parent_handler = ingenic_gpio_irq_handler;
> girq->num_parents = 1;
> girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),
> --
> 2.35.1
>
next prev parent reply other threads:[~2022-06-07 16:27 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-07 11:05 [PATCH] pinctrl: ingenic: Convert to immutable irq chip Aidan MacDonald
2022-06-07 16:26 ` Paul Cercueil [this message]
2022-06-07 16:47 ` Aidan MacDonald
2022-06-09 10:00 ` Paul Cercueil
2022-06-09 12:08 ` Marc Zyngier
2022-06-09 12:36 ` Paul Cercueil
2022-06-09 17:45 ` Aidan MacDonald
2022-06-10 14:14 ` Andy Shevchenko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=TC84DR.BXHQAW8NSA8H@crapouillou.net \
--to=paul@crapouillou.net \
--cc=aidanmacdonald.0x0@gmail.com \
--cc=linus.walleij@linaro.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).