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Fri, 24 Sep 2021 06:34:55 +0000 From: "tan.shaopeng@fujitsu.com" To: 'James Morse' , "'x86@kernel.org'" , "'linux-kernel@vger.kernel.org'" CC: 'Fenghua Yu' , 'Reinette Chatre' , 'Thomas Gleixner' , 'Ingo Molnar' , 'Borislav Petkov' , 'H Peter Anvin' , 'Babu Moger' , "'shameerali.kolothum.thodi@huawei.com'" , 'Jamie Iles' , 'D Scott Phillips OS' , "'lcherian@marvell.com'" , "'bobo.shaobowang@huawei.com'" , "tan.shaopeng@fujitsu.com" Subject: RE: [PATCH v1 13/20] x86/recstrl: Allow per-rmid arch private storage to be reset Thread-Topic: [PATCH v1 13/20] x86/recstrl: Allow per-rmid arch private storage to be reset Thread-Index: AQHXsQan+yJlIoUAO0qG+Q7vC6SdLquyt8fg Date: Fri, 24 Sep 2021 06:34:55 +0000 Message-ID: References: <20210729223610.29373-14-james.morse@arm.com> In-Reply-To: <20210729223610.29373-14-james.morse@arm.com> Accept-Language: ja-JP, en-US Content-Language: ja-JP X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: =?iso-2022-jp?B?TVNJUF9MYWJlbF9hNzI5NWNjMS1kMjc5LTQyYWMtYWI0ZC0zYjBmNGZl?= =?iso-2022-jp?B?Y2UwNTBfQWN0aW9uSWQ9M2M1Y2VlZjMtZDc2Yi00MzY4LTlhMDctZGZl?= =?iso-2022-jp?B?ZGZlNDc4MWM0O01TSVBfTGFiZWxfYTcyOTVjYzEtZDI3OS00MmFjLWFi?= =?iso-2022-jp?B?NGQtM2IwZjRmZWNlMDUwX0NvbnRlbnRCaXRzPTA7TVNJUF9MYWJlbF9h?= =?iso-2022-jp?B?NzI5NWNjMS1kMjc5LTQyYWMtYWI0ZC0zYjBmNGZlY2UwNTBfRW5hYmxl?= =?iso-2022-jp?B?ZD10cnVlO01TSVBfTGFiZWxfYTcyOTVjYzEtZDI3OS00MmFjLWFiNGQt?= =?iso-2022-jp?B?M2IwZjRmZWNlMDUwX01ldGhvZD1TdGFuZGFyZDtNU0lQX0xhYmVsX2E3?= =?iso-2022-jp?B?Mjk1Y2MxLWQyNzktNDJhYy1hYjRkLTNiMGY0ZmVjZTA1MF9OYW1lPUZV?= =?iso-2022-jp?B?SklUU1UtUkVTVFJJQ1RFRBskQiJMJT8lUhsoQjtNU0lQX0xhYmVsX2E3?= =?iso-2022-jp?B?Mjk1Y2MxLWQyNzktNDJhYy1hYjRkLTNiMGY0ZmVjZTA1MF9TZXREYXRl?= =?iso-2022-jp?B?PTIwMjEtMDktMjRUMDY6MjU6MDVaO01TSVBfTGFiZWxfYTcyOTVjYzEt?= =?iso-2022-jp?B?ZDI3OS00MmFjLWFiNGQtM2IwZjRmZWNlMDUwX1NpdGVJZD1hMTlmMTIx?= =?iso-2022-jp?B?ZC04MWUxLTQ4NTgtYTlkOC03MzZlMjY3ZmQ0Yzc7?= authentication-results: arm.com; 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charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: fujitsu.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TYAPR01MB6330.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 08263f9b-a90d-4619-63e0-08d97f256c4c X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Sep 2021 06:34:55.5993 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a19f121d-81e1-4858-a9d8-736e267fd4c7 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: NTqwG3/qwZfby82cEEo2qne2Bv2vEsGUCryFJMTpQAjK1xy+UU1WdPGTn+vzHgrQZMDDkqvtdgmZlXdc9YwzAiJZ42WLd3v7ZxIi00dJGtw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYCPR01MB6719 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi James, > To abstract the rmid counters into a helper that returns the number of by= tes > counted, architecture specific per-rmid state is needed. >=20 > It needs to be possible to reset this hidden state, as the values may out= live the > life of an rmid, or the mount time of the filesystem. >=20 > mon_event_read() is called with first =3D true when an rmid is first allo= cated in > mkdir_mondata_subdir(). Add resctrl_arch_reset_rmid() and call it from > __mon_event_count()'s rr->first check. >=20 > Signed-off-by: James Morse > --- > arch/x86/kernel/cpu/resctrl/internal.h | 18 ++++-------- > arch/x86/kernel/cpu/resctrl/monitor.c | 38 > +++++++++++++++++++++----- > include/linux/resctrl.h | 23 ++++++++++++++++ > 3 files changed, 59 insertions(+), 20 deletions(-) >=20 > diff --git a/arch/x86/kernel/cpu/resctrl/internal.h > b/arch/x86/kernel/cpu/resctrl/internal.h > index aaae900a8ef3..f3f31315a907 100644 > --- a/arch/x86/kernel/cpu/resctrl/internal.h > +++ b/arch/x86/kernel/cpu/resctrl/internal.h > @@ -22,14 +22,6 @@ >=20 > #define L2_QOS_CDP_ENABLE 0x01ULL >=20 > -/* > - * Event IDs are used to program IA32_QM_EVTSEL before reading event > - * counter from IA32_QM_CTR > - */ > -#define QOS_L3_OCCUP_EVENT_ID 0x01 > -#define QOS_L3_MBM_TOTAL_EVENT_ID 0x02 > -#define QOS_L3_MBM_LOCAL_EVENT_ID 0x03 > - > #define CQM_LIMBOCHECK_INTERVAL 1000 >=20 > #define MBM_CNTR_WIDTH_BASE 24 > @@ -73,7 +65,7 @@ DECLARE_STATIC_KEY_FALSE(rdt_mon_enable_key); > * @list: entry in &rdt_resource->evt_list > */ > struct mon_evt { > - u32 evtid; > + enum resctrl_event_id evtid; > char *name; > struct list_head list; > }; > @@ -90,9 +82,9 @@ struct mon_evt { > union mon_data_bits { > void *priv; > struct { > - unsigned int rid : 10; > - unsigned int evtid : 8; > - unsigned int domid : 14; > + unsigned int rid : 10; > + enum resctrl_event_id evtid : 8; > + unsigned int domid : 14; > } u; > }; >=20 > @@ -100,7 +92,7 @@ struct rmid_read { > struct rdtgroup *rgrp; > struct rdt_resource *r; > struct rdt_domain *d; > - int evtid; > + enum resctrl_event_id evtid; > bool first; > u64 val; > }; > diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c > b/arch/x86/kernel/cpu/resctrl/monitor.c > index af60e154f0ed..3b8b29470a5c 100644 > --- a/arch/x86/kernel/cpu/resctrl/monitor.c > +++ b/arch/x86/kernel/cpu/resctrl/monitor.c > @@ -137,7 +137,34 @@ static inline struct rmid_entry *__rmid_entry(u32 rm= id) > return entry; > } >=20 > -static u64 __rmid_read(u32 rmid, u32 eventid) > +static struct arch_mbm_state *get_arch_mbm_state(struct rdt_hw_domain > *hw_dom, > + u32 rmid, > + enum resctrl_event_id > eventid) > +{ > + switch (eventid) { > + case QOS_L3_OCCUP_EVENT_ID: > + return NULL; > + case QOS_L3_MBM_TOTAL_EVENT_ID: > + return &hw_dom->arch_mbm_total[rmid]; > + case QOS_L3_MBM_LOCAL_EVENT_ID: > + return &hw_dom->arch_mbm_local[rmid]; > + } > + Since it is unexpected to come here, it might be better to add WARN_ON. In addition, I have tested these patches on Intel(R) Xeon(R) Gold 6254 CPU = with resctrl selftest. It is no problem. Thanks, Shaopeng Tan > + return NULL; > +} > + > +void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *= d, > + u32 rmid, enum resctrl_event_id eventid) { > + struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); > + struct arch_mbm_state *m; > + > + m =3D get_arch_mbm_state(hw_dom, rmid, eventid); > + if (m) > + memset(m, 0, sizeof(*m)); > +} > + > +static u64 __rmid_read(u32 rmid, enum resctrl_event_id eventid) > { > u64 val; >=20 > @@ -291,6 +318,9 @@ static int __mon_event_count(u32 rmid, struct > rmid_read *rr) > struct mbm_state *m; > u64 chunks, tval; >=20 > + if (rr->first) > + resctrl_arch_reset_rmid(rr->r, rr->d, rmid, rr->evtid); > + > tval =3D __rmid_read(rmid, rr->evtid); > if (tval & (RMID_VAL_ERROR | RMID_VAL_UNAVAIL)) { > rr->val =3D tval; > @@ -306,12 +336,6 @@ static int __mon_event_count(u32 rmid, struct > rmid_read *rr) > case QOS_L3_MBM_LOCAL_EVENT_ID: > m =3D &rr->d->mbm_local[rmid]; > break; > - default: > - /* > - * Code would never reach here because > - * an invalid event id would fail the __rmid_read. > - */ > - return -EINVAL; > } >=20 > if (rr->first) { > diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index > 4fe2d5500315..79e83ce3dfbc 100644 > --- a/include/linux/resctrl.h > +++ b/include/linux/resctrl.h > @@ -32,6 +32,16 @@ enum resctrl_conf_type { >=20 > #define CDP_NUM_TYPES (CDP_DATA + 1) >=20 > +/* > + * Event IDs, the values match those used to program IA32_QM_EVTSEL > +before > + * reading IA32_QM_CTR on RDT systems. > + */ > +enum resctrl_event_id { > + QOS_L3_OCCUP_EVENT_ID =3D 0x01, > + QOS_L3_MBM_TOTAL_EVENT_ID =3D 0x02, > + QOS_L3_MBM_LOCAL_EVENT_ID =3D 0x03, > +}; > + > /** > * struct resctrl_staged_config - parsed configuration to be applied > * @new_ctrl: new ctrl value to be loaded > @@ -219,4 +229,17 @@ void resctrl_arch_get_config(struct rdt_resource *r, > struct rdt_domain *d, int resctrl_online_domain(struct rdt_resource *r, = struct > rdt_domain *d); void resctrl_offline_domain(struct rdt_resource *r, stru= ct > rdt_domain *d); >=20 > +/** > + * resctrl_arch_reset_rmid() - Reset any private state associated with r= mid > + * and eventid. > + * @r: The domain's resource. > + * @d: The rmid's domain. > + * @rmid: The rmid whose counter values should be reset. > + * @eventid: The eventid whose counter values should be reset. > + * > + * This can be called from any CPU. > + */ > +void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *= d, > + u32 rmid, enum resctrl_event_id eventid); > + > #endif /* _RESCTRL_H */ > -- > 2.30.2