From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966108AbcIZJ75 (ORCPT ); Mon, 26 Sep 2016 05:59:57 -0400 Received: from mail-db5eur01on0057.outbound.protection.outlook.com ([104.47.2.57]:4355 "EHLO EUR01-DB5-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S965947AbcIZJ7x (ORCPT ); Mon, 26 Sep 2016 05:59:53 -0400 From: Po Liu To: Rob Herring CC: Shawn Guo , "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , Roy Zang , Arnd Bergmann , Marc Zyngier , Stuart Yoder , Leo Li , "M.H. Lian" , Murali Karicheri , "Bjorn Helgaas" , Mingkai Hu Subject: RE: [PATCH v5 3/3] pci:aer: add support aer interrupt with none MSI/MSI-X/INTx mode Thread-Topic: [PATCH v5 3/3] pci:aer: add support aer interrupt with none MSI/MSI-X/INTx mode Thread-Index: AQHSDXq+mQIj497Zs02r28vBatnen6B+ctIAgAAm/QCACIHJAIAEXiSw Date: Mon, 26 Sep 2016 08:25:10 +0000 Message-ID: References: <1472625442-23309-2-git-send-email-po.liu@nxp.com> <1473741659-17618-1-git-send-email-po.liu@nxp.com> <1473741659-17618-3-git-send-email-po.liu@nxp.com> <20160918005212.GF15478@tiger> <20160923130620.GA1486@rob-hp-laptop> In-Reply-To: <20160923130620.GA1486@rob-hp-laptop> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=po.liu@nxp.com; x-originating-ip: [192.158.241.86] x-ms-office365-filtering-correlation-id: f44975e3-cfee-4e06-cc97-08d3e5e6a190 x-microsoft-exchange-diagnostics: 1;VI1PR0401MB2638;6:XnHd+uzOE1FCQ8+yVxLHX5+5c80cuq0x3Ukh2FaURf1zO2+WXmR4ivUgUjQFfpMCeFiiBCwhx8wc8Kmx7mW7mG4lWTW5jFHKYqQIiJdgPLzD0SHp73ZlbJJ/pX/NNNdclw5x4L/vHEzV5jk2mNOXNwpe6oiFRHTevrLjaYsoLLk14TjwzkoU012bJP54mcFSBHOwa3NRcDVKuBkH06sN1qA7uT6Q0hLyz1Um/ogHddLFwR6AzWF/8iYo1TEJFGzjtcznSh0+qM55lnsaMTNmZwh67XgBf+KrjtRwroxdBBq9DYoVZ++R5+Jxhtb2c0eV9SmFedstIcef7hI2h/dH3w==;5:TdZ7lUjThcwim4N9SvW3i6xAlhly5SN1gqrqVC3Zw2K3kHfhKdJ/wGZ+5rlxPY3SLUpBkAcdpfoTURDTciGKtHQ0MkgOemU5J9F123lFnAYIWUlM1Z1moeonHZxxLce0Qwi35psIq1/kXmNxJ7ttag==;24:P8AkflDftnCceMKty0dbqBiMe95GAOG2eJntb1NqKty0oOgtqQxMvsWoTBIatcLUfYO9XRbSAbEze893N13fiGKqwZqePbh8vaqP5YT5F8I=;7:R0CYKzP9c/GiHl9m7x65fbEBbpjlHmR7DAaj0qIIBuG4ZxZHppHbhXID7yyndQSzs6NnHw8L7ASKD5hsp5Ehq53jx8slRbNbMZT7yyD+xxAYGcQOigc5CeGd2XshKEYPWLzjvqykaSLmy6bjo2HiTj88ob4rQQEqiRVxxMuOSIuRJ9qBW8JDYdrUOOYLxT6pIrfb2/29JN+yLI3MYhmmLPqT4bAl4g24M+hai3xz72fyoaizJdvCU4yzalpdOYmLeQmlPXtinqd1WGYR8waUFvdwfZQQgbkmIxc7UnhQ1kSv7s7i3Gc8EHjiRwQ6ca/k x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:VI1PR0401MB2638; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(9452136761055)(185117386973197)(258649278758335); x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(6040176)(601004)(2401047)(8121501046)(5005006)(3002001)(10201501046)(6055026);SRVR:VI1PR0401MB2638;BCL:0;PCL:0;RULEID:;SRVR:VI1PR0401MB2638; x-forefront-prvs: 00770C4423 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6009001)(7916002)(13464003)(24454002)(199003)(189002)(377454003)(122556002)(76176999)(66066001)(101416001)(54356999)(5660300001)(3660700001)(105586002)(189998001)(50986999)(3280700002)(76576001)(6916009)(19580395003)(97736004)(86362001)(575784001)(106116001)(77096005)(106356001)(19580405001)(11100500001)(7696004)(6116002)(102836003)(33656002)(10400500002)(93886004)(87936001)(9686002)(586003)(5002640100001)(2900100001)(74316002)(92566002)(68736007)(7416002)(3846002)(8676002)(81166006)(4326007)(7846002)(2950100002)(81156014)(8936002)(110136003)(305945005)(2906002)(7736002);DIR:OUT;SFP:1101;SCL:1;SRVR:VI1PR0401MB2638;H:VI1PR0401MB1709.eurprd04.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;A:1;MX:1;LANG:en; spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Sep 2016 08:25:10.2279 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2638 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id u8QA0296002748 Hi Rob, > -----Original Message----- > From: Rob Herring [mailto:robh@kernel.org] > Sent: Friday, September 23, 2016 9:06 PM > To: Po Liu > Cc: Shawn Guo; linux-pci@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org; Roy Zang; Arnd Bergmann; Marc Zyngier; > Stuart Yoder; Leo Li; M.H. Lian; Murali Karicheri; Bjorn Helgaas; > Mingkai Hu > Subject: Re: [PATCH v5 3/3] pci:aer: add support aer interrupt with none > MSI/MSI-X/INTx mode > > On Sun, Sep 18, 2016 at 03:37:27AM +0000, Po Liu wrote: > > Hi Shawn, > > > > > > > -----Original Message----- > > > From: Shawn Guo [mailto:shawnguo@kernel.org] > > > Sent: Sunday, September 18, 2016 8:52 AM > > > To: Po Liu > > > Cc: linux-pci@vger.kernel.org; > > > linux-arm-kernel@lists.infradead.org; > > > linux-kernel@vger.kernel.org; devicetree@vger.kernel.org; Roy Zang; > > > Arnd Bergmann; Marc Zyngier; Stuart Yoder; Leo Li; M.H. Lian; > > > Murali Karicheri; Bjorn Helgaas; Mingkai Hu > > > Subject: Re: [PATCH v5 3/3] pci:aer: add support aer interrupt with > > > none MSI/MSI-X/INTx mode > > > > > > On Tue, Sep 13, 2016 at 12:40:59PM +0800, Po Liu wrote: > > > > On some platforms, root port doesn't support MSI/MSI-X/INTx in RC > mode. > > > > When chip support the aer interrupt with none MSI/MSI-X/INTx > > > mode, > maybe there is interrupt line for aer pme etc. Search the > > > interrupt > number in the fdt file. Then fixup the dev->irq with it. > > > > > > > > Signed-off-by: Po Liu > > > > > > Will the new kernel work with existing/old DTB? I'm trying to > > > understand the dependency between driver and DTS changes. > > > > Yes, We've never use name 'intr' before. So we remove it is ok. > > 'aer' is a dts name for researching it's true interrupt number by > > kernel. This patch is first time to use name 'aer'. So it must be > > compatible with existing/old DTB. > > Please explain why you are not breaking compatibility in the commit > message. I asked for this on v2. Sorry, I didn't really catch what your means. Do you mean I should add why I remove the 'intr'? > > > > > --- > > > > changes for v5: > > > > - Add clear 'aer' interrup-names description > > > > > > > > .../devicetree/bindings/pci/layerscape-pci.txt | 11 +++++--- > > > > drivers/pci/pcie/portdrv_core.c | 31 > > > +++++++++++++++++++--- > > > > 2 files changed, 35 insertions(+), 7 deletions(-) > > diff > > > --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt > > > > b/Documentation/devicetree/bindings/pci/layerscape-pci.txt > > > > index 41e9f55..101d0a7 100644 > > > > --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt > > > > +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt > > > > @@ -18,8 +18,10 @@ Required properties: > > > > - reg: base addresses and lengths of the PCIe controller > - > > > interrupts: A list of interrupt outputs of the controller. Must > > > contain an > > > > entry for each entry in the interrupt-names property. > > > > -- interrupt-names: Must include the following entries: > > > > - "intr": The interrupt that is asserted for controller > > > interrupts > +- interrupt-names: It may be include the following > entries: > > "may be" is not okay. It should be "must" or explain when an interrupt > would not be present. Really, differences in interrupts means you need > different compatible strings. How about changing "must" to "should" or "could" and also add when to add after "aer": to explain when to add it? Thanks! > > Rob > > > > > + "aer": The interrupt that is asserted for aer interrupt > + > > > "pme": The interrupt that is asserted for pme interrupt > + ......