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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: 80+JfbvDmd1g/jUt1P67RrtBIqY5FOH99baTGq/0jpq1AJ+48zf4aH7SwlmM/rTsQnZM2Jm44g9gUphhyJXJCF9cWuq5x3DTiXEpOhKo0yphC8hSrWlPJYnlN+Ow8uh3s04Qn8HXeiPJmKa8xid+AeNWfQTEU0GyfWxfFiy6AQXJom/c6EMT4sUZJJiMRJmX6FMAu113lF8QwsE1jXm7yRRfu7GhmbZu8ykoPrHUibDB/NgZYiCH18Nn6w6/FhZl/0FB9Pg2epVcfu6UAD/7WPMLMtoQ2dFaAk7Hiq+OiANQwtg2ZR8Fum4G7zv915CxUJK3lf5okN+mzBapFEyfqM9b4cblkE1OZCjPOaEs4FM= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f6fdcada-b919-45f9-abf2-08d654559f70 X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Nov 2018 10:46:44.2217 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB5838 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/27/18 12:06 PM, Lucas Stach wrote:=0A= > Hi Andrey,=0A= > =0A= > Am Montag, den 26.11.2018, 10:24 -0800 schrieb Andrey Smirnov:=0A= >> On Tue, Nov 20, 2018 at 2:49 AM Leonard Crestez wrote:=0A= >>>=0A= >>> On Sat, 2018-11-17 at 10:12 -0800, Andrey Smirnov wrote:=0A= >>>> @@ -921,7 +1004,28 @@ static int imx6_pcie_probe(struct platform_devic= e *pdev)=0A= >>>> -=A0=A0=A0=A0=A0case IMX7D:=0A= >>>> +=A0=A0=A0=A0=A0case IMX8MQ:=0A= >>>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0if (of_property_read_u32(node,= "fsl,iomux-gpr1x",=0A= >>>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0&imx6_pcie->gpr1x)) {=0A= >>>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0dev_er= r(dev, "Failed to get GPR1x address\n");=0A= >>>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0return= -EINVAL;=0A= >>>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0}=0A= >>>=0A= >>> This is for distinguishing multiple controllers on the SOC but other=0A= >>> registers and bits might differ. Isn't it preferable to have a property= =0A= >>> for controller id instead of adding many registers to DT?=0A= >>=0A= >> I liked encoding necessary info in DT directly slightly better than=0A= >> encoding abstract ID and then decoding it further in the driver code.=0A= >> OTOH, I am not really attached to that path. Lucas, can you comment on= =0A= >> this please?=0A= > =0A= > Yes, after rereading the patch with this in mind I agree that having=0A= > the GPR offset on DT directly is IMO the better approach than an=0A= > abstract ID.=0A= =0A= But it's not a single offset, for example the device_type (EP/RC) has =0A= bits for the two controllers side-by-side in GPR12.=0A= =0A= Adding a "ctrl-id" property would fully describe the hardware from the =0A= start. If we add per-register information instead then when other =0A= registers are used we'll get DT compatibility headaches.=0A= =0A= It's worth noting that 8qm/8qxp also have multiple controllers with a =0A= different set of bits placed differently in iomuxc.=0A=