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From: Conor Dooley <conor@kernel.org>
To: Hal Feng <hal.feng@starfivetech.com>
Cc: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Ben Dooks <ben.dooks@sifive.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 19/19] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree
Date: Mon, 27 Feb 2023 18:12:33 +0000	[thread overview]
Message-ID: <Y/zykfydb+bJ7G2l@spud> (raw)
In-Reply-To: <2af3f84b-2c2b-dc79-c76c-9411fcbcf7ca@starfivetech.com>

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On Thu, Feb 23, 2023 at 04:50:20PM +0800, Hal Feng wrote:
> On Tue, 21 Feb 2023 16:03:08 +0100, Emil Renner Berthing wrote:
> > On Tue, 21 Feb 2023 at 03:47, Hal Feng <hal.feng@starfivetech.com> wrote:
> >> From: Emil Renner Berthing <kernel@esmil.dk>
> >>
> >> Add a minimal device tree for StarFive JH7110 VisionFive 2 board
> >> which has version A and version B. Support booting and basic
> >> clock/reset/pinctrl/uart drivers.
> >>
> >> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> >> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> >> Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com>
> >> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
> >> Co-developed-by: Hal Feng <hal.feng@starfivetech.com>
> >> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> >> ---
> >>  arch/riscv/boot/dts/starfive/Makefile         |   6 +-
> >>  .../jh7110-starfive-visionfive-2-v1.2a.dts    |  13 ++
> >>  .../jh7110-starfive-visionfive-2-v1.3b.dts    |  13 ++
> >>  .../jh7110-starfive-visionfive-2.dtsi         | 215 ++++++++++++++++++
> >>  4 files changed, 246 insertions(+), 1 deletion(-)
> >>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> >>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
> >>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> >>
> >> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> >> index 039c143cba33..cd73519b907b 100644
> >> --- a/arch/riscv/boot/dts/starfive/Makefile
> >> +++ b/arch/riscv/boot/dts/starfive/Makefile
> >> @@ -1,2 +1,6 @@
> >>  # SPDX-License-Identifier: GPL-2.0
> >> -dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> >> +dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb
> >> +dtb-$(CONFIG_SOC_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
> >> +
> >> +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
> >> +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb

If you could rebase on top of v6.3-rc1 for the next version & use ARCH_
not SOC_ here that'd be great.

> >> +/ {
> >> +       aliases {
> >> +               serial0 = &uart0;
> >> +               i2c0 = &i2c0;
> >> +               i2c2 = &i2c2;
> >> +               i2c5 = &i2c5;
> >> +               i2c6 = &i2c6;
> > 
> > Let's keep these sorted alphabetically.
> 
> OK, will fix it.
> 

> > It would be great to have some sort of order to this file so it's
> > obvious where to add new nodes. I suggest we do
> > - root node
> > - external clocks
> > - other node references in alphabetical order
> > 
> > You're almost there with this patch except the uart0 node is out of place.
> 
> Will fix accordingly. Thanks for your suggestions.

With Emil's suggestions implemented:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.


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  reply	other threads:[~2023-02-27 18:12 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-21  2:46 [PATCH v4 00/19] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2023-02-21  2:46 ` [PATCH v4 01/19] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng
2023-02-21  2:46 ` [PATCH v4 02/19] clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h Hal Feng
2023-02-21  2:46 ` [PATCH v4 03/19] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2023-02-21  2:46 ` [PATCH v4 04/19] reset: Create subdirectory for StarFive drivers Hal Feng
2023-02-21  2:46 ` [PATCH v4 05/19] reset: starfive: Factor out common JH71X0 reset code Hal Feng
2023-02-21 17:10   ` Conor Dooley
2023-02-21  2:46 ` [PATCH v4 06/19] reset: starfive: Extract the " Hal Feng
2023-02-21 17:13   ` Conor Dooley
2023-02-21  2:46 ` [PATCH v4 07/19] reset: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2023-02-21 17:17   ` Conor Dooley
2023-02-21  2:46 ` [PATCH v4 08/19] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng
2023-02-21  2:46 ` [PATCH v4 09/19] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng
2023-02-21 17:23   ` Conor Dooley
2023-02-23  3:40     ` Hal Feng
2023-02-22  9:13   ` Krzysztof Kozlowski
2023-02-22 10:40     ` Conor Dooley
2023-02-23 10:22       ` Hal Feng
2023-02-21  2:46 ` [PATCH v4 10/19] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng
2023-02-21 17:26   ` Conor Dooley
2023-02-23  5:52     ` Hal Feng
2023-03-09 14:22   ` Geert Uytterhoeven
2023-03-13  2:29     ` Hal Feng
2023-02-21  2:46 ` [PATCH v4 11/19] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng
2023-02-21 15:12   ` Conor Dooley
2023-02-23  6:17     ` Hal Feng
2023-02-26 16:07   ` Emil Renner Berthing
2023-02-28  2:30     ` Hal Feng
2023-02-21  2:46 ` [PATCH v4 12/19] clk: starfive: Add StarFive JH7110 always-on " Hal Feng
2023-02-26 17:34   ` Emil Renner Berthing
2023-02-28  2:42     ` Hal Feng
2023-03-09  9:43       ` Hal Feng
2023-03-09 14:06         ` Emil Renner Berthing
2023-03-09 18:11           ` Conor Dooley
2023-03-09 18:19             ` Emil Renner Berthing
2023-03-09 19:32               ` Palmer Dabbelt
2023-02-21  2:46 ` [PATCH v4 13/19] reset: starfive: Add StarFive JH7110 reset driver Hal Feng
2023-02-21 15:33   ` Emil Renner Berthing
2023-02-21 16:34     ` Conor Dooley
2023-02-23  6:48       ` Hal Feng
2023-02-23  6:29     ` Hal Feng
2023-02-21  2:46 ` [PATCH v4 14/19] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2023-02-21  2:46 ` [PATCH v4 15/19] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2023-02-21  2:46 ` [PATCH v4 16/19] dt-bindings: riscv: Add SiFive S7 compatible Hal Feng
2023-02-21 11:38   ` Krzysztof Kozlowski
2023-02-21 15:10   ` Conor Dooley
2023-02-21  2:46 ` [PATCH v4 17/19] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng
2023-02-21 17:03   ` Conor Dooley
2023-02-23  7:16     ` Hal Feng
2023-02-27 18:10       ` Conor Dooley
2023-02-21  2:46 ` [PATCH v4 18/19] riscv: dts: starfive: Add StarFive JH7110 pin function definitions Hal Feng
2023-02-21  2:46 ` [PATCH v4 19/19] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree Hal Feng
2023-02-21 15:03   ` Emil Renner Berthing
2023-02-23  8:50     ` Hal Feng
2023-02-27 18:12       ` Conor Dooley [this message]
2023-02-27 20:00         ` Conor Dooley
2023-02-28  2:58           ` Hal Feng
2023-02-22 15:00 ` [PATCH v4 00/19] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC patchwork-bot+linux-riscv
2023-03-03 19:08 ` Tommaso Merciai
2023-03-06  3:29   ` Hal Feng
2023-03-06 10:22     ` Tommaso Merciai
2023-03-07  8:36 ` Hal Feng
2023-03-07  8:51   ` Conor Dooley
2023-03-07 10:08     ` Hal Feng
2023-03-08 12:28       ` Tommaso Merciai
2023-03-08 13:36         ` Conor Dooley
2023-03-09 16:49           ` Tommaso Merciai
2023-03-09 17:52             ` Conor Dooley
2023-03-09 18:58               ` Tommaso Merciai
2023-03-09 19:03                 ` Conor Dooley
2023-03-10  7:48                   ` Tommaso Merciai

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