From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FC01C43219 for ; Fri, 21 Oct 2022 10:14:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230117AbiJUKOK (ORCPT ); Fri, 21 Oct 2022 06:14:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57464 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230452AbiJUKNm (ORCPT ); Fri, 21 Oct 2022 06:13:42 -0400 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 726F77AB08; Fri, 21 Oct 2022 03:13:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=ooz5VtSjs4RZMmj3qfhcsaEMXb528lP3FjIYWM1xcMc=; b=u2LjmYm+CRL3dWou+qpwpdagKS 7NsqLW5RzyDxZQyFIWn5lZcJ+RhPvoFMW8jTUvgSIL18F1n4WxqbWWvp2tsflWlAx/H0Ush/f1qAq PjSG89JWlJvjit26gWit1CwruYOYJHeuihgxguw47Kt6gYxizytite+2CcXk6A47D5pkj9Cd5jtHm CpZjFVFzxsnvFd70EfvcRF4DjSYuE5p07TXfLy9KGVlqJ9rS7Jgzl6Ffhet9t6VH67MfrJcUgSRym c0X2/lxVehA3xDRMaC+cV1Z/fYO7X5u5pXq4EQ1eqNK0fqHrYsMvEM9J2zNXYFicFCLcIRZhoLNe+ EoJOch+A==; Received: from j130084.upc-j.chello.nl ([24.132.130.84] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1olp11-00D3h4-2X; Fri, 21 Oct 2022 10:12:35 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id A5EDF300155; Fri, 21 Oct 2022 12:12:27 +0200 (CEST) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 8DB9E209A1C9E; Fri, 21 Oct 2022 12:12:27 +0200 (CEST) Date: Fri, 21 Oct 2022 12:12:27 +0200 From: Peter Zijlstra To: Linus Torvalds Cc: the arch/x86 maintainers , Yu Zhao , Andrew Morton , Andi Kleen , Aneesh Kumar , Catalin Marinas , Dave Hansen , Hillf Danton , Jens Axboe , Johannes Weiner , Jonathan Corbet , Matthew Wilcox , Mel Gorman , Michael Larabel , Michal Hocko , Mike Rapoport , Tejun Heo , Vlastimil Babka , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, page-reclaim@google.com, Brian Geffon , Jan Alexander Steffens , Oleksandr Natalenko , Steven Barrett , Suleiman Souhlal , Daniel Byrne , Donald Carr , Holger =?iso-8859-1?Q?Hoffst=E4tte?= , Konstantin Kharlamov , Shuang Zhai , Sofia Trinh , Vaibhav Jain Subject: Re: [PATCH v14 08/14] mm: multi-gen LRU: support page table walks Message-ID: References: <20220815071332.627393-1-yuzhao@google.com> <20220815071332.627393-9-yuzhao@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 20, 2022 at 07:10:46PM -0700, Linus Torvalds wrote: > Maybe we should just bite the bullet, and say that we only support > x86-32 with 'cmpxchg8b' (ie Pentium and later). > > Get rid of all the "emulate 64-bit atomics with cli/sti, knowing that > nobody has SMP on those CPU's anyway", and implement a generic x86-32 > xchg() setup using that try_cmpxchg64 loop. > > I think most (all?) distros already enable X86_PAE anyway, which makes > that X86_CMPXCHG64 be part of the base requirement. > > Not that I'm convinced most distros even do 32-bit development anyway > these days. > > (Of course, if we require X86_CMPXCHG64, we'll also hit some of the > odd clone CPU's that actually *do* support the instruction, but do not > report it in cpuid due to an odd old Windows NT bug. IOW, things like > the Cyrix and Transmeta CPU's did support the instruction, but had the > CX8 bit clear because otherwise NT wouldn't boot. We may or may not > get those cases right, but I doubt anybody really has any of those old > CPUs). > > We got rid of i386 support back in 2012. Maybe it's time to get rid of > i486 support in 2022? > > That way we could finally get rid of CONFIG_MATH_EMULATION too. Would love that; but as pointed out, there's still a few stragglers out there. OTOH, they *could* use one of the LTS kernels.