From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8C1CC38A2D for ; Wed, 26 Oct 2022 11:55:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233339AbiJZLzt (ORCPT ); Wed, 26 Oct 2022 07:55:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231937AbiJZLzq (ORCPT ); Wed, 26 Oct 2022 07:55:46 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20B0DAA3EB; Wed, 26 Oct 2022 04:55:46 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AAFCC61E5A; Wed, 26 Oct 2022 11:55:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0715FC433C1; Wed, 26 Oct 2022 11:55:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1666785345; bh=Pxq8mKgAK7SZAZtzyx61wd600ewnbz1pLQkko6CDjTU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Y6/QtF3fFCUuWmwUKxrYcRcA6N0lYc5vViotYovq85s6jDR1tNz4nDlr7ZC9MVDLW IPyVR+vO4jvjoKcA7M0i3ATj/8WXUxMvDOTeybKTYbBSrBA3j0IZDZ1cjD6l6wGana 5vY54Bs9jtIx+WSJStpXQJCICctEerYmTOK3AlFDYumfMDA9K0OB8uRA5w06h9/GEp C9x4yNNApzvieaUg+hoXyvWDbgP3jXK5cZfRbrr8QbdpBanYbZcivXKvQGIQdTo+kD ukbX3F1tkPUEfAHnrU/3obYq+hATgSg1/RNoVPs9B5UuyXh9M2TowYim0F/hh94iUn XGQb4YXtM5xaQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1onf0J-0007FN-VE; Wed, 26 Oct 2022 13:55:28 +0200 Date: Wed, 26 Oct 2022 13:55:27 +0200 From: Johan Hovold To: Bjorn Andersson Cc: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , Kuogee Hsieh , Sankeerth Billakanti , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 10/12] arm64: dts: qcom: sc8280xp: Define some of the display blocks Message-ID: References: <20221026032624.30871-1-quic_bjorande@quicinc.com> <20221026032624.30871-11-quic_bjorande@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221026032624.30871-11-quic_bjorande@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 25, 2022 at 08:26:22PM -0700, Bjorn Andersson wrote: > From: Bjorn Andersson > > Define the display clock controllers, the MDSS instances, the DP phys > and connect these together. > > Signed-off-by: Bjorn Andersson > Signed-off-by: Bjorn Andersson > --- > > Changes since v2: > - New patch on list > > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 838 +++++++++++++++++++++++++ > 1 file changed, 838 insertions(+) > + mdss0_mdp_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-200000000 { > + opp-hz = /bits/ 64 <200000000>; > + required-opps = <&rpmhpd_opp_low_svs>; > + }; > + > + opp-300000000 { > + opp-hz = /bits/ 64 <300000000>; > + required-opps = <&rpmhpd_opp_svs>; > + }; > + > + opp-375000000 { > + opp-hz = /bits/ 64 <375000000>; > + required-opps = <&rpmhpd_opp_svs_l1>; > + }; > + > + opp-500000000 { > + opp-hz = /bits/ 64 <500000000>; > + required-opps = <&rpmhpd_opp_nom>; > + }; > + opp-600000000 { Super nit: missing newline between entries (I only noticed when rebasing the external DP support on top). > + opp-hz = /bits/ 64 <600000000>; > + required-opps = <&rpmhpd_opp_turbo_l1>; > + }; > + }; > + }; > + mdss1_mdp_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-200000000 { > + opp-hz = /bits/ 64 <200000000>; > + required-opps = <&rpmhpd_opp_low_svs>; > + }; > + > + opp-300000000 { > + opp-hz = /bits/ 64 <300000000>; > + required-opps = <&rpmhpd_opp_svs>; > + }; > + > + opp-375000000 { > + opp-hz = /bits/ 64 <375000000>; > + required-opps = <&rpmhpd_opp_svs_l1>; > + }; > + > + opp-500000000 { > + opp-hz = /bits/ 64 <500000000>; > + required-opps = <&rpmhpd_opp_nom>; > + }; > + opp-600000000 { > + opp-hz = /bits/ 64 <600000000>; > + required-opps = <&rpmhpd_opp_turbo_l1>; > + }; Ditto. > + }; > + }; Johan