From: Sean Christopherson <seanjc@google.com>
To: Like Xu <like.xu.linux@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/8] KVM: VMX: Refactor intel_pmu_set_msr() to align with other set_msr() helpers
Date: Fri, 27 Jan 2023 02:09:20 +0000 [thread overview]
Message-ID: <Y9MyUHhIRtImjoyd@google.com> (raw)
In-Reply-To: <20221111102645.82001-3-likexu@tencent.com>
On Fri, Nov 11, 2022, Like Xu wrote:
> From: Sean Christopherson <seanjc@google.com>
>
> Invert the flows in intel_pmu_set_msr()'s case statements so that they
> follow the kernel's preferred style of:
>
> if (<not valid>)
> return <error>
>
> <commit change>
> return <success>
>
> which is also the style used by every other set_msr() helper (except
> AMD's PMU variant, which doesn't use a switch statement).
>
> Opportunstically move the "val == current" checks below the validity
> checks. Except for the one-off case for MSR_P6_EVNTSEL2, the reserved
> bit checks are extremely cheap, and the guest is unlikely to frequently
> write the current value, i.e. avoiding the reserved bit checks doesn't
> add much (any?) value.
>
> No functional change intended.
>
> Signed-off-by: Sean Christopherson <seanjc@google.com>
FYI, I'm going to post this separately and extend it to give the get_msr() flow
the same treatment. I'll plan on getting it queued sooner than later so that
this series can use it as a base.
next prev parent reply other threads:[~2023-01-27 2:09 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-11 10:26 [PATCH v3 0/8] KVM: x86: Add AMD Guest PerfMonV2 PMU support Like Xu
2022-11-11 10:26 ` [PATCH v3 1/8] KVM: x86/pmu: Rename pmc_is_enabled() to pmc_is_globally_enabled() Like Xu
2023-01-27 2:03 ` Sean Christopherson
2023-02-02 11:46 ` Like Xu
2022-11-11 10:26 ` [PATCH v3 2/8] KVM: VMX: Refactor intel_pmu_set_msr() to align with other set_msr() helpers Like Xu
2023-01-27 2:09 ` Sean Christopherson [this message]
2022-11-11 10:26 ` [PATCH v3 3/8] KVM: x86/pmu: Rewrite reprogram_counters() to improve performance Like Xu
2023-01-20 1:09 ` Sean Christopherson
2023-01-24 20:16 ` Sean Christopherson
2022-11-11 10:26 ` [PATCH v3 4/8] KVM: x86/pmu: Make part of the Intel v2 PMU MSRs handling x86 generic Like Xu
2022-11-11 10:26 ` [PATCH v3 5/8] KVM: x86/cpuid: Add X86_FEATURE_AMD_PMU_V2 as a KVM-only leaf entry Like Xu
2023-01-24 19:47 ` Sean Christopherson
2023-02-06 11:47 ` Like Xu
2023-02-10 1:32 ` Sean Christopherson
2022-11-11 10:26 ` [PATCH v3 6/8] KVM: x86/svm/pmu: Add AMD PerfMonV2 support Like Xu
2023-01-25 0:10 ` Sean Christopherson
2023-02-06 7:53 ` Like Xu
2023-02-06 22:22 ` Sean Christopherson
2022-11-11 10:26 ` [PATCH v3 7/8] KVM: x86/cpuid: Add AMD CPUID ExtPerfMonAndDbg leaf 0x80000022 Like Xu
2023-01-25 0:16 ` Sean Christopherson
2022-11-11 10:26 ` [PATCH v3 8/8] KVM: x86/cpuid: Use fast return for cpuid "0xa" leaf when !enable_pmu Like Xu
2023-01-20 1:11 ` Sean Christopherson
2022-12-06 8:32 ` [PATCH v3 0/8] KVM: x86: Add AMD Guest PerfMonV2 PMU support Like Xu
2023-01-20 1:13 ` Sean Christopherson
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