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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id r2sm1155200oie.1.2021.01.21.09.18.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Jan 2021 09:18:20 -0800 (PST) Date: Thu, 21 Jan 2021 11:18:18 -0600 From: Bjorn Andersson To: Linus Walleij Cc: Andy Gross , Rob Herring , MSM , "open list:GPIO SUBSYSTEM" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 1/3] dt-bindings: pinctrl: qcom: Define common TLMM binding Message-ID: References: <20210120222114.1609779-1-bjorn.andersson@linaro.org> <20210120222114.1609779-2-bjorn.andersson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu 21 Jan 07:20 CST 2021, Linus Walleij wrote: > On Wed, Jan 20, 2021 at 11:21 PM Bjorn Andersson > wrote: > > > Several properties are shared between all TLMM bindings. By providing a > > common binding to define these properties each platform's binding can be > > reduced to just listing which of these properties should be checked for > > - or further specified. > > > > Signed-off-by: Bjorn Andersson > > Overall it looks good, just cutting some slack for reviewers (especially > DT people) before applying. > > > +description: > > + This defines the common properties used to describe all Qualcomm TLMM > > + bindings and pinconf/pinmux states for these. > > I vaguely recall asking you in the past what the acronym TLMM actually > means. This would be a good place to expand the acronym so people > know what these four letters actually represent. > As Vinod said, it's used in a few places and I agree that we should spell it out here. In particular I had to include "phandle" in the list of valid properties for for the dtbs_check to pass when there are references to state nodes, so I would like to hear from Rob about that. Will respin this after getting his input - hopefully with his Ack ;) > (There, I finally gave you an official reason to go and poke Qualcomm > hardware engineers about this. ;) > :) Regards, Bjorn