From: "Krzysztof Wilczyński" <kw@linux.com>
To: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
bhelgaas@google.com
Subject: Re: [PATCH 1/2] PCI: xilinx-nwl: Enable coherent PCIe DMA traffic using CCI
Date: Wed, 10 Feb 2021 22:45:13 +0100 [thread overview]
Message-ID: <YCRT6QVQai3oIvwf@rocinante> (raw)
In-Reply-To: <20210209101955.8836-1-bharat.kumar.gogada@xilinx.com>
Hi Bharat,
Thank you for sending the patches over!
> Add support for routing PCIe DMA traffic coherently when
> Cache Coherent Interconnect (CCI) is enabled in the system.
> The "dma-coherent" property is used to determine if CCI is enabled
> or not.
> Refer https://developer.arm.com/documentation/ddi0470/k/preface
> for CCI specification.
[...]
A small nitpick, so feel free to ignore, of course.
Perhaps "Refer to" and "for the CCI", etc.
[...]
> + /* This routes the PCIe DMA traffic to go through CCI path */
> + if (of_dma_is_coherent(dev->of_node)) {
> + nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, BRCFG_PCIE_RX1) |
> + CFG_PCIE_CACHE, BRCFG_PCIE_RX1);
> + }
[...]
A suggestion.
You can drop the curly brackets here if you want to keep the style used
in the kernel, especially for when there is a single statement inside
the code block.
Krzysztof
next prev parent reply other threads:[~2021-02-10 21:46 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-09 10:19 [PATCH 1/2] PCI: xilinx-nwl: Enable coherent PCIe DMA traffic using CCI Bharat Kumar Gogada
2021-02-09 10:19 ` [PATCH 2/2] PCI: xilinx-nwl: Add optional "dma-coherent" property Bharat Kumar Gogada
2021-02-10 21:45 ` Krzysztof Wilczyński [this message]
2021-02-18 9:58 ` [PATCH 1/2] PCI: xilinx-nwl: Enable coherent PCIe DMA traffic using CCI Bharat Kumar Gogada
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