Re: [PATCH v5 (RESEND) 1/7] phy: phy-hi3670-usb3: move driver from staging into phy

From: Vinod Koul <vkoul@kernel.org>
To: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Alex Dewar <alex.dewar90@gmail.com>,
	Atul Gopinathan <leoatul12@gmail.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Rob Herring <robh+dt@kernel.org>, Yu Chen <chenyu56@huawei.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-phy@lists.infradead.org, linux-staging@lists.linux.dev,
	Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v5 (RESEND) 1/7] phy: phy-hi3670-usb3: move driver from staging into phy
Date: Wed, 31 Mar 2021 18:16:19 +0530	[thread overview]
Message-ID: <YGRvG+3sD0gX2I+b@vkoul-mobl.Dlink> (raw)
In-Reply-To: <36c31dcdcd49d5a728a1fe4040bbaef5268d7f79.1616695231.git.mchehab+huawei@kernel.org>

On 25-03-21, 19:05, Mauro Carvalho Chehab wrote:
> The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> for mainstream. Mode it from staging into the main driver's
> phy/ directory.

Overall lgtm, some nits below. With those fixed:

Acked-By: Vinod Koul <vkoul@kernel.org>

> +static int hi3670_phy_cr_clk(struct regmap *usb31misc)
> +{
> +	int ret;
> +
> +	/* Clock up */
> +	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
> +				 CFG54_USB31PHY_CR_CLK, CFG54_USB31PHY_CR_CLK);
> +	if (ret)
> +		return ret;
> +
> +	/* Clock down */
> +	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
> +				 CFG54_USB31PHY_CR_CLK, 0);
> +
> +	return ret;

return regmap_update_bits() ?
 (i see few more in driver like this, pls change others as well)

> +static int hi3670_phy_cr_read(struct regmap *usb31misc, u32 addr, u32 *val)
> +{
> +	int reg;
> +	int i;
> +	int ret;

all these could be in a single line

-- 
~Vinod