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[35.247.111.240]) by smtp.gmail.com with ESMTPSA id k1sm13323160pfa.30.2021.05.25.11.21.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 May 2021 11:21:24 -0700 (PDT) Date: Tue, 25 May 2021 18:21:21 +0000 From: Sean Christopherson To: Paolo Bonzini Cc: "Stamatis, Ilias" , "mlevitsk@redhat.com" , "kvm@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "jmattson@google.com" , "Woodhouse, David" , "vkuznets@redhat.com" , "joro@8bytes.org" , "mtosatti@redhat.com" , "zamsden@gmail.com" , "wanpengli@tencent.com" Subject: Re: [PATCH v3 09/12] KVM: VMX: Remove vmx->current_tsc_ratio and decache_tsc_multiplier() Message-ID: References: <20210521102449.21505-1-ilstam@amazon.com> <20210521102449.21505-10-ilstam@amazon.com> <2b3bc8aff14a09c4ea4a1b648f750b5ffb1a15a0.camel@redhat.com> <8a13dedc5bc118072d1e79d8af13b5026de736b3.camel@amazon.com> <0220f903-2915-f072-b1da-0b58fc07f416@redhat.com> <204c0b60-5e39-eb61-da85-705c56604cde@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <204c0b60-5e39-eb61-da85-705c56604cde@redhat.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 25, 2021, Paolo Bonzini wrote: > On 25/05/21 18:34, Sean Christopherson wrote: > > > I actually like the idea of storing the expected value in kvm_vcpu and the > > > current value in loaded_vmcs. We might use it for other things such as > > > reload_vmcs01_apic_access_page perhaps. > > I'm not necessarily opposed to aggressively shadowing the VMCS, but if we go > > that route then it should be a standalone series that implements a framework > > that can be easily extended to arbitrary fields. Adding fields to loaded_vmcs > > one at a time will be tedious and error prone. E.g. what makes TSC_MULTIPLIER > > more special than TSC_OFFSET, GUEST_IA32_PAT, GUEST_IA32_DEBUGCTL, GUEST_BNDCFGS, > > and other number of fields that are likely to persist for a given vmcs02? > > That it can be changed via ioctls in a way that affects both vmcs01 and vmcs02. That holds true for any MSR that is conditionally loaded/cleared on enter/exit, e.g. userspace can stuff MSR_IA32_CR_PAT while L2 is active, and that can affect L1 if L1 is running without VM_EXIT_LOAD_IA32_PAT. I'm not saying that the above is likely, but neither is changing the TSC scaling ratio while L2 is active (I assume it occurs on migration, but in the grand scheme that's not a common operation).