From: Peter Zijlstra <peterz@infradead.org>
To: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Cc: Ingo Molnar <mingo@kernel.org>,
Juri Lelli <juri.lelli@redhat.com>,
Vincent Guittot <vincent.guittot@linaro.org>,
Dietmar Eggemann <dietmar.eggemann@arm.com>,
Steven Rostedt <rostedt@goodmis.org>,
Ben Segall <bsegall@google.com>, Mel Gorman <mgorman@suse.de>,
Len Brown <len.brown@intel.com>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
Tim Chen <tim.c.chen@linux.intel.com>,
Aubrey Li <aubrey.li@linux.intel.com>,
"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
Ricardo Neri <ricardo.neri@intel.com>,
Quentin Perret <qperret@google.com>,
"Joel Fernandes (Google)" <joel@joelfernandes.org>,
linux-kernel@vger.kernel.org, Aubrey Li <aubrey.li@intel.com>,
Daniel Bristot de Oliveira <bristot@redhat.com>,
Michael Ellerman <mpe@ellerman.id.au>,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v3 5/6] sched/fair: Consider SMT in ASYM_PACKING load balance
Date: Wed, 19 May 2021 11:59:48 +0200 [thread overview]
Message-ID: <YKThlA2yZBT2KuvW@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20210518190740.GA15251@ranerica-svr.sc.intel.com>
On Tue, May 18, 2021 at 12:07:40PM -0700, Ricardo Neri wrote:
> On Fri, May 14, 2021 at 07:14:15PM -0700, Ricardo Neri wrote:
> > On Fri, May 14, 2021 at 11:47:45AM +0200, Peter Zijlstra wrote:
> > > So I'm thinking that this is a property of having ASYM_PACKING at a core
> > > level, rather than some arch special. Wouldn't something like this be
> > > more appropriate?
> > Thanks Peter for the quick review! This makes sense to me. The only
> > reason we proposed arch_asym_check_smt_siblings() is because we were
> > about breaking powerpc (I need to study how they set priorities for SMT,
> > if applicable). If you think this is not an issue I can post a
> > v4 with this update.
>
> As far as I can see, priorities in powerpc are set by the CPU number.
> However, I am not sure how CPUs are enumerated? If CPUs in brackets are
> SMT sibling, Does an enumeration looks like A) [0, 1], [2, 3] or B) [0, 2],
> [1, 3]? I guess B is the right answer. Otherwise, both SMT siblings of a
> core would need to be busy before a new core is used.
>
> Still, I think the issue described in the cover letter may be
> reproducible in powerpc as well. If CPU3 is offlined, and [0, 2] pulled
> tasks from [1, -] so that both CPU0 and CPU2 become busy, CPU1 would not be
> able to help since CPU0 has the highest priority.
>
> I am cc'ing the linuxppc list to get some feedback.
IIRC the concern with Power is that their Cores can go faster if the
higher SMT siblings are unused.
That is, suppose you have an SMT4 Core with only a single active task,
then if only SMT0 is used it can reach max performance, but if the
active sibling is SMT1 it can not reach max performance, and if the only
active sibling is SMT2 it goes slower still.
So they need to pack the tasks to the lowest SMT siblings, and have the
highest SMT siblings idle (where possible) in order to increase
performance.
next prev parent reply other threads:[~2021-05-19 10:02 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-13 15:49 [PATCH v3 0/6] sched/fair: Fix load balancing of SMT siblings with ASYM_PACKING Ricardo Neri
2021-05-13 15:49 ` [PATCH v3 1/6] sched/topology: Introduce sched_group::flags Ricardo Neri
2021-05-13 15:49 ` [PATCH v3 2/6] sched/fair: Optimize checking for group_asym_packing Ricardo Neri
2021-05-13 15:49 ` [PATCH v3 3/6] sched/fair: Provide update_sg_lb_stats() with sched domain statistics Ricardo Neri
2021-05-13 15:49 ` [PATCH v3 4/6] sched/fair: Carve out logic to mark a group for asymmetric packing Ricardo Neri
2021-05-17 14:21 ` Dietmar Eggemann
2021-05-18 19:18 ` Ricardo Neri
2021-05-13 15:49 ` [PATCH v3 5/6] sched/fair: Consider SMT in ASYM_PACKING load balance Ricardo Neri
2021-05-14 9:47 ` Peter Zijlstra
2021-05-15 2:14 ` Ricardo Neri
2021-05-18 19:07 ` Ricardo Neri
2021-05-19 9:59 ` Peter Zijlstra [this message]
2021-05-19 11:09 ` Nicholas Piggin
2021-05-19 12:05 ` Srikar Dronamraju
2021-05-17 15:18 ` Dietmar Eggemann
2021-05-18 19:10 ` Ricardo Neri
2021-05-17 22:28 ` Joel Fernandes
2021-05-17 22:34 ` Joel Fernandes
2021-05-13 15:49 ` [PATCH v3 6/6] x86/sched: Enable SMT checks for asymmetric packing in load balancing Ricardo Neri
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