From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5ACDC433B4 for ; Wed, 19 May 2021 10:47:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AB6E661355 for ; Wed, 19 May 2021 10:47:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240665AbhESKtC (ORCPT ); Wed, 19 May 2021 06:49:02 -0400 Received: from mail.kernel.org ([198.145.29.99]:43308 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240007AbhESKtB (ORCPT ); Wed, 19 May 2021 06:49:01 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id DBFBA611BD; Wed, 19 May 2021 10:47:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1621421261; bh=SXc+hAJjey2h+VFj3gyn7xrlOb7KS62mh1je1KAkZYM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Oq/FOCI0KLWwj9CX+OKZZ/sWYz+u7RO3yGdlQj3XT1e6GUXE69wUpill4kA645JoL e0B8JwnAhu79JyCXMqoYqgEiJtcSELZPTVNpuKiBuUkTMWA/I+O8axtWPCdPtHqPvt yLwxuwlJydNNFthpuuSzEe7ShL1K4SVQ4Dl20qQc= Date: Wed, 19 May 2021 12:47:39 +0200 From: Greg Kroah-Hartman To: Anup Patel Cc: Anup Patel , Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Paolo Bonzini , Jonathan Corbet , Alexander Graf , Atish Patra , Alistair Francis , Damien Le Moal , KVM General , kvm-riscv@lists.infradead.org, linux-riscv , linux-doc@vger.kernel.org, "linux-kernel@vger.kernel.org List" , linux-staging@lists.linux.dev Subject: Re: [PATCH v18 00/18] KVM RISC-V Support Message-ID: References: <20210519033553.1110536-1-anup.patel@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 19, 2021 at 07:21:54AM +0200, Greg Kroah-Hartman wrote: > On Wed, May 19, 2021 at 10:40:13AM +0530, Anup Patel wrote: > > On Wed, May 19, 2021 at 10:28 AM Greg Kroah-Hartman > > wrote: > > > > > > On Wed, May 19, 2021 at 09:05:35AM +0530, Anup Patel wrote: > > > > From: Anup Patel > > > > > > > > This series adds initial KVM RISC-V support. Currently, we are able to boot > > > > Linux on RV64/RV32 Guest with multiple VCPUs. > > > > > > > > Key aspects of KVM RISC-V added by this series are: > > > > 1. No RISC-V specific KVM IOCTL > > > > 2. Minimal possible KVM world-switch which touches only GPRs and few CSRs > > > > 3. Both RV64 and RV32 host supported > > > > 4. Full Guest/VM switch is done via vcpu_get/vcpu_put infrastructure > > > > 5. KVM ONE_REG interface for VCPU register access from user-space > > > > 6. PLIC emulation is done in user-space > > > > 7. Timer and IPI emuation is done in-kernel > > > > 8. Both Sv39x4 and Sv48x4 supported for RV64 host > > > > 9. MMU notifiers supported > > > > 10. Generic dirtylog supported > > > > 11. FP lazy save/restore supported > > > > 12. SBI v0.1 emulation for KVM Guest available > > > > 13. Forward unhandled SBI calls to KVM userspace > > > > 14. Hugepage support for Guest/VM > > > > 15. IOEVENTFD support for Vhost > > > > > > > > Here's a brief TODO list which we will work upon after this series: > > > > 1. SBI v0.2 emulation in-kernel > > > > 2. SBI v0.2 hart state management emulation in-kernel > > > > 3. In-kernel PLIC emulation > > > > 4. ..... and more ..... > > > > > > > > This series can be found in riscv_kvm_v18 branch at: > > > > https//github.com/avpatel/linux.git > > > > > > > > Our work-in-progress KVMTOOL RISC-V port can be found in riscv_v7 branch > > > > at: https//github.com/avpatel/kvmtool.git > > > > > > > > The QEMU RISC-V hypervisor emulation is done by Alistair and is available > > > > in master branch at: https://git.qemu.org/git/qemu.git > > > > > > > > To play around with KVM RISC-V, refer KVM RISC-V wiki at: > > > > https://github.com/kvm-riscv/howto/wiki > > > > https://github.com/kvm-riscv/howto/wiki/KVM-RISCV64-on-QEMU > > > > https://github.com/kvm-riscv/howto/wiki/KVM-RISCV64-on-Spike > > > > > > > > Changes since v17: > > > > - Rebased on Linux-5.13-rc2 > > > > - Moved to new KVM MMU notifier APIs > > > > - Removed redundant kvm_arch_vcpu_uninit() > > > > - Moved KVM RISC-V sources to drivers/staging for compliance with > > > > Linux RISC-V patch acceptance policy > > > > > > What is this new "patch acceptance policy" and what does it have to do > > > with drivers/staging? > > > > The Linux RISC-V patch acceptance policy is here: > > Documentation/riscv/patch-acceptance.rst > > > > As-per this policy, the Linux RISC-V maintainers will only accept > > patches for frozen/ratified RISC-V extensions. Basically, it links the > > Linux RISC-V development process with the RISC-V foundation > > process which is painfully slow. > > > > The KVM RISC-V patches have been sitting on the lists for almost > > 2 years now. The requirements for freezing RISC-V H-extension > > (hypervisor extension) keeps changing and we are not clear when > > it will be frozen. In fact, quite a few people have already implemented > > RISC-V H-extension in hardware as well and KVM RISC-V works > > on real HW as well. > > > > Rationale of moving KVM RISC-V to drivers/staging is to continue > > KVM RISC-V development without breaking the Linux RISC-V patch > > acceptance policy until RISC-V H-extension is frozen. Once, RISC-V > > H-extension is frozen we will move KVM RISC-V back to arch/riscv > > (like other architectures). > > Wait, no, this has nothing to do with what drivers/staging/ is for and > how it is used. Again, not ok. > > > > What does drivers/staging/ have to do with this at all? Did anyone ask > > > the staging maintainer about this? > > > > Yes, Paolo (KVM maintainer) suggested having KVM RISC-V under > > drivers/staging until RISC-V H-extension is frozen and continue the > > KVM RISC-V development from there. > > staging is not for stuff like this at all. It is for code that is > self-contained (not this) and needs work to get merged into the main > part of the kernel (listed in a TODO file, and is not this). > > It is not a dumping ground for stuff that arch maintainers can not seem > to agree on, and it is not a place where you can just randomly play > around with user/kernel apis with no consequences. > > So no, sorry, not going to take this code at all. And to be a bit more clear about this, having other subsystem maintainers drop their unwanted code on this subsystem, _without_ even asking me first is just not very nice. All of a sudden I am now responsible for this stuff, without me even being asked about it. Should I start throwing random drivers into the kvm subsystem for them to maintain because I don't want to? :) If there's really no other way to do this, than to put it in staging, let's talk about it. But saying "this must go here" is not a conversation... thanks, greg k-h