From: Peter Zijlstra <peterz@infradead.org>
To: Leo Yan <leo.yan@linaro.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Ingo Molnar <mingo@redhat.com>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Namhyung Kim <namhyung@kernel.org>,
Andi Kleen <ak@linux.intel.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 1/2] perf auxtrace: Change to use SMP memory barriers
Date: Mon, 31 May 2021 17:48:03 +0200 [thread overview]
Message-ID: <YLUFMzxin1PpgIdZ@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20210531145302.GC9324@leoy-ThinkPad-X240s>
On Mon, May 31, 2021 at 10:53:02PM +0800, Leo Yan wrote:
> Hi Peter, Adrian,
>
> On Thu, May 27, 2021 at 11:57:37AM +0200, Peter Zijlstra wrote:
> > On Thu, May 27, 2021 at 12:24:15PM +0300, Adrian Hunter wrote:
> >
> > > > If all we want is a compiler barrier, then shouldn't that be what we use?
> > > > i.e. barrier()
>
> Sorry for a bit late. Just bring up one question before I respin
> this patch set.
>
> > > I guess you are saying we still need to stop potential re-ordering across
> > > CPUs, so please ignore my comments.
> >
> > Right; so the ordering issue is real, consider:
> >
> > CPU0 (kernel) CPU1 (user)
> >
> > write data read head
> > smp_wmb() smp_rmb()
> > write head read data
>
> One thing should be mentioned is the Linux kernel has _not_ used an
> explict "smb_wmb()" between writing AUX trace data and updating header
> "aux_head". Please see the function perf_aux_output_end():
I think we pushed that into the driver. There is nothing the generic
code can do here.
It is the drivers responsibility of ensuring the data is stable before
calling perf_aux_output_end() or something along those lines.
next prev parent reply other threads:[~2021-05-31 17:22 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-19 14:03 [PATCH v1 1/2] perf auxtrace: Change to use SMP memory barriers Leo Yan
2021-05-19 14:03 ` [PATCH v1 2/2] perf auxtrace: Optimize barriers with load-acquire and store-release Leo Yan
2021-05-31 15:10 ` Leo Yan
2021-05-31 15:55 ` Peter Zijlstra
2021-05-31 19:03 ` Adrian Hunter
2021-06-01 6:33 ` Leo Yan
2021-06-01 6:58 ` Peter Zijlstra
2021-06-01 9:07 ` Adrian Hunter
2021-06-01 9:17 ` Peter Zijlstra
2021-06-01 9:45 ` Adrian Hunter
2021-06-01 9:48 ` Peter Zijlstra
2021-06-01 14:56 ` Leo Yan
2021-06-01 6:48 ` Peter Zijlstra
2021-05-27 7:54 ` [PATCH v1 1/2] perf auxtrace: Change to use SMP memory barriers Adrian Hunter
2021-05-27 8:11 ` Peter Zijlstra
2021-05-27 8:25 ` Adrian Hunter
2021-05-27 9:24 ` Adrian Hunter
2021-05-27 9:57 ` Peter Zijlstra
2021-05-31 14:53 ` Leo Yan
2021-05-31 15:48 ` Peter Zijlstra [this message]
2021-06-01 3:21 ` Leo Yan
2021-05-27 9:45 ` Peter Zijlstra
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