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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id o20sm371996ook.40.2021.06.17.11.08.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Jun 2021 11:08:44 -0700 (PDT) Date: Thu, 17 Jun 2021 13:08:43 -0500 From: Bjorn Andersson To: Martin Botka Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, jamipkettunen@somainline.org, Andy Gross , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/2] arch: arm64: dts: qcom: Add support for SM6125 Message-ID: References: <20210613080522.25230-1-martin.botka@somainline.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed 16 Jun 08:01 CDT 2021, Martin Botka wrote: > > > On Tue, Jun 15 2021 at 07:29:49 PM -0500, Bjorn Andersson > wrote: > > On Sun 13 Jun 03:05 CDT 2021, Martin Botka wrote: > > > > > This commits adds the Device tree file for SM6125 SoC. > > > > > > Signed-off-by: Martin Botka > > > > Thanks for your work on this Martin, just spotted a few minor finishing > > touches below. > > :) > > > > > > --- > > > Changes in V2: > > > Update compatibles for mailbox & pinctrl > > > Changes in V3: > > > Fix reg for sdhci1 > > > Replace hc_mem with hc and core_mem with core > > > arch/arm64/boot/dts/qcom/sm6125.dtsi | 603 > > > +++++++++++++++++++++++++++ > > > 1 file changed, 603 insertions(+) > > > create mode 100644 arch/arm64/boot/dts/qcom/sm6125.dtsi > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi > > > b/arch/arm64/boot/dts/qcom/sm6125.dtsi [..] > > > + sdc2_state_off: sdc2-off { > > > > This should be common between all boards (except possibly the cd line), > > so this is okay to share here. > > Do you want me to move the cd as well or > do you want it to stay in here? > While the pin assignment typically follows the reference design, in my view it's just any random GPIO and hence better suited to live in the board file. Regards, Bjorn