From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 838C5C48BE5 for ; Tue, 22 Jun 2021 18:36:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5B15D61289 for ; Tue, 22 Jun 2021 18:36:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232523AbhFVSjA (ORCPT ); Tue, 22 Jun 2021 14:39:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46464 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231297AbhFVSi7 (ORCPT ); Tue, 22 Jun 2021 14:38:59 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0C3B7C061756 for ; Tue, 22 Jun 2021 11:36:43 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id h1so10905841plt.1 for ; Tue, 22 Jun 2021 11:36:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=1QBBjNwfaVF7Ipv8w2OJCC7fG5ClgOQKcBvL6eDfXh0=; b=VB80WzIPcsnlE/p80VwR7GhK75UuVyxl6Z10E8bIr5+Zj8FAuyYJVBbzQHj18JA6j5 wjbzKFHzUdOIqFj6de6wrsN088tkxcObzTm4nVblt6ZevDERjteoXFtA8pT73/YT/YPI XDds1Fe5JkOqys6xm/k3RjN0koZ6TfYY6aaRA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=1QBBjNwfaVF7Ipv8w2OJCC7fG5ClgOQKcBvL6eDfXh0=; b=BkE2wBuiEk/C+DAEBuFYj8lddeN8GLWLEDMdoDCWHwHE9fJ0EiUKcfmeBXYMZMEwEt KWlpkuntgUX4QeSt+BN23Im6owsoux4mcq/7vhLXa8ze8OYgHB7JgIWBi5RXB/z2B9gU IW1b8x0wq6jZP9WaIuqufZgUGu1fu4IQxCz9MHD2pxbFR35JgP4KPgO1GxQi9l9QnF6d UjQcC9wj8faEDRjsgPnR8ASeFAqoK0+O6C7D3JlJLS0rocrM2R9w3hiAmHer8+0WMdv9 HDjrTcis1U9mycPG4tpL6LTgCgUSRmRQimwMI/Nryo9D2atCxOXQHw3M2LwFnI9fQe1B 7p1A== X-Gm-Message-State: AOAM533nxYocXtERsGS3hYTc9w4mKZ88grFF1yxv9IX+mdOG7nEHFQV4 raX6abMDQ5E2wihemfBJZV4f4g== X-Google-Smtp-Source: ABdhPJwkAc7+XdjK4uZl3VgfQY0ZstQsryDfYmOBg3QcvzwALmDWfeOR89rDVldL8j8Z5YoqDtx5sw== X-Received: by 2002:a17:903:2c2:b029:101:9c88:d928 with SMTP id s2-20020a17090302c2b02901019c88d928mr23989245plk.62.1624387002615; Tue, 22 Jun 2021 11:36:42 -0700 (PDT) Received: from localhost ([2620:15c:202:201:dc21:8b6f:f8cd:9070]) by smtp.gmail.com with UTF8SMTPSA id l201sm53483pfd.183.2021.06.22.11.36.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 22 Jun 2021 11:36:42 -0700 (PDT) Date: Tue, 22 Jun 2021 11:36:40 -0700 From: Matthias Kaehlcke To: Chanwoo Choi Cc: andrew-sh.cheng@mediatek.com, hsinyi@chromium.org, sibis@codeaurora.org, saravanak@google.com, myungjoo.ham@samsung.com, kyungmin.park@samsung.com, chanwoo@kernel.org, cwchoi00@gmail.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Saravana Kannan Subject: Re: [PATCH 3/4] PM / devfreq: Add cpu based scaling support to passive governor Message-ID: References: <20210617060546.26933-1-cw00.choi@samsung.com> <20210617060546.26933-4-cw00.choi@samsung.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20210617060546.26933-4-cw00.choi@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jun 17, 2021 at 03:05:45PM +0900, Chanwoo Choi wrote: > From: Saravana Kannan > > Many CPU architectures have caches that can scale independent of the > CPUs. Frequency scaling of the caches is necessary to make sure that the > cache is not a performance bottleneck that leads to poor performance and > power. The same idea applies for RAM/DDR. > > To achieve this, this patch adds support for cpu based scaling to the > passive governor. This is accomplished by taking the current frequency > of each CPU frequency domain and then adjust the frequency of the cache > (or any devfreq device) based on the frequency of the CPUs. It listens > to CPU frequency transition notifiers to keep itself up to date on the > current CPU frequency. > > To decide the frequency of the device, the governor does one of the > following: > * Derives the optimal devfreq device opp from required-opps property of > the parent cpu opp_table. > > * Scales the device frequency in proportion to the CPU frequency. So, if > the CPUs are running at their max frequency, the device runs at its > max frequency. If the CPUs are running at their min frequency, the > device runs at its min frequency. It is interpolated for frequencies > in between. > > Signed-off-by: Saravana Kannan > [Sibi: Integrated cpu-freqmap governor into passive_governor] > Signed-off-by: Sibi Sankar > [Chanwoo: Fix conflict with latest code and clean code up] > Signed-off-by: Chanwoo Choi > --- > drivers/devfreq/governor.h | 22 +++ > drivers/devfreq/governor_passive.c | 264 ++++++++++++++++++++++++++++- > include/linux/devfreq.h | 16 +- > 3 files changed, 293 insertions(+), 9 deletions(-) > > diff --git a/drivers/devfreq/governor.h b/drivers/devfreq/governor.h > index 9a9495f94ac6..3c36c92c89a9 100644 > --- a/drivers/devfreq/governor.h > +++ b/drivers/devfreq/governor.h > @@ -47,6 +47,28 @@ > #define DEVFREQ_GOV_ATTR_POLLING_INTERVAL BIT(0) > #define DEVFREQ_GOV_ATTR_TIMER BIT(1) > > +/** > + * struct devfreq_cpu_data - Hold the per-cpu data > + * @dev: reference to cpu device. > + * @first_cpu: the cpumask of the first cpu of a policy. > + * @opp_table: reference to cpu opp table. > + * @cur_freq: the current frequency of the cpu. > + * @min_freq: the min frequency of the cpu. > + * @max_freq: the max frequency of the cpu. > + * > + * This structure stores the required cpu_data of a cpu. > + * This is auto-populated by the governor. > + */ > +struct devfreq_cpu_data { > + struct device *dev; > + unsigned int first_cpu; > + > + struct opp_table *opp_table; > + unsigned int cur_freq; > + unsigned int min_freq; > + unsigned int max_freq; > +}; > + > /** > * struct devfreq_governor - Devfreq policy governor > * @node: list node - contains registered devfreq governors > diff --git a/drivers/devfreq/governor_passive.c b/drivers/devfreq/governor_passive.c > index fc09324a03e0..07e864509b7e 100644 > --- a/drivers/devfreq/governor_passive.c > +++ b/drivers/devfreq/governor_passive.c > @@ -8,11 +8,84 @@ > */ > > #include > +#include > +#include > +#include > +#include > #include > #include > #include "governor.h" > > -static int devfreq_passive_get_target_freq(struct devfreq *devfreq, > +#define HZ_PER_KHZ 1000 > + > +static unsigned long get_taget_freq_by_required_opp(struct device *p_dev, > + struct opp_table *p_opp_table, > + struct opp_table *opp_table, > + unsigned long freq) > +{ s/get_taget_freq_by_required_opp/get_target_freq_by_required_opp/