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From: "Michał Mirosław" <mirq-linux@rere.qmqm.pl>
To: Adrian Hunter <adrian.hunter@intel.com>
Cc: Michal Simek <michal.simek@xilinx.com>,
	Kevin Liu <kliu5@marvell.com>,
	Suneel Garapati <suneel.garapati@xilinx.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org,
	Al Cooper <alcooperx@gmail.com>
Subject: Re: [PATCH v4 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit
Date: Sat, 7 Aug 2021 16:12:52 +0200	[thread overview]
Message-ID: <YQ6U5EeOPzCvLT8z@qmqm.qmqm.pl> (raw)
In-Reply-To: <2cdb95f3-8943-715a-d3d7-804953e49786@intel.com>

On Wed, Aug 04, 2021 at 03:33:56PM +0300, Adrian Hunter wrote:
> On 25/07/21 12:20 pm, Michał Mirosław wrote:
> > Push handling of clock frequency dependence for
> > SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN quirk to the drivers that use it.
> What is the max_clk dependency for, and why push it down?

I guess this is a workaround for a hardware issue. When I wrote this,
there was only a single user. Now I don't know if the second user got
the limit by accident or just uses the flag not knowing it doesn't work
as the quirk name suggests. IOW this makes it easier to fix in drivers
if the limit is wrong or irrelevant. The dependency doesn't feel like
it belongs to the generic driver anyway.

[...]
> > @@ -318,6 +317,9 @@ static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc
> >  	sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
> >  	sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
> >  
> > +	if (sdhci_pltfm_clk_get_max_clock(host) <= 25000000)
> > +		host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
> > +
> >  	return 0;
> >  }
> >  
> > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> > index 0993f7d0ce8e..cfa314e659bc 100644
> > --- a/drivers/mmc/host/sdhci.c
> > +++ b/drivers/mmc/host/sdhci.c
> > @@ -1905,8 +1905,7 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
> >  			/* Version 3.00 divisors must be a multiple of 2. */
> >  			if (host->max_clk <= clock) {
> >  				div = 1;
> > -				if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
> > -					&& host->max_clk <= 25000000)
> > +				if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
> >  					div = 2;
> >  			} else {
> >  				for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;

  reply	other threads:[~2021-08-07 14:12 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-25  9:20 [PATCH v4 0/5] SDHCI clock handling fixes and cleanups Michał Mirosław
2021-07-25  9:20 ` [PATCH v4 1/5] mmc: sdhci: fix base clock usage in preset value Michał Mirosław
2021-08-04 10:50   ` Adrian Hunter
2021-07-25  9:20 ` [PATCH v4 2/5] mmc: sdhci: always obey programmable clock config " Michał Mirosław
2021-08-04 10:52   ` Adrian Hunter
2021-08-07 14:05     ` Michał Mirosław
2021-08-12  9:54       ` Adrian Hunter
2021-07-25  9:20 ` [PATCH v4 3/5] mmc: sdhci: fix SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN Michał Mirosław
2021-08-04 11:06   ` Adrian Hunter
2021-08-07 14:08     ` Michał Mirosław
2021-07-25  9:20 ` [PATCH v4 5/5] mmc: sdhci: simplify v2/v3+ clock calculation Michał Mirosław
2021-08-04 12:40   ` Adrian Hunter
2021-08-07 15:39     ` Michał Mirosław
2021-07-25  9:20 ` [PATCH v4 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit Michał Mirosław
2021-08-04 12:33   ` Adrian Hunter
2021-08-07 14:12     ` Michał Mirosław [this message]
2021-08-12 10:01       ` Adrian Hunter

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