Re: [perf] fuzzer triggers unchecked MSR access error: WRMSR to 0x318

From: Peter Zijlstra <peterz@infradead.org>
To: "Liang, Kan" <kan.liang@linux.intel.com>
Cc: Vince Weaver <vincent.weaver@maine.edu>,
	linux-kernel@vger.kernel.org, Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
	"Liang, Kan" <kan.liang@intel.com>
Subject: Re: [perf] fuzzer triggers unchecked MSR access error: WRMSR to 0x318
Date: Thu, 29 Jul 2021 17:30:12 +0200	[thread overview]
Message-ID: <YQLJhAiYQKtvvhjJ@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <45bee582-0f89-5125-82e7-92caf8b741ea@linux.intel.com>

On Thu, Jul 29, 2021 at 09:21:01AM -0400, Liang, Kan wrote:
> 
> 
> On 7/29/2021 5:14 AM, Peter Zijlstra wrote:
> > On Wed, Jul 28, 2021 at 12:49:43PM -0400, Vince Weaver wrote:
> > > [32694.087403] unchecked MSR access error: WRMSR to 0x318 (tried to write 0x0000000000000000) at rIP: 0xffffffff8106f854 (native_write_msr+0x4/0x20)
> > > [32694.101374] Call Trace:
> > > [32694.103974]  perf_clear_dirty_counters+0x86/0x100
> > 
> > Hmm.. if I read this right that's MSR_ARCH_PERFMON_FIXED_CTR0 + i, given
> > that FIXED_CTR0 is 0x309 that gives i == 15, which is FIXED_BTS.
> > 
> > I'm thinking something like this ought to cure things.
> > 
> > ---
> >   arch/x86/events/core.c | 12 +++++++-----
> >   1 file changed, 7 insertions(+), 5 deletions(-)
> > 
> > diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> > index 1eb45139fcc6..04edf8017961 100644
> > --- a/arch/x86/events/core.c
> > +++ b/arch/x86/events/core.c
> > @@ -2489,13 +2489,15 @@ void perf_clear_dirty_counters(void)
> >   		return;
> >   	for_each_set_bit(i, cpuc->dirty, X86_PMC_IDX_MAX) {
> > -		/* Metrics and fake events don't have corresponding HW counters. */
> > -		if (is_metric_idx(i) || (i == INTEL_PMC_IDX_FIXED_VLBR))
> > -			continue;
> > -		else if (i >= INTEL_PMC_IDX_FIXED)
> > +		if (i >= INTEL_PMC_IDX_FIXED) {
> > +			/* Metrics and fake events don't have corresponding HW counters. */
> > +			if ((i - INTEL_PMC_IDX_FIXED) >= x86_pmu.num_counters_fixed)
> 
> Yes, the fix is better. My previous implementation tries to pick up all the
> special cases. It's very likely to miss some special cases like FIXED_BTS
> and probably any new fake events added later if there are.
> Thanks for the fix.
> 
> The x86_pmu.num_counters_fixed should work well on HSW. But we have hybrid
> machines now. I think we can use
> hybrid(cpuc->pmu, num_counters_fixed) instead, which should be more
> accurate.

Yes, good point. I guess I still need to adjust to the hybrid world.