From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2BE4C432BE for ; Mon, 16 Aug 2021 13:37:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BCF2B6323E for ; Mon, 16 Aug 2021 13:37:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238894AbhHPNhy (ORCPT ); Mon, 16 Aug 2021 09:37:54 -0400 Received: from mga01.intel.com ([192.55.52.88]:60290 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237230AbhHPNhR (ORCPT ); Mon, 16 Aug 2021 09:37:17 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10077"; a="237925164" X-IronPort-AV: E=Sophos;i="5.84,326,1620716400"; d="scan'208";a="237925164" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Aug 2021 06:35:48 -0700 X-IronPort-AV: E=Sophos;i="5.84,326,1620716400"; d="scan'208";a="509701852" Received: from smile.fi.intel.com (HELO smile) ([10.237.68.40]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Aug 2021 06:35:45 -0700 Received: from andy by smile with local (Exim 4.94.2) (envelope-from ) id 1mFcmA-00APGI-NO; Mon, 16 Aug 2021 16:35:38 +0300 Date: Mon, 16 Aug 2021 16:35:38 +0300 From: Andy Shevchenko To: "Rafael J. Wysocki" Cc: Linux Kernel Mailing List , "open list:GPIO SUBSYSTEM" , ACPI Devel Maling List , Thomas Gleixner , Ingo Molnar , Borislav Petkov , the arch/x86 maintainers , "H. Peter Anvin" , Hans de Goede , Linus Walleij , Bartosz Golaszewski , "Rafael J. Wysocki" Subject: Re: [PATCH v1 1/1] x86/platform: Increase maximum GPIO number for X86_64 Message-ID: References: <20210806143711.37553-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 16, 2021 at 03:25:13PM +0200, Rafael J. Wysocki wrote: > On Fri, Aug 6, 2021 at 4:44 PM Andy Shevchenko > wrote: > > > > By default the 512 GPIOs is a maximum on any x86 platform. > > With, for example, Intel Tiger Lake-H the SoC based controller > > occupies up to 480 pins. This leaves only 32 available for > > GPIO expanders or other drivers, like PMIC. Hence, bump the > > maximum GPIO number to 1024 for X86_64 and leave 512 for X86_32. Thanks for review, my answers below. > > +# The GPIO number here must be sorted by descending number. In case of > > +# a multiplatform kernel, we just want the highest value required by the > > +# selected platforms. > > +config ARCH_NR_GPIO > > + int > > + default 1024 if X86_64 > > + default 512 if X86_32 > > + default 0 > > Wouldn't > > default 1024 if X86_64 > default 512 > > be sufficient? > > It's either X86_64 or X86_32 anyway AFAICS. I guess so. > > + help > > + Maximum number of GPIOs in the system. > > + > > + If unsure, leave the default value. Btw, what do you think. do we need comment above and help text here? I copied these from ARM, but I'm not sure it would be useful on x86 as much. -- With Best Regards, Andy Shevchenko