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[34.68.225.194]) by smtp.gmail.com with ESMTPSA id g14sm418990ila.28.2021.09.01.15.04.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Sep 2021 15:04:08 -0700 (PDT) Date: Wed, 1 Sep 2021 22:04:04 +0000 From: Oliver Upton To: Raghavendra Rao Ananta Cc: Paolo Bonzini , Marc Zyngier , James Morse , Alexandru Elisei , Suzuki K Poulose , Catalin Marinas , Will Deacon , Peter Shier , Ricardo Koller , Reiji Watanabe , Jing Zhang , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH v3 00/12] KVM: arm64: selftests: Introduce arch_timer selftest Message-ID: References: <20210901211412.4171835-1-rananta@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210901211412.4171835-1-rananta@google.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 01, 2021 at 09:14:00PM +0000, Raghavendra Rao Ananta wrote: > Hello, > > The patch series adds a KVM selftest to validate the behavior of > ARM's generic timer (patch-11). The test programs the timer IRQs > periodically, and for each interrupt, it validates the behaviour > against the architecture specifications. The test further provides > a command-line interface to configure the number of vCPUs, the > period of the timer, and the number of iterations that the test > has to run for. > > Patch-12 adds an option to randomly migrate the vCPUs to different > physical CPUs across the system. The bug for the fix provided by > Marc with commit 3134cc8beb69d0d ("KVM: arm64: vgic: Resample HW > pending state on deactivation") was discovered using arch_timer > test with vCPU migrations. > > Since the test heavily depends on interrupts, patch-10 adds a host > library to setup ARM Generic Interrupt Controller v3 (GICv3). This > includes creating a vGIC device, setting up distributor and > redistributor attributes, and mapping the guest physical addresses. > Symmetrical to this, patch-9 adds a guest library to talk to the vGIC, > which includes initializing the controller, enabling/disabling the > interrupts, and so on. > > Furthermore, additional processor utilities such as accessing the MMIO > (via readl/writel), read/write to assembler unsupported registers, > basic delay generation, enable/disable local IRQs, and so on, are also > introduced that the test/GICv3 takes advantage of (patches 1 through 8). > > The patch series, specifically the library support, is derived from the > kvm-unit-tests and the kernel itself. > > Regards, > Raghavendra For later submissions, can you include a lore.kernel.org link to your older revisions of the series? NBD now, its easy to find in my inbox but just for future reference. -- Best, Oliver