From: Matthias Kaehlcke <mka@chromium.org>
To: rajpat@codeaurora.org
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, rnayak@codeaurora.org,
saiprakash.ranjan@codeaurora.org, msavaliy@qti.qualcomm.com,
skakit@codeaurora.org, sboyd@kernel.org, dianders@chromium.org
Subject: Re: [PATCH V7 3/7] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes
Date: Thu, 9 Sep 2021 07:06:21 -0700 [thread overview]
Message-ID: <YToU3RjSB9IDD3Ei@google.com> (raw)
In-Reply-To: <bfdccfc2e4362218fc8099dfe566bc1d@codeaurora.org>
On Thu, Sep 09, 2021 at 10:16:04AM +0530, rajpat@codeaurora.org wrote:
> On 2021-09-03 22:03, Matthias Kaehlcke wrote:
> > On Fri, Sep 03, 2021 at 09:58:56AM +0530, Rajesh Patil wrote:
> > > From: Roja Rani Yarubandi <rojay@codeaurora.org>
> > >
> > > Add QUPv3 wrapper_0 DT nodes for SC7280 SoC.
> > >
> > > Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
> > > Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
> > > ---
> > > arch/arm64/boot/dts/qcom/sc7280.dtsi | 684
> > > ++++++++++++++++++++++++++++++++++-
> > > 1 file changed, 682 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > index 7ec9871..5c6a1d7 100644
> > > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > >
> > > ...
> > >
> > > + qup_spi0_data_clk: qup-spi0-data-clk {
> > > + pins = "gpio0", "gpio1", "gpio2";
> > > + function = "qup00";
> > > + };
> > > +
> > > + qup_spi0_cs: qup-spi0-cs {
> > > + pins = "gpio3";
> > > + function = "qup00";
> > > + };
> >
> >
> > I think we still want this for all SPI ports, which existed in previous
> > versions:
> >
> > qup_spi0_cs_gpio: qup-spi0-cs-gpio {
> > pins = "gpio3";
> > function = "gpio";
> > };
> >
> > It just shouldn't be selected together with 'qup_spiN_cs'.
> >
> > Maybe a follow up patch would be good enough, so:
> >
> > Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
>
>
> ok.shall we add qup_spiN_cs_gpio for all spi ports
Yes
next prev parent reply other threads:[~2021-09-09 14:41 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-03 4:28 [PATCH V7 0/7] Add QSPI and QUPv3 DT nodes for SC7280 SoC Rajesh Patil
2021-09-03 4:28 ` [PATCH V7 1/7] arm64: dts: sc7280: Add QSPI node Rajesh Patil
2021-09-03 15:54 ` Matthias Kaehlcke
2021-09-03 16:28 ` Doug Anderson
2021-09-16 4:31 ` rajpat
2021-09-03 4:28 ` [PATCH V7 2/7] arm64: dts: sc7280: Configure SPI-NOR FLASH for sc7280-idp Rajesh Patil
2021-09-03 4:28 ` [PATCH V7 3/7] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes Rajesh Patil
2021-09-03 16:33 ` Matthias Kaehlcke
2021-09-09 4:46 ` rajpat
2021-09-09 14:06 ` Matthias Kaehlcke [this message]
2021-09-03 4:28 ` [PATCH V7 4/7] arm64: dts: sc7280: Update QUPv3 UART5 DT node Rajesh Patil
2021-09-03 4:28 ` [PATCH V7 5/7] arm64: dts: sc7280: Configure uart7 to support bluetooth on sc7280-idp Rajesh Patil
2021-09-03 4:28 ` [PATCH V7 6/7] arm64: dts: sc7280: Add QUPv3 wrapper_1 nodes Rajesh Patil
2021-09-03 17:22 ` Matthias Kaehlcke
2021-09-09 4:44 ` rajpat
2021-09-09 14:07 ` Matthias Kaehlcke
2021-09-03 4:29 ` [PATCH V7 7/7] arm64: dts: sc7280: Add aliases for I2C and SPI Rajesh Patil
2021-09-03 19:01 ` Stephen Boyd
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