From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79A49C433FE for ; Tue, 28 Sep 2021 12:16:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 62F4560FE8 for ; Tue, 28 Sep 2021 12:16:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240554AbhI1MSW (ORCPT ); Tue, 28 Sep 2021 08:18:22 -0400 Received: from 8bytes.org ([81.169.241.247]:39992 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240544AbhI1MSN (ORCPT ); Tue, 28 Sep 2021 08:18:13 -0400 Received: by theia.8bytes.org (Postfix, from userid 1000) id E1DE5208; Tue, 28 Sep 2021 14:16:31 +0200 (CEST) Date: Tue, 28 Sep 2021 14:16:26 +0200 From: Joerg Roedel To: Kuppuswamy Sathyanarayanan Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, Paolo Bonzini , Juergen Gross , Deep Shah , VMware Inc , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Peter H Anvin , Dave Hansen , Tony Luck , Dan Williams , Andi Kleen , Kirill Shutemov , Sean Christopherson , Kuppuswamy Sathyanarayanan , linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 06/11] x86/traps: Add #VE support for TDX guest Message-ID: References: <20210903172812.1097643-1-sathyanarayanan.kuppuswamy@linux.intel.com> <20210903172812.1097643-7-sathyanarayanan.kuppuswamy@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210903172812.1097643-7-sathyanarayanan.kuppuswamy@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 03, 2021 at 10:28:07AM -0700, Kuppuswamy Sathyanarayanan wrote: > In the settings that Linux will run in, virtual exceptions are never > generated on accesses to normal, TD-private memory that has been > accepted. Does this also hold true when the Hypervisor does unexpected things that cause previously accepted pages to become unaccepted again? This means pages like the entry code pages or other memory that is touched before the syscall entry path switched stacks. Can you sched some light on what happens in such a situation? > +DEFINE_IDTENTRY(exc_virtualization_exception) > +{ > + struct ve_info ve; > + int ret; > + > + RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); > + > + /* > + * NMIs/Machine-checks/Interrupts will be in a disabled state > + * till TDGETVEINFO TDCALL is executed. This prevents #VE > + * nesting issue. > + */ > + ret = tdx_get_ve_info(&ve); > + > + cond_local_irq_enable(regs); Potentially enabling IRQs here means that TDX does not have a shared per-cpu data structure (like the GHCB on AMD). Is that right?