From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Cc: agross@kernel.org, lgirdwood@gmail.com, broonie@kernel.org,
robh+dt@kernel.org, plai@codeaurora.org, bgoswami@codeaurora.org,
perex@perex.cz, tiwai@suse.com, srinivas.kandagatla@linaro.org,
rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org,
alsa-devel@alsa-project.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, swboyd@chromium.org,
judyhsiao@chromium.org,
Venkata Prasad Potturu <potturu@codeaurora.org>
Subject: Re: [PATCH] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6
Date: Tue, 5 Oct 2021 10:01:47 -0700 [thread overview]
Message-ID: <YVyE+ytKVmOh85c3@ripper> (raw)
In-Reply-To: <1633105471-30928-1-git-send-email-srivasam@codeaurora.org>
On Fri 01 Oct 09:24 PDT 2021, Srinivasa Rao Mandadapu wrote:
> Add support for soundwire 1.6 version to gate RX/TX bus clock.
>
> Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org>
> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
> ---
> drivers/soundwire/qcom.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
> index 0ef79d6..599b3ed 100644
> --- a/drivers/soundwire/qcom.c
> +++ b/drivers/soundwire/qcom.c
> @@ -127,6 +127,7 @@ struct qcom_swrm_ctrl {
> struct device *dev;
> struct regmap *regmap;
> void __iomem *mmio;
> + char __iomem *swrm_hctl_reg;
> struct completion broadcast;
> struct completion enumeration;
> struct work_struct slave_work;
> @@ -610,6 +611,12 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
> val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index);
> val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);
>
> + if (ctrl->swrm_hctl_reg) {
> + val = ioread32(ctrl->swrm_hctl_reg);
> + val &= 0xFFFFFFFD;
That's a tricky way of saying:
val &= ~BIT(1);
That said, naming bit 1 is still a very good thing.
> + iowrite32(val, ctrl->swrm_hctl_reg);
> + }
> +
> ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);
>
> /* Enable Auto enumeration */
> @@ -1200,7 +1207,7 @@ static int qcom_swrm_probe(struct platform_device *pdev)
> struct qcom_swrm_ctrl *ctrl;
> const struct qcom_swrm_data *data;
> int ret;
> - u32 val;
> + int val, swrm_hctl_reg = 0;
>
> ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
> if (!ctrl)
> @@ -1251,6 +1258,9 @@ static int qcom_swrm_probe(struct platform_device *pdev)
> ctrl->bus.port_ops = &qcom_swrm_port_ops;
> ctrl->bus.compute_params = &qcom_swrm_compute_params;
>
> + if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg))
> + ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4);
Nack.
You may not pull an address to a single register out of an undocumented
DT property and blindly ioremap that.
And you surely should check for errors here, to avoid magical errors
caused by this ioremap failing and your bit not being cleared.
Thanks,
Bjorn
> +
> ret = qcom_swrm_get_port_config(ctrl);
> if (ret)
> goto err_clk;
> --
> Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
> is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
>
next prev parent reply other threads:[~2021-10-05 17:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-01 16:24 [PATCH] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6 Srinivasa Rao Mandadapu
2021-10-01 17:57 ` Pierre-Louis Bossart
2021-10-05 14:13 ` Srinivasa Rao Mandadapu
2021-10-05 15:03 ` Pierre-Louis Bossart
2021-10-05 15:13 ` Srinivasa Rao Mandadapu
2021-10-05 17:01 ` Bjorn Andersson [this message]
2021-10-08 5:30 ` Srinivasa Rao Mandadapu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YVyE+ytKVmOh85c3@ripper \
--to=bjorn.andersson@linaro.org \
--cc=agross@kernel.org \
--cc=alsa-devel@alsa-project.org \
--cc=bgoswami@codeaurora.org \
--cc=broonie@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=judyhsiao@chromium.org \
--cc=lgirdwood@gmail.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=perex@perex.cz \
--cc=plai@codeaurora.org \
--cc=potturu@codeaurora.org \
--cc=robh+dt@kernel.org \
--cc=rohitkr@codeaurora.org \
--cc=srinivas.kandagatla@linaro.org \
--cc=srivasam@codeaurora.org \
--cc=swboyd@chromium.org \
--cc=tiwai@suse.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).