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[93.42.71.246]) by smtp.gmail.com with ESMTPSA id jv12sm1226293ejc.83.2021.10.09.11.08.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Oct 2021 11:08:27 -0700 (PDT) Date: Sat, 9 Oct 2021 20:08:24 +0200 From: Ansuel Smith To: Andrew Lunn Cc: Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Matthew Hagan Subject: Re: [net-next PATCH v2 08/15] dt-bindings: net: dsa: qca8k: Add MAC swap and clock phase properties Message-ID: References: <20211008002225.2426-1-ansuelsmth@gmail.com> <20211008002225.2426-9-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Oct 09, 2021 at 07:07:16PM +0200, Andrew Lunn wrote: > On Fri, Oct 08, 2021 at 02:22:18AM +0200, Ansuel Smith wrote: > > Add names and decriptions of additional PORT0_PAD_CTRL properties. > > Document new binding qca,mac6_exchange that exchange the mac0 port > > with mac6. > > qca,sgmii-(rx|tx)clk-falling-edge are for setting the respective clock > > phase to failling edge. > > > > Signed-off-by: Matthew Hagan > > Signed-off-by: Ansuel Smith > > --- > > Documentation/devicetree/bindings/net/dsa/qca8k.txt | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt > > index 9383d6bf2426..208ee5bc1bbb 100644 > > --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt > > +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt > > @@ -13,6 +13,11 @@ Required properties: > > Optional properties: > > > > - reset-gpios: GPIO to be used to reset the whole device > > +- qca,mac6-exchange: Internally swap MAC0 with MAC6. > > +- qca,sgmii-rxclk-falling-edge: Set the receive clock phase to falling edge. > > + Mostly used in qca8327 with CPU port 0 set to > > + sgmii. > > +- qca,sgmii-txclk-falling-edge: Set the transmit clock phase to falling edge. > > - qca,rgmii0-1-8v: Set the internal regulator to supply 1.8v for MAC0 port. > > This is needed for qca8337 and toggles the supply voltage > > from 1.5v to 1.8v. For the specific regs it was observed > > The edge configuration is a port configuration. So it should be inside > the port DT node it applies to. That also gives a clean way forward > when a new switch appears with more SGMII interfaces, each with its > own edge configuration. > Problem here is that from Documentation falling edge can be set only on PAD0. PAD5 and PAD6 have the related bit reserved. But anyway qca8k support only single sgmii and it's not supported a config with multiple sgmii. Do we have standard binding for this? > But that then leads into the MAC0/MAC6 swap mess. I need to think > about that some more, how do we cleanly describe that in DT. > > Andrew About the mac swap. Do we really need to implement a complex thing for something that is really implemented internally to the switch? With this option MAC6 is swapped with MAC0. But with the port configuration in DT it doesn't change anything. Same reg, no change. It's really that some OEM connect the secondary port instead of the primary (for some reason, hw choice?) and swap them internally. Anyway some question. I will move the falling binding to the port DT node and move the configuration to mac_config. Should I keep the dedicated function to setup PAD0 swap or I can directly add the check in the qca8k_setup for only the bit related to enable the swap? -- Ansuel