From: Vinod Koul <vkoul@kernel.org>
To: Sameer Pujar <spujar@nvidia.com>
Cc: jonathanh@nvidia.com, ldewangan@nvidia.com,
thierry.reding@gmail.com, dmaengine@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RESEND PATCH 0/3] Few Tegra210 ADMA fixes
Date: Mon, 18 Oct 2021 09:33:12 +0530 [thread overview]
Message-ID: <YWzyAKgxUua0fR5/@matsya> (raw)
In-Reply-To: <1631722025-19873-1-git-send-email-spujar@nvidia.com>
On 15-09-21, 21:37, Sameer Pujar wrote:
> Following are the fixes in the series:
> - Couple of minor fixes (non functional fixes)
>
> - ADMA FIFO size fix: The slave ADMAIF channels have different default
> FIFO sizes (ADMAIF FIFO is actually a ring buffer and it is divided
> amongst all available channels). As per HW recommendation the sizes
> should match with the corresponding ADMA channels to which ADMAIF
> channel is mapped to at runtime. Thus program ADMA channel FIFO sizes
> accordingly. Otherwise FIFO corruption is observed.
The patches are semantically and doing the right thing by ordering. But
that does not really make it a 'fix' imo. I am applying these to next
Thanks and apologies for delay
--
~Vinod
prev parent reply other threads:[~2021-10-18 4:03 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-15 16:07 [RESEND PATCH 0/3] Few Tegra210 ADMA fixes Sameer Pujar
2021-09-15 16:07 ` [RESEND PATCH 1/3] dmaengine: tegra210-adma: Re-order 'has_outstanding_reqs' member Sameer Pujar
2021-09-17 9:47 ` Jon Hunter
2021-09-15 16:07 ` [RESEND PATCH 2/3] dmaengine: tegra210-adma: Add description for 'adma_get_burst_config' Sameer Pujar
2021-09-17 9:47 ` Jon Hunter
2021-09-15 16:07 ` [RESEND PATCH 3/3] dmaengine: tegra210-adma: Override ADMA FIFO size Sameer Pujar
2021-09-17 9:45 ` Jon Hunter
2021-09-27 6:20 ` [RESEND PATCH 0/3] Few Tegra210 ADMA fixes Sameer Pujar
2021-10-04 15:49 ` Sameer Pujar
2021-10-05 6:33 ` Vinod Koul
2021-10-18 4:03 ` Vinod Koul [this message]
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