From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 971A1C433FE for ; Wed, 20 Oct 2021 18:38:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 76632610D0 for ; Wed, 20 Oct 2021 18:38:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231183AbhJTSk0 (ORCPT ); Wed, 20 Oct 2021 14:40:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230076AbhJTSkZ (ORCPT ); Wed, 20 Oct 2021 14:40:25 -0400 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A346C061749 for ; Wed, 20 Oct 2021 11:38:11 -0700 (PDT) Received: by mail-pj1-x102c.google.com with SMTP id ls14-20020a17090b350e00b001a00e2251c8so3059932pjb.4 for ; Wed, 20 Oct 2021 11:38:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=uMN9qvywh3sv/oaPckg/G842AJu+I72mzD6okHONmBE=; b=OQtzFHyCtGBKK45bfehF2A364ZUkMfTSyUySkQyT4iu/jfR47nbaZ2erU1cNvlnaw4 t4t+qmcXhOKAe7jSMzJ7eNQNndMj2L80zwE1QWx8bk3GX4YLE9u8xrZ1TvUcWMuFheCV faG9N51gBShfpEpmnLkJbfACb2c6dA8JCf1kfQllKRjlGrbzMtbARsgXX2Q5oiZBEgVZ uFotf1fuqwzgiAryDidSCxyS52Ax+/LaQ3aGyKffmOvbTHZM5pWSclzGd0oMzgyvJEXV B+FMz5ciFWfOY8j3NW4kN0OKETi3eRQ2q4k1uagZQHkE8i6gtmaOcPwDg/mQL39JCeqp C38A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=uMN9qvywh3sv/oaPckg/G842AJu+I72mzD6okHONmBE=; b=cIVpCThhFVef0Kp6U69HvC3vgBEHmJMTT5LMLV/8gKYRj9AbYAraPKss15a52JzakE 4V6n8ozUkcu6RUCo2fMY8iUf22PIE7xhfFdQaRbggzWkU/lSAIrwVHnoZqhwO3VrMM53 8z0DApwzDELKOvr69Ra/I9Vfr/YasWHgz6GGZaZfzUR+So70gUL+hxh77PMuDnbrOyty WP0XMN7AosjqFH0B4ycx6t8WBtgwY7IAI+91cLoqmHpFPdZB7XLWq4dPZbUHWtEyxQ+U 74KR+s+dsCNgbXEw8baKRBDDAvbQcbfQzHx9esEqyLfRCCE4hCiSB/1wYqKmTxujzXmw 0b/g== X-Gm-Message-State: AOAM531mTxIbOVIb7yzPclabSkLfOEScSy1Z9+G5PJ+1E32l3tvlj0HZ MzesAe+so3FoWi3nYzI2iPPu3A== X-Google-Smtp-Source: ABdhPJxDxfUH+ZisL0WQepkRzWx6ElcffZJPq7n362achsfgXeb9+WjHNojBNJyaIeobx95CO6qwwg== X-Received: by 2002:a17:90a:c595:: with SMTP id l21mr656275pjt.188.1634755090640; Wed, 20 Oct 2021 11:38:10 -0700 (PDT) Received: from google.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id lp9sm3549636pjb.35.2021.10.20.11.38.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 11:38:10 -0700 (PDT) Date: Wed, 20 Oct 2021 18:38:06 +0000 From: Sean Christopherson To: Tom Lendacky Cc: Joerg Roedel , Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , x86@kernel.org, Brijesh Singh , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Joerg Roedel Subject: Re: [PATCH v5 4/6] KVM: SVM: Add support to handle AP reset MSR protocol Message-ID: References: <20211020124416.24523-1-joro@8bytes.org> <20211020124416.24523-5-joro@8bytes.org> <95d99b9a-8600-619b-9b83-63597d937bc6@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <95d99b9a-8600-619b-9b83-63597d937bc6@amd.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Oct 20, 2021, Tom Lendacky wrote: > On 10/20/21 12:40 PM, Sean Christopherson wrote: > > On Wed, Oct 20, 2021, Joerg Roedel wrote: > > This can race with the SIPI and effectively corrupt svm->vmcb->control.ghcb_gpa. > > > > vCPU0 vCPU1 > > #VMGEXIT(RESET_HOLD) > > __kvm_vcpu_halt() > > INIT > > SIPI > > sev_vcpu_deliver_sipi_vector() > > ghcb_msr_ap_rst_resp(1); > > This isn't possible. vCPU0 doesn't set vCPU1's GHCB value. vCPU1's GHCB > value is set when vCPU1 handles events in vcpu_enter_guest(). Argh, I was thinking of injecting regular IPIs across vCPUs. In hindsight it makes sense that INIT and SIPI are handled on the current vCPU, stuffing all that state from a different vCPU would be needlessly complex.