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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id d24sm4977061wmb.35.2021.10.21.07.58.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 07:58:24 -0700 (PDT) Date: Thu, 21 Oct 2021 15:58:02 +0100 From: Jean-Philippe Brucker To: "Tian, Kevin" Cc: Jason Gunthorpe , Alex Williamson , "Liu, Yi L" , "hch@lst.de" , "jasowang@redhat.com" , "joro@8bytes.org" , "parav@mellanox.com" , "lkml@metux.net" , "pbonzini@redhat.com" , "lushenming@huawei.com" , "eric.auger@redhat.com" , "corbet@lwn.net" , "Raj, Ashok" , "yi.l.liu@linux.intel.com" , "Tian, Jun J" , "Wu, Hao" , "Jiang, Dave" , "jacob.jun.pan@linux.intel.com" , "kwankhede@nvidia.com" , "robin.murphy@arm.com" , "kvm@vger.kernel.org" , "iommu@lists.linux-foundation.org" , "dwmw2@infradead.org" , "linux-kernel@vger.kernel.org" , "baolu.lu@linux.intel.com" , "david@gibson.dropbear.id.au" , "nicolinc@nvidia.com" Subject: Re: [RFC 10/20] iommu/iommufd: Add IOMMU_DEVICE_GET_INFO Message-ID: References: <20210922234954.GB964074@nvidia.com> <20210923114219.GG964074@nvidia.com> <20210930222355.GH964074@nvidia.com> <20211014154259.GT2744544@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 21, 2021 at 02:26:00AM +0000, Tian, Kevin wrote: > > I'll leave it to Jean to confirm. If only coherent DMA can be used in > > the guest on other platforms, suppose VFIO should not blindly set > > IOMMU_CACHE and in concept it should deny assigning a non-coherent > > device since no co-ordination with guest exists today. > > Jean, what's your opinion? Yes a sanity check to prevent assigning non-coherent devices would be good, though I'm not particularly worried about non-coherent devices. PCIe on Arm should be coherent (according to the Base System Architecture). So vfio-pci devices should be coherent, but vfio-platform and mdev are case-by-case (hopefully all coherent since it concerns newer platforms). More worrying, I thought we disabled No-Snoop for VFIO but I was wrong, it's left enabled. On Arm I don't think userspace can perform the right cache maintenance operations to maintain coherency with a device that issues No-Snoop writes. Userspace can issue clean+invalidate but not invalidate alone, so there is no equivalent to arch_sync_dma_for_cpu(). I think the worse that can happen is the device owner shooting itself in the foot by using No-Snoop, but would it hurt to disable it? Thanks, Jean