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Date:   Sun, 24 Oct 2021 20:32:36 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Luo Jie <luoj@codeaurora.org>
Cc:     hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net,
        kuba@kernel.org, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, sricharan@codeaurora.org
Subject: Re: [PATCH v7 09/14] net: phy: add constants for fast retrain
 related register
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References: <20211024082738.849-1-luoj@codeaurora.org>
 <20211024082738.849-10-luoj@codeaurora.org>
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On Sun, Oct 24, 2021 at 04:27:33PM +0800, Luo Jie wrote:
> Add the constants for 2.5G fast retrain capability
> in 10G AN control register, fast retrain status and
> control register and THP bypass register into mdio.h.
> 
> Signed-off-by: Luo Jie <luoj@codeaurora.org>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew