* [PATCH 0/8] Add support for MSM8996 Pro
@ 2021-10-14 8:30 Yassine Oudjana
2021-10-14 8:31 ` [PATCH 1/8] dt-bindings: clk: qcom: msm8996-apcc: Add CBF Yassine Oudjana
` (7 more replies)
0 siblings, 8 replies; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-14 8:30 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Ilia Lin, Viresh Kumar, Nishanth Menon,
Rafael J. Wysocki, Loic Poulain
Cc: Yassine Oudjana, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
MSM8996 Pro (also known as MSM8996SG) is a newer revision of MSM8996
with different CPU/CBF/GPU frequencies and CPR parameters. Its CBF clock also
has a different divisor.
This series handles the difference in the CBF clock and adds a new DTSI for
MSM8996 Pro with CPU and GPU OPPs. It also removes reading msm-id from SMEM
in qcom-cpufreq-nvmem as it becomes no longer necessary. Separating MSM8996
and MSM8996 Pro will help with implementing CBF scaling and CPR; since they
have different CPR parameters and CPU:CBF OPP mapping which is difficult to
implement in the same cluster OPP tables.
Dependencies:
- clk: qcom: msm8996-cpu: Add CBF support
https://lore.kernel.org/linux-arm-msm/20210528192541.1120703-1-konrad.dybcio@somainline.org/
- arm64: dts: qcom: msm8996: Add support for the CBF clock
https://lore.kernel.org/linux-arm-msm/20210528192541.1120703-2-konrad.dybcio@somainline.org/
Yassine Oudjana (8):
dt-bindings: clk: qcom: msm8996-apcc: Add CBF
dt-bindings: clk: qcom: msm8996-apcc: Add MSM8996 Pro compatible
clk: qcom: msm8996-cpu: Add MSM8996 Pro CBF support
cpufreq: qcom_cpufreq_nvmem: Simplify reading kryo speedbin
dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema
dt-bindings: opp: qcom-cpufreq-nvmem: Remove SMEM
arm64: dts: qcom: msm8996: Add MSM8996 Pro support
arm64: dts: qcom: msm8996-xiaomi-scorpio: Include msm8996pro.dtsi
.../bindings/clock/qcom,msm8996-apcc.yaml | 11 +-
.../bindings/opp/qcom-cpufreq-nvmem.yaml | 557 ++++++++++++
.../bindings/opp/qcom-nvmem-cpufreq.txt | 796 ------------------
MAINTAINERS | 2 +-
.../boot/dts/qcom/msm8996-xiaomi-common.dtsi | 3 -
.../boot/dts/qcom/msm8996-xiaomi-gemini.dts | 1 +
.../boot/dts/qcom/msm8996-xiaomi-scorpio.dts | 2 +-
arch/arm64/boot/dts/qcom/msm8996.dtsi | 82 +-
arch/arm64/boot/dts/qcom/msm8996pro.dtsi | 281 +++++++
drivers/clk/qcom/clk-cpu-8996.c | 61 +-
drivers/cpufreq/Kconfig.arm | 1 -
drivers/cpufreq/qcom-cpufreq-nvmem.c | 75 +-
12 files changed, 935 insertions(+), 937 deletions(-)
create mode 100644 Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
delete mode 100644 Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
create mode 100644 arch/arm64/boot/dts/qcom/msm8996pro.dtsi
--
2.33.0
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH 1/8] dt-bindings: clk: qcom: msm8996-apcc: Add CBF
2021-10-14 8:30 [PATCH 0/8] Add support for MSM8996 Pro Yassine Oudjana
@ 2021-10-14 8:31 ` Yassine Oudjana
2021-10-14 14:31 ` Rob Herring
2021-10-26 21:08 ` Rob Herring
2021-10-14 8:32 ` [PATCH 2/8] dt-bindings: clk: qcom: msm8996-apcc: Add MSM8996 Pro compatible Yassine Oudjana
` (6 subsequent siblings)
7 siblings, 2 replies; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-14 8:31 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Ilia Lin, Viresh Kumar, Nishanth Menon,
Rafael J. Wysocki, Loic Poulain
Cc: Yassine Oudjana, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
Add CBF clock and reg.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
.../devicetree/bindings/clock/qcom,msm8996-apcc.yaml | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml
index a20cb10636dd..325f8aef53b2 100644
--- a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml
@@ -10,8 +10,8 @@ maintainers:
- Loic Poulain <loic.poulain@linaro.org>
description: |
- Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for Power cluster
- and clock 1 is for Perf cluster.
+ Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for Power cluster,
+ clock 1 is for Perf cluster, and clock 2 is for Coherent bus fabric (CBF).
properties:
compatible:
@@ -19,7 +19,9 @@ properties:
- qcom,msm8996-apcc
reg:
- maxItems: 1
+ items:
+ - description: Cluster clock registers
+ - description: CBF clock registers
'#clock-cells':
const: 1
@@ -49,6 +51,6 @@ examples:
- |
kryocc: clock-controller@6400000 {
compatible = "qcom,msm8996-apcc";
- reg = <0x6400000 0x90000>;
+ reg = <0x6400000 0x90000>, <0x09a11000 0x10000>;
#clock-cells = <1>;
};
--
2.33.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 2/8] dt-bindings: clk: qcom: msm8996-apcc: Add MSM8996 Pro compatible
2021-10-14 8:30 [PATCH 0/8] Add support for MSM8996 Pro Yassine Oudjana
2021-10-14 8:31 ` [PATCH 1/8] dt-bindings: clk: qcom: msm8996-apcc: Add CBF Yassine Oudjana
@ 2021-10-14 8:32 ` Yassine Oudjana
2021-10-14 14:31 ` Rob Herring
2021-10-26 21:08 ` Rob Herring
2021-10-14 8:32 ` [PATCH 3/8] clk: qcom: msm8996-cpu: Add MSM8996 Pro CBF support Yassine Oudjana
` (5 subsequent siblings)
7 siblings, 2 replies; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-14 8:32 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Ilia Lin, Viresh Kumar, Nishanth Menon,
Rafael J. Wysocki, Loic Poulain
Cc: Yassine Oudjana, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
Add a compatible string for msm8996pro-apcc.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml
index 325f8aef53b2..ad77175dda45 100644
--- a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml
@@ -17,6 +17,7 @@ properties:
compatible:
enum:
- qcom,msm8996-apcc
+ - qcom,msm8996pro-apcc
reg:
items:
--
2.33.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 3/8] clk: qcom: msm8996-cpu: Add MSM8996 Pro CBF support
2021-10-14 8:30 [PATCH 0/8] Add support for MSM8996 Pro Yassine Oudjana
2021-10-14 8:31 ` [PATCH 1/8] dt-bindings: clk: qcom: msm8996-apcc: Add CBF Yassine Oudjana
2021-10-14 8:32 ` [PATCH 2/8] dt-bindings: clk: qcom: msm8996-apcc: Add MSM8996 Pro compatible Yassine Oudjana
@ 2021-10-14 8:32 ` Yassine Oudjana
2021-10-15 18:54 ` Konrad Dybcio
2021-10-24 17:30 ` Bjorn Andersson
2021-10-14 8:32 ` [PATCH 4/8] cpufreq: qcom_cpufreq_nvmem: Simplify reading kryo speedbin Yassine Oudjana
` (4 subsequent siblings)
7 siblings, 2 replies; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-14 8:32 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Ilia Lin, Viresh Kumar, Nishanth Menon,
Rafael J. Wysocki, Loic Poulain
Cc: Yassine Oudjana, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
MSM8996 Pro (MSM8996SG) has a few differences in the CBF clock.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
Dependencies:
- clk: qcom: msm8996-cpu: Add CBF support
https://lore.kernel.org/linux-arm-msm/20210528192541.1120703-1-konrad.dybcio@somainline.org/
drivers/clk/qcom/clk-cpu-8996.c | 61 +++++++++++++++++++++------------
1 file changed, 40 insertions(+), 21 deletions(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index 8afc271f92d0..ab2acbe74f0f 100644
--- a/drivers/clk/qcom/clk-cpu-8996.c
+++ b/drivers/clk/qcom/clk-cpu-8996.c
@@ -70,11 +70,11 @@ enum _pmux_input {
enum {
CBF_PLL_INDEX = 1,
- CBF_DIV_2_INDEX,
+ CBF_DIV_INDEX,
CBF_SAFE_INDEX
};
-#define DIV_2_THRESHOLD 600000000
+#define DIV_THRESHOLD 600000000
#define PWRCL_REG_OFFSET 0x0
#define PERFCL_REG_OFFSET 0x80000
#define MUX_OFFSET 0x40
@@ -142,6 +142,17 @@ static const struct alpha_pll_config cbfpll_config = {
.early_output_mask = BIT(3),
};
+static const struct alpha_pll_config cbfpll_config_pro = {
+ .l = 72,
+ .config_ctl_val = 0x200d4aa8,
+ .config_ctl_hi_val = 0x006,
+ .pre_div_mask = BIT(12),
+ .post_div_mask = 0x3 << 8,
+ .post_div_val = 0x3 << 8,
+ .main_output_mask = BIT(0),
+ .early_output_mask = BIT(3),
+};
+
static struct clk_alpha_pll perfcl_pll = {
.offset = PERFCL_REG_OFFSET,
.regs = prim_pll_regs,
@@ -230,7 +241,8 @@ struct clk_cpu_8996_mux {
u8 width;
struct notifier_block nb;
struct clk_hw *pll;
- struct clk_hw *pll_div_2;
+ struct clk_hw *pll_div;
+ u8 div;
struct clk_regmap clkr;
};
@@ -280,11 +292,11 @@ static int clk_cpu_8996_mux_determine_rate(struct clk_hw *hw,
struct clk_cpu_8996_mux *cpuclk = to_clk_cpu_8996_mux_hw(hw);
struct clk_hw *parent = cpuclk->pll;
- if (cpuclk->pll_div_2 && req->rate < DIV_2_THRESHOLD) {
- if (req->rate < (DIV_2_THRESHOLD / 2))
+ if (cpuclk->pll_div &&req->rate < DIV_THRESHOLD) {
+ if (req->rate < (DIV_THRESHOLD / cpuclk->div))
return -EINVAL;
- parent = cpuclk->pll_div_2;
+ parent = cpuclk->pll_div;
}
req->best_parent_rate = clk_hw_round_rate(parent, req->rate);
@@ -336,7 +348,8 @@ static struct clk_cpu_8996_mux pwrcl_pmux = {
.shift = 0,
.width = 2,
.pll = &pwrcl_pll.clkr.hw,
- .pll_div_2 = &pwrcl_smux.clkr.hw,
+ .pll_div = &pwrcl_smux.clkr.hw,
+ .div = 2,
.nb.notifier_call = cpu_clk_notifier_cb,
.clkr.hw.init = &(struct clk_init_data) {
.name = "pwrcl_pmux",
@@ -358,7 +371,8 @@ static struct clk_cpu_8996_mux perfcl_pmux = {
.shift = 0,
.width = 2,
.pll = &perfcl_pll.clkr.hw,
- .pll_div_2 = &perfcl_smux.clkr.hw,
+ .pll_div = &perfcl_smux.clkr.hw,
+ .div = 2,
.nb.notifier_call = cpu_clk_notifier_cb,
.clkr.hw.init = &(struct clk_init_data) {
.name = "perfcl_pmux",
@@ -481,19 +495,23 @@ static int qcom_cbf_clk_msm8996_register_clks(struct device *dev,
struct regmap *regmap)
{
int ret;
+ bool is_pro = of_device_is_compatible(dev->of_node, "qcom,msm8996pro-apcc");
- cbf_mux.pll_div_2 = clk_hw_register_fixed_factor(dev, "cbf_pll_main",
- "cbf_pll", CLK_SET_RATE_PARENT,
- 1, 2);
- if (IS_ERR(cbf_mux.pll_div_2)) {
+ cbf_mux.div = is_pro ? 4 : 2;
+ cbf_mux.pll_div = clk_hw_register_fixed_factor(dev, "cbf_pll_main",
+ "cbf_pll", CLK_SET_RATE_PARENT,
+ 1, cbf_mux.div);
+
+ if (IS_ERR(cbf_mux.pll_div)) {
dev_err(dev, "Failed to initialize cbf_pll_main\n");
- return PTR_ERR(cbf_mux.pll_div_2);
+ return PTR_ERR(cbf_mux.pll_div);
}
ret = devm_clk_register_regmap(dev, cbf_msm8996_clks[0]);
ret = devm_clk_register_regmap(dev, cbf_msm8996_clks[1]);
- clk_alpha_pll_configure(&cbf_pll, regmap, &cbfpll_config);
+ clk_alpha_pll_configure(&cbf_pll, regmap, is_pro ?
+ &cbfpll_config_pro : &cbfpll_config);
clk_set_rate(cbf_pll.clkr.hw.clk, 614400000);
clk_prepare_enable(cbf_pll.clkr.hw.clk);
clk_notifier_register(cbf_mux.clkr.hw.clk, &cbf_mux.nb);
@@ -575,7 +593,7 @@ static int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event,
qcom_cpu_clk_msm8996_acd_init(base);
break;
case POST_RATE_CHANGE:
- if (cnd->new_rate < DIV_2_THRESHOLD)
+ if (cnd->new_rate < DIV_THRESHOLD)
ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw,
DIV_2_INDEX);
else
@@ -600,15 +618,15 @@ static int cbf_clk_notifier_cb(struct notifier_block *nb, unsigned long event,
switch (event) {
case PRE_RATE_CHANGE:
- parent = clk_hw_get_parent_by_index(&cbfclk->clkr.hw, CBF_DIV_2_INDEX);
- ret = clk_cpu_8996_mux_set_parent(&cbfclk->clkr.hw, CBF_DIV_2_INDEX);
+ parent = clk_hw_get_parent_by_index(&cbfclk->clkr.hw, CBF_DIV_INDEX);
+ ret = clk_cpu_8996_mux_set_parent(&cbfclk->clkr.hw, CBF_DIV_INDEX);
- if (cnd->old_rate > DIV_2_THRESHOLD && cnd->new_rate < DIV_2_THRESHOLD)
- ret = clk_set_rate(parent->clk, cnd->old_rate / 2);
+ if (cnd->old_rate > DIV_THRESHOLD && cnd->new_rate < DIV_THRESHOLD)
+ ret = clk_set_rate(parent->clk, cnd->old_rate / cbfclk->div);
break;
case POST_RATE_CHANGE:
- if (cnd->new_rate < DIV_2_THRESHOLD)
- ret = clk_cpu_8996_mux_set_parent(&cbfclk->clkr.hw, CBF_DIV_2_INDEX);
+ if (cnd->new_rate < DIV_THRESHOLD)
+ ret = clk_cpu_8996_mux_set_parent(&cbfclk->clkr.hw, CBF_DIV_INDEX);
else {
parent = clk_hw_get_parent_by_index(&cbfclk->clkr.hw, CBF_PLL_INDEX);
ret = clk_set_rate(parent->clk, cnd->new_rate);
@@ -676,6 +694,7 @@ static int qcom_cpu_clk_msm8996_driver_remove(struct platform_device *pdev)
static const struct of_device_id qcom_cpu_clk_msm8996_match_table[] = {
{ .compatible = "qcom,msm8996-apcc" },
+ { .compatible = "qcom,msm8996pro-apcc" },
{}
};
MODULE_DEVICE_TABLE(of, qcom_cpu_clk_msm8996_match_table);
--
2.33.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 4/8] cpufreq: qcom_cpufreq_nvmem: Simplify reading kryo speedbin
2021-10-14 8:30 [PATCH 0/8] Add support for MSM8996 Pro Yassine Oudjana
` (2 preceding siblings ...)
2021-10-14 8:32 ` [PATCH 3/8] clk: qcom: msm8996-cpu: Add MSM8996 Pro CBF support Yassine Oudjana
@ 2021-10-14 8:32 ` Yassine Oudjana
2021-10-14 12:25 ` Dmitry Baryshkov
2021-10-15 18:58 ` Konrad Dybcio
2021-10-14 8:32 ` [PATCH 5/8] dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema Yassine Oudjana
` (3 subsequent siblings)
7 siblings, 2 replies; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-14 8:32 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Ilia Lin, Viresh Kumar, Nishanth Menon,
Rafael J. Wysocki, Loic Poulain
Cc: Yassine Oudjana, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
In preparation for adding a separate device tree for MSM8996 Pro, skip reading
msm-id from smem and just read the speedbin efuse.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
drivers/cpufreq/Kconfig.arm | 1 -
drivers/cpufreq/qcom-cpufreq-nvmem.c | 75 +++-------------------------
2 files changed, 6 insertions(+), 70 deletions(-)
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 954749afb5fe..7d9798bc5753 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -154,7 +154,6 @@ config ARM_QCOM_CPUFREQ_NVMEM
tristate "Qualcomm nvmem based CPUFreq"
depends on ARCH_QCOM
depends on QCOM_QFPROM
- depends on QCOM_SMEM
select PM_OPP
help
This adds the CPUFreq driver for Qualcomm Kryo SoC based boards.
diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
index d1744b5d9619..909f7d97b334 100644
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
@@ -9,8 +9,8 @@
* based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
* defines the voltage and frequency value based on the msm-id in SMEM
* and speedbin blown in the efuse combination.
- * The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
- * to provide the OPP framework with required information.
+ * The qcom-cpufreq-nvmem driver reads efuse value from the SoC to provide the
+ * OPP framework with required information.
* This is used to determine the voltage and frequency value for each OPP of
* operating-points-v2 table when it is parsed by the OPP framework.
*/
@@ -27,22 +27,6 @@
#include <linux/pm_domain.h>
#include <linux/pm_opp.h>
#include <linux/slab.h>
-#include <linux/soc/qcom/smem.h>
-
-#define MSM_ID_SMEM 137
-
-enum _msm_id {
- MSM8996V3 = 0xF6ul,
- APQ8096V3 = 0x123ul,
- MSM8996SG = 0x131ul,
- APQ8096SG = 0x138ul,
-};
-
-enum _msm8996_version {
- MSM8996_V3,
- MSM8996_SG,
- NUM_OF_MSM8996_VERSIONS,
-};
struct qcom_cpufreq_drv;
@@ -142,35 +126,6 @@ static void get_krait_bin_format_b(struct device *cpu_dev,
dev_dbg(cpu_dev, "PVS version: %d\n", *pvs_ver);
}
-static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
-{
- size_t len;
- u32 *msm_id;
- enum _msm8996_version version;
-
- msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
- if (IS_ERR(msm_id))
- return NUM_OF_MSM8996_VERSIONS;
-
- /* The first 4 bytes are format, next to them is the actual msm-id */
- msm_id++;
-
- switch ((enum _msm_id)*msm_id) {
- case MSM8996V3:
- case APQ8096V3:
- version = MSM8996_V3;
- break;
- case MSM8996SG:
- case APQ8096SG:
- version = MSM8996_SG;
- break;
- default:
- version = NUM_OF_MSM8996_VERSIONS;
- }
-
- return version;
-}
-
static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
struct nvmem_cell *speedbin_nvmem,
char **pvs_name,
@@ -178,30 +133,13 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
{
size_t len;
u8 *speedbin;
- enum _msm8996_version msm8996_version;
*pvs_name = NULL;
- msm8996_version = qcom_cpufreq_get_msm_id();
- if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
- dev_err(cpu_dev, "Not Snapdragon 820/821!");
- return -ENODEV;
- }
-
speedbin = nvmem_cell_read(speedbin_nvmem, &len);
if (IS_ERR(speedbin))
return PTR_ERR(speedbin);
- switch (msm8996_version) {
- case MSM8996_V3:
- drv->versions = 1 << (unsigned int)(*speedbin);
- break;
- case MSM8996_SG:
- drv->versions = 1 << ((unsigned int)(*speedbin) + 4);
- break;
- default:
- BUG();
- break;
- }
+ drv->versions = 1 << (unsigned int)(*speedbin);
kfree(speedbin);
return 0;
@@ -464,10 +402,9 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
MODULE_DEVICE_TABLE(of, qcom_cpufreq_match_list);
/*
- * Since the driver depends on smem and nvmem drivers, which may
- * return EPROBE_DEFER, all the real activity is done in the probe,
- * which may be defered as well. The init here is only registering
- * the driver and the platform device.
+ * Since the driver depends on the nvmem driver, which may return EPROBE_DEFER,
+ * all the real activity is done in the probe, which may be defered as well.
+ * The init here is only registering the driver and the platform device.
*/
static int __init qcom_cpufreq_init(void)
{
--
2.33.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 5/8] dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema
2021-10-14 8:30 [PATCH 0/8] Add support for MSM8996 Pro Yassine Oudjana
` (3 preceding siblings ...)
2021-10-14 8:32 ` [PATCH 4/8] cpufreq: qcom_cpufreq_nvmem: Simplify reading kryo speedbin Yassine Oudjana
@ 2021-10-14 8:32 ` Yassine Oudjana
2021-10-14 14:31 ` Rob Herring
2021-10-14 15:45 ` Rob Herring
2021-10-14 8:32 ` [PATCH 6/8] dt-bindings: opp: qcom-cpufreq-nvmem: Remove SMEM Yassine Oudjana
` (2 subsequent siblings)
7 siblings, 2 replies; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-14 8:32 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Ilia Lin, Viresh Kumar, Nishanth Menon,
Rafael J. Wysocki, Loic Poulain
Cc: Yassine Oudjana, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
Convert qcom-nvmem-cpufreq to DT schema format.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
.../bindings/opp/qcom-cpufreq-nvmem.yaml | 877 ++++++++++++++++++
.../bindings/opp/qcom-nvmem-cpufreq.txt | 796 ----------------
MAINTAINERS | 2 +-
3 files changed, 878 insertions(+), 797 deletions(-)
create mode 100644 Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
delete mode 100644 Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
diff --git a/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
new file mode 100644
index 000000000000..4a7d4826746e
--- /dev/null
+++ b/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
@@ -0,0 +1,877 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/opp/qcom-cpufreq-nvmem.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings
+
+maintainers:
+ - Ilia Lin <ilia.lin@kernel.org>
+
+description: |
+ In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996,
+ the CPU frequencies subset and voltage value of each OPP varies based on
+ the silicon variant in use.
+ Qualcomm Technologies, Inc. Process Voltage Scaling Tables
+ defines the voltage and frequency value based on the msm-id in SMEM
+ and speedbin blown in the efuse combination.
+ The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
+ to provide the OPP framework with required information (existing HW bitmap).
+ This is used to determine the voltage and frequency value for each OPP of
+ operating-points-v2 table when it is parsed by the OPP framework.
+
+patternProperties:
+ compatible:
+ enum:
+ - qcom,apq8096
+ - qcom,msm8996
+ - qcom,qcs404
+ - qcom,ipq8064
+ - qcom,apq8064
+ - qcom,msm8974
+ - qcom,msm8960
+
+ '^opp-table(-[a-z0-9]+)?$':
+ type: object
+
+ patternProperties:
+ compatible:
+ const: operating-points-v2-kryo-cpu
+
+ nvmem-cells:
+ description: |
+ A phandle pointing to a nvmem-cells node representing the
+ efuse registers that has information about the
+ speedbin that is used to select the right frequency/voltage
+ value pair.
+
+ opp-shared: true
+
+ '^opp-?[0-9]+$':
+ type: object
+
+ properties:
+ opp-hz: true
+ opp-microvolt: true
+ clock-latency-ns: true
+
+ opp-supported-hw:
+ description: |
+ A single 32 bit bitmap value, representing compatible HW.
+ Bitmap:
+ 0: MSM8996 V3, speedbin 0
+ 1: MSM8996 V3, speedbin 1
+ 2: MSM8996 V3, speedbin 2
+ 3: unused
+ 4: MSM8996 SG, speedbin 0
+ 5: MSM8996 SG, speedbin 1
+ 6: MSM8996 SG, speedbin 2
+ 7-31: unused
+
+ required:
+ - opp-hz
+ - opp-supported-hw
+
+allOf:
+ - $ref: opp-v2-base.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,qcs404
+ then:
+ patternProperties:
+ cpus:
+ type: object
+
+ patternProperties:
+ 'cpu@[0-9a-f]+':
+ type: object
+
+ properties:
+ power-domains:
+ items:
+ - description: A phandle pointing to the PM domain specifier
+ which provides the performance states available for active
+ state management.
+ power-domain-names:
+ items:
+ - const: cpr
+
+ '^opp-?[0-9]+$':
+ properties:
+ required-opps: true
+
+ required:
+ - opp-hz
+ - opp-supported-hw
+ - required-opps
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ / {
+ model = "Qualcomm Technologies, Inc. MSM8996";
+ compatible = "qcom,msm8996";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ CPU0: cpu@0 {
+ device_type = "cpu";
+ compatible = "qcom,kryo";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ capacity-dmips-mhz = <1024>;
+ clocks = <&kryocc 0>;
+ operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
+ next-level-cache = <&L2_0>;
+ L2_0: l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ };
+ };
+
+ CPU1: cpu@1 {
+ device_type = "cpu";
+ compatible = "qcom,kryo";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ capacity-dmips-mhz = <1024>;
+ clocks = <&kryocc 0>;
+ operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
+ next-level-cache = <&L2_0>;
+ };
+
+ CPU2: cpu@100 {
+ device_type = "cpu";
+ compatible = "qcom,kryo";
+ reg = <0x0 0x100>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ capacity-dmips-mhz = <1024>;
+ clocks = <&kryocc 1>;
+ operating-points-v2 = <&cluster1_opp>;
+ #cooling-cells = <2>;
+ next-level-cache = <&L2_1>;
+ L2_1: l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ };
+ };
+
+ CPU3: cpu@101 {
+ device_type = "cpu";
+ compatible = "qcom,kryo";
+ reg = <0x0 0x101>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ capacity-dmips-mhz = <1024>;
+ clocks = <&kryocc 1>;
+ operating-points-v2 = <&cluster1_opp>;
+ #cooling-cells = <2>;
+ next-level-cache = <&L2_1>;
+ };
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&CPU0>;
+ };
+
+ core1 {
+ cpu = <&CPU1>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <&CPU2>;
+ };
+
+ core1 {
+ cpu = <&CPU3>;
+ };
+ };
+ };
+ };
+
+ cluster0_opp: opp_table0 {
+ compatible = "operating-points-v2-kryo-cpu";
+ nvmem-cells = <&speedbin_efuse>;
+ opp-shared;
+
+ opp-307200000 {
+ opp-hz = /bits/ 64 <307200000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x77>;
+ clock-latency-ns = <200000>;
+ };
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-422400000 {
+ opp-hz = /bits/ 64 <422400000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-460800000 {
+ opp-hz = /bits/ 64 <460800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-537600000 {
+ opp-hz = /bits/ 64 <537600000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-556800000 {
+ opp-hz = /bits/ 64 <556800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-614400000 {
+ opp-hz = /bits/ 64 <614400000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-652800000 {
+ opp-hz = /bits/ 64 <652800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-691200000 {
+ opp-hz = /bits/ 64 <691200000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-729600000 {
+ opp-hz = /bits/ 64 <729600000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-768000000 {
+ opp-hz = /bits/ 64 <768000000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-844800000 {
+ opp-hz = /bits/ 64 <844800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x77>;
+ clock-latency-ns = <200000>;
+ };
+ opp-902400000 {
+ opp-hz = /bits/ 64 <902400000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-960000000 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-979200000 {
+ opp-hz = /bits/ 64 <979200000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1036800000 {
+ opp-hz = /bits/ 64 <1036800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1113600000 {
+ opp-hz = /bits/ 64 <1113600000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1132800000 {
+ opp-hz = /bits/ 64 <1132800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1190400000 {
+ opp-hz = /bits/ 64 <1190400000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1209600000 {
+ opp-hz = /bits/ 64 <1209600000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1228800000 {
+ opp-hz = /bits/ 64 <1228800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1286400000 {
+ opp-hz = /bits/ 64 <1286400000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1324800000 {
+ opp-hz = /bits/ 64 <1324800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x5>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1363200000 {
+ opp-hz = /bits/ 64 <1363200000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x72>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1401600000 {
+ opp-hz = /bits/ 64 <1401600000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x5>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1440000000 {
+ opp-hz = /bits/ 64 <1440000000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1478400000 {
+ opp-hz = /bits/ 64 <1478400000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1497600000 {
+ opp-hz = /bits/ 64 <1497600000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x4>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1516800000 {
+ opp-hz = /bits/ 64 <1516800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1593600000 {
+ opp-hz = /bits/ 64 <1593600000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x71>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1996800000 {
+ opp-hz = /bits/ 64 <1996800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x20>;
+ clock-latency-ns = <200000>;
+ };
+ opp-2188800000 {
+ opp-hz = /bits/ 64 <2188800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x10>;
+ clock-latency-ns = <200000>;
+ };
+ };
+
+ cluster1_opp: opp_table1 {
+ compatible = "operating-points-v2-kryo-cpu";
+ nvmem-cells = <&speedbin_efuse>;
+ opp-shared;
+
+ opp-307200000 {
+ opp-hz = /bits/ 64 <307200000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x77>;
+ clock-latency-ns = <200000>;
+ };
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-403200000 {
+ opp-hz = /bits/ 64 <403200000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-460800000 {
+ opp-hz = /bits/ 64 <460800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-537600000 {
+ opp-hz = /bits/ 64 <537600000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-556800000 {
+ opp-hz = /bits/ 64 <556800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-614400000 {
+ opp-hz = /bits/ 64 <614400000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-652800000 {
+ opp-hz = /bits/ 64 <652800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-691200000 {
+ opp-hz = /bits/ 64 <691200000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-729600000 {
+ opp-hz = /bits/ 64 <729600000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-748800000 {
+ opp-hz = /bits/ 64 <748800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-806400000 {
+ opp-hz = /bits/ 64 <806400000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-825600000 {
+ opp-hz = /bits/ 64 <825600000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-883200000 {
+ opp-hz = /bits/ 64 <883200000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-902400000 {
+ opp-hz = /bits/ 64 <902400000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-940800000 {
+ opp-hz = /bits/ 64 <940800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-979200000 {
+ opp-hz = /bits/ 64 <979200000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1036800000 {
+ opp-hz = /bits/ 64 <1036800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1113600000 {
+ opp-hz = /bits/ 64 <1113600000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1132800000 {
+ opp-hz = /bits/ 64 <1132800000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1190400000 {
+ opp-hz = /bits/ 64 <1190400000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1209600000 {
+ opp-hz = /bits/ 64 <1209600000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1286400000 {
+ opp-hz = /bits/ 64 <1286400000>;
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1324800000 {
+ opp-hz = /bits/ 64 <1324800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1363200000 {
+ opp-hz = /bits/ 64 <1363200000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1401600000 {
+ opp-hz = /bits/ 64 <1401600000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1440000000 {
+ opp-hz = /bits/ 64 <1440000000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1478400000 {
+ opp-hz = /bits/ 64 <1478400000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1516800000 {
+ opp-hz = /bits/ 64 <1516800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1555200000 {
+ opp-hz = /bits/ 64 <1555200000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1593600000 {
+ opp-hz = /bits/ 64 <1593600000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1632000000 {
+ opp-hz = /bits/ 64 <1632000000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1670400000 {
+ opp-hz = /bits/ 64 <1670400000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1708800000 {
+ opp-hz = /bits/ 64 <1708800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1747200000 {
+ opp-hz = /bits/ 64 <1747200000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x70>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1785600000 {
+ opp-hz = /bits/ 64 <1785600000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1804800000 {
+ opp-hz = /bits/ 64 <1804800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x6>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1824000000 {
+ opp-hz = /bits/ 64 <1824000000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x71>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1900800000 {
+ opp-hz = /bits/ 64 <1900800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x74>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1920000000 {
+ opp-hz = /bits/ 64 <1920000000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1977600000 {
+ opp-hz = /bits/ 64 <1977600000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x30>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1996800000 {
+ opp-hz = /bits/ 64 <1996800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <200000>;
+ };
+ opp-2054400000 {
+ opp-hz = /bits/ 64 <2054400000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x30>;
+ clock-latency-ns = <200000>;
+ };
+ opp-2073600000 {
+ opp-hz = /bits/ 64 <2073600000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <200000>;
+ };
+ opp-2150400000 {
+ opp-hz = /bits/ 64 <2150400000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x31>;
+ clock-latency-ns = <200000>;
+ };
+ opp-2246400000 {
+ opp-hz = /bits/ 64 <2246400000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x10>;
+ clock-latency-ns = <200000>;
+ };
+ opp-2342400000 {
+ opp-hz = /bits/ 64 <2342400000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x10>;
+ clock-latency-ns = <200000>;
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ smem_mem: smem-mem@86000000 {
+ reg = <0x0 0x86000000 0x0 0x200000>;
+ no-map;
+ };
+ };
+
+ smem {
+ compatible = "qcom,smem";
+ memory-region = <&smem_mem>;
+ hwlocks = <&tcsr_mutex 3>;
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ qfprom: qfprom@74000 {
+ compatible = "qcom,msm8996-qfprom", "qcom,qfprom";
+ reg = <0x00074000 0x8ff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ speedbin_efuse: speedbin@133 {
+ reg = <0x133 0x1>;
+ bits = <5 3>;
+ };
+ };
+ };
+ };
+
+ - |
+ / {
+ model = "Qualcomm Technologies, Inc. QCS404";
+ compatible = "qcom,qcs404";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x100>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ #cooling-cells = <2>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ power-domains = <&cpr>;
+ power-domain-names = "cpr";
+ };
+
+ cpu@101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x101>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ #cooling-cells = <2>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ power-domains = <&cpr>;
+ power-domain-names = "cpr";
+ };
+
+ cpu@102 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x102>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ #cooling-cells = <2>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ power-domains = <&cpr>;
+ power-domain-names = "cpr";
+ };
+
+ cpu@103 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x103>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ #cooling-cells = <2>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ power-domains = <&cpr>;
+ power-domain-names = "cpr";
+ };
+ };
+
+ cpu_opp_table: cpu-opp-table {
+ compatible = "operating-points-v2-kryo-cpu";
+ opp-shared;
+
+ opp-1094400000 {
+ opp-hz = /bits/ 64 <1094400000>;
+ required-opps = <&cpr_opp1>;
+ };
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ required-opps = <&cpr_opp2>;
+ };
+ opp-1401600000 {
+ opp-hz = /bits/ 64 <1401600000>;
+ required-opps = <&cpr_opp3>;
+ };
+ };
+
+ cpr_opp_table: cpr-opp-table {
+ compatible = "operating-points-v2-qcom-level";
+
+ cpr_opp1: opp1 {
+ opp-level = <1>;
+ qcom,opp-fuse-level = <1>;
+ };
+ cpr_opp2: opp2 {
+ opp-level = <2>;
+ qcom,opp-fuse-level = <2>;
+ };
+ cpr_opp3: opp3 {
+ opp-level = <3>;
+ qcom,opp-fuse-level = <3>;
+ };
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpr: power-controller@b018000 {
+ compatible = "qcom,qcs404-cpr", "qcom,cpr";
+ reg = <0x0b018000 0x1000>;
+
+ vdd-apc-supply = <&pms405_s3>;
+ #power-domain-cells = <0>;
+ operating-points-v2 = <&cpr_opp_table>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
deleted file mode 100644
index 64f07417ecfb..000000000000
--- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
+++ /dev/null
@@ -1,796 +0,0 @@
-Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings
-===================================
-
-In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996,
-the CPU frequencies subset and voltage value of each OPP varies based on
-the silicon variant in use.
-Qualcomm Technologies, Inc. Process Voltage Scaling Tables
-defines the voltage and frequency value based on the msm-id in SMEM
-and speedbin blown in the efuse combination.
-The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
-to provide the OPP framework with required information (existing HW bitmap).
-This is used to determine the voltage and frequency value for each OPP of
-operating-points-v2 table when it is parsed by the OPP framework.
-
-Required properties:
---------------------
-In 'cpu' nodes:
-- operating-points-v2: Phandle to the operating-points-v2 table to use.
-
-In 'operating-points-v2' table:
-- compatible: Should be
- - 'operating-points-v2-kryo-cpu' for apq8096, msm8996, msm8974,
- apq8064, ipq8064, msm8960 and ipq8074.
-
-Optional properties:
---------------------
-In 'cpu' nodes:
-- power-domains: A phandle pointing to the PM domain specifier which provides
- the performance states available for active state management.
- Please refer to the power-domains bindings
- Documentation/devicetree/bindings/power/power_domain.txt
- and also examples below.
-- power-domain-names: Should be
- - 'cpr' for qcs404.
-
-In 'operating-points-v2' table:
-- nvmem-cells: A phandle pointing to a nvmem-cells node representing the
- efuse registers that has information about the
- speedbin that is used to select the right frequency/voltage
- value pair.
- Please refer the for nvmem-cells
- bindings Documentation/devicetree/bindings/nvmem/nvmem.txt
- and also examples below.
-
-In every OPP node:
-- opp-supported-hw: A single 32 bit bitmap value, representing compatible HW.
- Bitmap:
- 0: MSM8996 V3, speedbin 0
- 1: MSM8996 V3, speedbin 1
- 2: MSM8996 V3, speedbin 2
- 3: unused
- 4: MSM8996 SG, speedbin 0
- 5: MSM8996 SG, speedbin 1
- 6: MSM8996 SG, speedbin 2
- 7-31: unused
-
-Example 1:
----------
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- CPU0: cpu@0 {
- device_type = "cpu";
- compatible = "qcom,kryo";
- reg = <0x0 0x0>;
- enable-method = "psci";
- clocks = <&kryocc 0>;
- cpu-supply = <&pm8994_s11_saw>;
- operating-points-v2 = <&cluster0_opp>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_0>;
- L2_0: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- };
- };
-
- CPU1: cpu@1 {
- device_type = "cpu";
- compatible = "qcom,kryo";
- reg = <0x0 0x1>;
- enable-method = "psci";
- clocks = <&kryocc 0>;
- cpu-supply = <&pm8994_s11_saw>;
- operating-points-v2 = <&cluster0_opp>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_0>;
- };
-
- CPU2: cpu@100 {
- device_type = "cpu";
- compatible = "qcom,kryo";
- reg = <0x0 0x100>;
- enable-method = "psci";
- clocks = <&kryocc 1>;
- cpu-supply = <&pm8994_s11_saw>;
- operating-points-v2 = <&cluster1_opp>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_1>;
- L2_1: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- };
- };
-
- CPU3: cpu@101 {
- device_type = "cpu";
- compatible = "qcom,kryo";
- reg = <0x0 0x101>;
- enable-method = "psci";
- clocks = <&kryocc 1>;
- cpu-supply = <&pm8994_s11_saw>;
- operating-points-v2 = <&cluster1_opp>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_1>;
- };
-
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&CPU0>;
- };
-
- core1 {
- cpu = <&CPU1>;
- };
- };
-
- cluster1 {
- core0 {
- cpu = <&CPU2>;
- };
-
- core1 {
- cpu = <&CPU3>;
- };
- };
- };
- };
-
- cluster0_opp: opp_table0 {
- compatible = "operating-points-v2-kryo-cpu";
- nvmem-cells = <&speedbin_efuse>;
- opp-shared;
-
- opp-307200000 {
- opp-hz = /bits/ 64 <307200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x77>;
- clock-latency-ns = <200000>;
- };
- opp-384000000 {
- opp-hz = /bits/ 64 <384000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-422400000 {
- opp-hz = /bits/ 64 <422400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-460800000 {
- opp-hz = /bits/ 64 <460800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-480000000 {
- opp-hz = /bits/ 64 <480000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-537600000 {
- opp-hz = /bits/ 64 <537600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-556800000 {
- opp-hz = /bits/ 64 <556800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-614400000 {
- opp-hz = /bits/ 64 <614400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-652800000 {
- opp-hz = /bits/ 64 <652800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-691200000 {
- opp-hz = /bits/ 64 <691200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-729600000 {
- opp-hz = /bits/ 64 <729600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-768000000 {
- opp-hz = /bits/ 64 <768000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-844800000 {
- opp-hz = /bits/ 64 <844800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x77>;
- clock-latency-ns = <200000>;
- };
- opp-902400000 {
- opp-hz = /bits/ 64 <902400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-960000000 {
- opp-hz = /bits/ 64 <960000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-979200000 {
- opp-hz = /bits/ 64 <979200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1036800000 {
- opp-hz = /bits/ 64 <1036800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1056000000 {
- opp-hz = /bits/ 64 <1056000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1113600000 {
- opp-hz = /bits/ 64 <1113600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1132800000 {
- opp-hz = /bits/ 64 <1132800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1190400000 {
- opp-hz = /bits/ 64 <1190400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1209600000 {
- opp-hz = /bits/ 64 <1209600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1228800000 {
- opp-hz = /bits/ 64 <1228800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1286400000 {
- opp-hz = /bits/ 64 <1286400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1324800000 {
- opp-hz = /bits/ 64 <1324800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x5>;
- clock-latency-ns = <200000>;
- };
- opp-1363200000 {
- opp-hz = /bits/ 64 <1363200000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x72>;
- clock-latency-ns = <200000>;
- };
- opp-1401600000 {
- opp-hz = /bits/ 64 <1401600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x5>;
- clock-latency-ns = <200000>;
- };
- opp-1440000000 {
- opp-hz = /bits/ 64 <1440000000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1478400000 {
- opp-hz = /bits/ 64 <1478400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- };
- opp-1497600000 {
- opp-hz = /bits/ 64 <1497600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x4>;
- clock-latency-ns = <200000>;
- };
- opp-1516800000 {
- opp-hz = /bits/ 64 <1516800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1593600000 {
- opp-hz = /bits/ 64 <1593600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x71>;
- clock-latency-ns = <200000>;
- };
- opp-1996800000 {
- opp-hz = /bits/ 64 <1996800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x20>;
- clock-latency-ns = <200000>;
- };
- opp-2188800000 {
- opp-hz = /bits/ 64 <2188800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x10>;
- clock-latency-ns = <200000>;
- };
- };
-
- cluster1_opp: opp_table1 {
- compatible = "operating-points-v2-kryo-cpu";
- nvmem-cells = <&speedbin_efuse>;
- opp-shared;
-
- opp-307200000 {
- opp-hz = /bits/ 64 <307200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x77>;
- clock-latency-ns = <200000>;
- };
- opp-384000000 {
- opp-hz = /bits/ 64 <384000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-403200000 {
- opp-hz = /bits/ 64 <403200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-460800000 {
- opp-hz = /bits/ 64 <460800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-480000000 {
- opp-hz = /bits/ 64 <480000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-537600000 {
- opp-hz = /bits/ 64 <537600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-556800000 {
- opp-hz = /bits/ 64 <556800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-614400000 {
- opp-hz = /bits/ 64 <614400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-652800000 {
- opp-hz = /bits/ 64 <652800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-691200000 {
- opp-hz = /bits/ 64 <691200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-729600000 {
- opp-hz = /bits/ 64 <729600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-748800000 {
- opp-hz = /bits/ 64 <748800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-806400000 {
- opp-hz = /bits/ 64 <806400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-825600000 {
- opp-hz = /bits/ 64 <825600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-883200000 {
- opp-hz = /bits/ 64 <883200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-902400000 {
- opp-hz = /bits/ 64 <902400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-940800000 {
- opp-hz = /bits/ 64 <940800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-979200000 {
- opp-hz = /bits/ 64 <979200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1036800000 {
- opp-hz = /bits/ 64 <1036800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1056000000 {
- opp-hz = /bits/ 64 <1056000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1113600000 {
- opp-hz = /bits/ 64 <1113600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1132800000 {
- opp-hz = /bits/ 64 <1132800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1190400000 {
- opp-hz = /bits/ 64 <1190400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1209600000 {
- opp-hz = /bits/ 64 <1209600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1248000000 {
- opp-hz = /bits/ 64 <1248000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1286400000 {
- opp-hz = /bits/ 64 <1286400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1324800000 {
- opp-hz = /bits/ 64 <1324800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1363200000 {
- opp-hz = /bits/ 64 <1363200000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1401600000 {
- opp-hz = /bits/ 64 <1401600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1440000000 {
- opp-hz = /bits/ 64 <1440000000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1478400000 {
- opp-hz = /bits/ 64 <1478400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1516800000 {
- opp-hz = /bits/ 64 <1516800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1555200000 {
- opp-hz = /bits/ 64 <1555200000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1593600000 {
- opp-hz = /bits/ 64 <1593600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1632000000 {
- opp-hz = /bits/ 64 <1632000000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1670400000 {
- opp-hz = /bits/ 64 <1670400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1708800000 {
- opp-hz = /bits/ 64 <1708800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1747200000 {
- opp-hz = /bits/ 64 <1747200000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
- opp-1785600000 {
- opp-hz = /bits/ 64 <1785600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x7>;
- clock-latency-ns = <200000>;
- };
- opp-1804800000 {
- opp-hz = /bits/ 64 <1804800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x6>;
- clock-latency-ns = <200000>;
- };
- opp-1824000000 {
- opp-hz = /bits/ 64 <1824000000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x71>;
- clock-latency-ns = <200000>;
- };
- opp-1900800000 {
- opp-hz = /bits/ 64 <1900800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x74>;
- clock-latency-ns = <200000>;
- };
- opp-1920000000 {
- opp-hz = /bits/ 64 <1920000000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- };
- opp-1977600000 {
- opp-hz = /bits/ 64 <1977600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x30>;
- clock-latency-ns = <200000>;
- };
- opp-1996800000 {
- opp-hz = /bits/ 64 <1996800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- };
- opp-2054400000 {
- opp-hz = /bits/ 64 <2054400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x30>;
- clock-latency-ns = <200000>;
- };
- opp-2073600000 {
- opp-hz = /bits/ 64 <2073600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- };
- opp-2150400000 {
- opp-hz = /bits/ 64 <2150400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x31>;
- clock-latency-ns = <200000>;
- };
- opp-2246400000 {
- opp-hz = /bits/ 64 <2246400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x10>;
- clock-latency-ns = <200000>;
- };
- opp-2342400000 {
- opp-hz = /bits/ 64 <2342400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x10>;
- clock-latency-ns = <200000>;
- };
- };
-
-....
-
-reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-....
- smem_mem: smem-mem@86000000 {
- reg = <0x0 0x86000000 0x0 0x200000>;
- no-map;
- };
-....
-};
-
-smem {
- compatible = "qcom,smem";
- memory-region = <&smem_mem>;
- hwlocks = <&tcsr_mutex 3>;
-};
-
-soc {
-....
- qfprom: qfprom@74000 {
- compatible = "qcom,qfprom";
- reg = <0x00074000 0x8ff>;
- #address-cells = <1>;
- #size-cells = <1>;
- ....
- speedbin_efuse: speedbin@133 {
- reg = <0x133 0x1>;
- bits = <5 3>;
- };
- };
-};
-
-Example 2:
----------
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- CPU0: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x100>;
- ....
- clocks = <&apcs_glb>;
- operating-points-v2 = <&cpu_opp_table>;
- power-domains = <&cpr>;
- power-domain-names = "cpr";
- };
-
- CPU1: cpu@101 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x101>;
- ....
- clocks = <&apcs_glb>;
- operating-points-v2 = <&cpu_opp_table>;
- power-domains = <&cpr>;
- power-domain-names = "cpr";
- };
-
- CPU2: cpu@102 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x102>;
- ....
- clocks = <&apcs_glb>;
- operating-points-v2 = <&cpu_opp_table>;
- power-domains = <&cpr>;
- power-domain-names = "cpr";
- };
-
- CPU3: cpu@103 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x103>;
- ....
- clocks = <&apcs_glb>;
- operating-points-v2 = <&cpu_opp_table>;
- power-domains = <&cpr>;
- power-domain-names = "cpr";
- };
- };
-
- cpu_opp_table: cpu-opp-table {
- compatible = "operating-points-v2-kryo-cpu";
- opp-shared;
-
- opp-1094400000 {
- opp-hz = /bits/ 64 <1094400000>;
- required-opps = <&cpr_opp1>;
- };
- opp-1248000000 {
- opp-hz = /bits/ 64 <1248000000>;
- required-opps = <&cpr_opp2>;
- };
- opp-1401600000 {
- opp-hz = /bits/ 64 <1401600000>;
- required-opps = <&cpr_opp3>;
- };
- };
-
- cpr_opp_table: cpr-opp-table {
- compatible = "operating-points-v2-qcom-level";
-
- cpr_opp1: opp1 {
- opp-level = <1>;
- qcom,opp-fuse-level = <1>;
- };
- cpr_opp2: opp2 {
- opp-level = <2>;
- qcom,opp-fuse-level = <2>;
- };
- cpr_opp3: opp3 {
- opp-level = <3>;
- qcom,opp-fuse-level = <3>;
- };
- };
-
-....
-
-soc {
-....
- cpr: power-controller@b018000 {
- compatible = "qcom,qcs404-cpr", "qcom,cpr";
- reg = <0x0b018000 0x1000>;
- ....
- vdd-apc-supply = <&pms405_s3>;
- #power-domain-cells = <0>;
- operating-points-v2 = <&cpr_opp_table>;
- ....
- };
-};
diff --git a/MAINTAINERS b/MAINTAINERS
index a7715fc859f7..e62cd1f613c5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15660,7 +15660,7 @@ QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096
M: Ilia Lin <ilia.lin@kernel.org>
L: linux-pm@vger.kernel.org
S: Maintained
-F: Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
+F: Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
F: drivers/cpufreq/qcom-cpufreq-nvmem.c
QUALCOMM CRYPTO DRIVERS
--
2.33.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 6/8] dt-bindings: opp: qcom-cpufreq-nvmem: Remove SMEM
2021-10-14 8:30 [PATCH 0/8] Add support for MSM8996 Pro Yassine Oudjana
` (4 preceding siblings ...)
2021-10-14 8:32 ` [PATCH 5/8] dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema Yassine Oudjana
@ 2021-10-14 8:32 ` Yassine Oudjana
2021-10-14 8:32 ` [PATCH 7/8] arm64: dts: qcom: msm8996: Add MSM8996 Pro support Yassine Oudjana
2021-10-14 11:00 ` [PATCH 8/8] arm64: dts: qcom: msm8996-xiaomi-scorpio: Include msm8996pro.dtsi Yassine Oudjana
7 siblings, 0 replies; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-14 8:32 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Ilia Lin, Viresh Kumar, Nishanth Menon,
Rafael J. Wysocki, Loic Poulain
Cc: Yassine Oudjana, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
qcom-cpufreq-nvmem no longer uses SMEM. Remove all references to it,
and update the opp-supported-hw description to show the new
possible values
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
.../bindings/opp/qcom-cpufreq-nvmem.yaml | 362 +-----------------
1 file changed, 21 insertions(+), 341 deletions(-)
diff --git a/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
index 4a7d4826746e..338781c63ba6 100644
--- a/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
+++ b/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
@@ -13,11 +13,11 @@ description: |
In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996,
the CPU frequencies subset and voltage value of each OPP varies based on
the silicon variant in use.
- Qualcomm Technologies, Inc. Process Voltage Scaling Tables
- defines the voltage and frequency value based on the msm-id in SMEM
- and speedbin blown in the efuse combination.
- The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
- to provide the OPP framework with required information (existing HW bitmap).
+ Qualcomm Technologies, Inc. Process Voltage Scaling Tables defines
+ the voltage and frequency value based on the speedbin blown in the
+ efuse combination.
+ The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
+ the OPP framework with required information (existing HW bitmap).
This is used to determine the voltage and frequency value for each OPP of
operating-points-v2 table when it is parsed by the OPP framework.
@@ -60,14 +60,10 @@ patternProperties:
description: |
A single 32 bit bitmap value, representing compatible HW.
Bitmap:
- 0: MSM8996 V3, speedbin 0
- 1: MSM8996 V3, speedbin 1
- 2: MSM8996 V3, speedbin 2
- 3: unused
- 4: MSM8996 SG, speedbin 0
- 5: MSM8996 SG, speedbin 1
- 6: MSM8996 SG, speedbin 2
- 7-31: unused
+ 0: MSM8996, speedbin 0
+ 1: MSM8996, speedbin 1
+ 2: MSM8996, speedbin 2
+ 3-31: unused
required:
- opp-hz
@@ -212,206 +208,82 @@ examples:
opp-307200000 {
opp-hz = /bits/ 64 <307200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x77>;
- clock-latency-ns = <200000>;
- };
- opp-384000000 {
- opp-hz = /bits/ 64 <384000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-422400000 {
opp-hz = /bits/ 64 <422400000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-460800000 {
- opp-hz = /bits/ 64 <460800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-480000000 {
opp-hz = /bits/ 64 <480000000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-537600000 {
- opp-hz = /bits/ 64 <537600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-556800000 {
opp-hz = /bits/ 64 <556800000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-614400000 {
- opp-hz = /bits/ 64 <614400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-652800000 {
opp-hz = /bits/ 64 <652800000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-691200000 {
- opp-hz = /bits/ 64 <691200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-729600000 {
opp-hz = /bits/ 64 <729600000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-768000000 {
- opp-hz = /bits/ 64 <768000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-844800000 {
opp-hz = /bits/ 64 <844800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x77>;
- clock-latency-ns = <200000>;
- };
- opp-902400000 {
- opp-hz = /bits/ 64 <902400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-960000000 {
opp-hz = /bits/ 64 <960000000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-979200000 {
- opp-hz = /bits/ 64 <979200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1036800000 {
opp-hz = /bits/ 64 <1036800000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1056000000 {
- opp-hz = /bits/ 64 <1056000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1113600000 {
opp-hz = /bits/ 64 <1113600000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1132800000 {
- opp-hz = /bits/ 64 <1132800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1190400000 {
opp-hz = /bits/ 64 <1190400000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1209600000 {
- opp-hz = /bits/ 64 <1209600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1228800000 {
opp-hz = /bits/ 64 <1228800000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1286400000 {
- opp-hz = /bits/ 64 <1286400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1324800000 {
opp-hz = /bits/ 64 <1324800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x5>;
- clock-latency-ns = <200000>;
- };
- opp-1363200000 {
- opp-hz = /bits/ 64 <1363200000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x72>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1401600000 {
opp-hz = /bits/ 64 <1401600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x5>;
- clock-latency-ns = <200000>;
- };
- opp-1440000000 {
- opp-hz = /bits/ 64 <1440000000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1478400000 {
opp-hz = /bits/ 64 <1478400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- };
- opp-1497600000 {
- opp-hz = /bits/ 64 <1497600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x4>;
- clock-latency-ns = <200000>;
- };
- opp-1516800000 {
- opp-hz = /bits/ 64 <1516800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1593600000 {
opp-hz = /bits/ 64 <1593600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x71>;
- clock-latency-ns = <200000>;
- };
- opp-1996800000 {
- opp-hz = /bits/ 64 <1996800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x20>;
- clock-latency-ns = <200000>;
- };
- opp-2188800000 {
- opp-hz = /bits/ 64 <2188800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x10>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
};
@@ -423,323 +295,131 @@ examples:
opp-307200000 {
opp-hz = /bits/ 64 <307200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x77>;
- clock-latency-ns = <200000>;
- };
- opp-384000000 {
- opp-hz = /bits/ 64 <384000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-403200000 {
opp-hz = /bits/ 64 <403200000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-460800000 {
- opp-hz = /bits/ 64 <460800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-480000000 {
opp-hz = /bits/ 64 <480000000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-537600000 {
- opp-hz = /bits/ 64 <537600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-556800000 {
opp-hz = /bits/ 64 <556800000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-614400000 {
- opp-hz = /bits/ 64 <614400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-652800000 {
opp-hz = /bits/ 64 <652800000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-691200000 {
- opp-hz = /bits/ 64 <691200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-729600000 {
opp-hz = /bits/ 64 <729600000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-748800000 {
- opp-hz = /bits/ 64 <748800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-806400000 {
opp-hz = /bits/ 64 <806400000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-825600000 {
- opp-hz = /bits/ 64 <825600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-883200000 {
opp-hz = /bits/ 64 <883200000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-902400000 {
- opp-hz = /bits/ 64 <902400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-940800000 {
opp-hz = /bits/ 64 <940800000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-979200000 {
- opp-hz = /bits/ 64 <979200000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1036800000 {
opp-hz = /bits/ 64 <1036800000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1056000000 {
- opp-hz = /bits/ 64 <1056000000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1113600000 {
opp-hz = /bits/ 64 <1113600000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1132800000 {
- opp-hz = /bits/ 64 <1132800000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1190400000 {
opp-hz = /bits/ 64 <1190400000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1209600000 {
- opp-hz = /bits/ 64 <1209600000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1248000000 {
opp-hz = /bits/ 64 <1248000000>;
- opp-microvolt = <905000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1286400000 {
- opp-hz = /bits/ 64 <1286400000>;
- opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1324800000 {
opp-hz = /bits/ 64 <1324800000>;
- opp-microvolt = <1140000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1363200000 {
- opp-hz = /bits/ 64 <1363200000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1401600000 {
opp-hz = /bits/ 64 <1401600000>;
- opp-microvolt = <1140000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1440000000 {
- opp-hz = /bits/ 64 <1440000000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1478400000 {
opp-hz = /bits/ 64 <1478400000>;
- opp-microvolt = <1140000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1516800000 {
- opp-hz = /bits/ 64 <1516800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1555200000 {
opp-hz = /bits/ 64 <1555200000>;
- opp-microvolt = <1140000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1593600000 {
- opp-hz = /bits/ 64 <1593600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1632000000 {
opp-hz = /bits/ 64 <1632000000>;
- opp-microvolt = <1140000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1670400000 {
- opp-hz = /bits/ 64 <1670400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1708800000 {
opp-hz = /bits/ 64 <1708800000>;
- opp-microvolt = <1140000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1747200000 {
- opp-hz = /bits/ 64 <1747200000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
- clock-latency-ns = <200000>;
- };
opp-1785600000 {
opp-hz = /bits/ 64 <1785600000>;
- opp-microvolt = <1140000 905000 1140000>;
opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1804800000 {
- opp-hz = /bits/ 64 <1804800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x6>;
- clock-latency-ns = <200000>;
- };
opp-1824000000 {
opp-hz = /bits/ 64 <1824000000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x71>;
- clock-latency-ns = <200000>;
- };
- opp-1900800000 {
- opp-hz = /bits/ 64 <1900800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x74>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1920000000 {
opp-hz = /bits/ 64 <1920000000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- };
- opp-1977600000 {
- opp-hz = /bits/ 64 <1977600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x30>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1996800000 {
opp-hz = /bits/ 64 <1996800000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- };
- opp-2054400000 {
- opp-hz = /bits/ 64 <2054400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x30>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-2073600000 {
opp-hz = /bits/ 64 <2073600000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x1>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-2150400000 {
opp-hz = /bits/ 64 <2150400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x31>;
- clock-latency-ns = <200000>;
- };
- opp-2246400000 {
- opp-hz = /bits/ 64 <2246400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x10>;
- clock-latency-ns = <200000>;
- };
- opp-2342400000 {
- opp-hz = /bits/ 64 <2342400000>;
- opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x10>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
};
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- smem_mem: smem-mem@86000000 {
- reg = <0x0 0x86000000 0x0 0x200000>;
- no-map;
- };
- };
-
- smem {
- compatible = "qcom,smem";
- memory-region = <&smem_mem>;
- hwlocks = <&tcsr_mutex 3>;
- };
-
soc {
#address-cells = <1>;
#size-cells = <1>;
--
2.33.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 7/8] arm64: dts: qcom: msm8996: Add MSM8996 Pro support
2021-10-14 8:30 [PATCH 0/8] Add support for MSM8996 Pro Yassine Oudjana
` (5 preceding siblings ...)
2021-10-14 8:32 ` [PATCH 6/8] dt-bindings: opp: qcom-cpufreq-nvmem: Remove SMEM Yassine Oudjana
@ 2021-10-14 8:32 ` Yassine Oudjana
2021-10-15 19:01 ` Konrad Dybcio
2021-10-14 11:00 ` [PATCH 8/8] arm64: dts: qcom: msm8996-xiaomi-scorpio: Include msm8996pro.dtsi Yassine Oudjana
7 siblings, 1 reply; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-14 8:32 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Ilia Lin, Viresh Kumar, Nishanth Menon,
Rafael J. Wysocki, Loic Poulain
Cc: Yassine Oudjana, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
Add a new DTSI for MSM8996 Pro (MSM8996SG) with msm-id and CPU/GPU OPPs.
CBF OPPs and CPR parameters will be added to it as well once support for
CBF scaling and CPR is introduced.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 82 +++----
arch/arm64/boot/dts/qcom/msm8996pro.dtsi | 281 +++++++++++++++++++++++
2 files changed, 322 insertions(+), 41 deletions(-)
create mode 100644 arch/arm64/boot/dts/qcom/msm8996pro.dtsi
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 94a846c3f1ee..5b2600a4fb2a 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -142,82 +142,82 @@ cluster0_opp: opp_table0 {
/* Nominal fmax for now */
opp-307200000 {
opp-hz = /bits/ 64 <307200000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-422400000 {
opp-hz = /bits/ 64 <422400000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-480000000 {
opp-hz = /bits/ 64 <480000000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-556800000 {
opp-hz = /bits/ 64 <556800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-652800000 {
opp-hz = /bits/ 64 <652800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-729600000 {
opp-hz = /bits/ 64 <729600000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-844800000 {
opp-hz = /bits/ 64 <844800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-960000000 {
opp-hz = /bits/ 64 <960000000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1036800000 {
opp-hz = /bits/ 64 <1036800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1113600000 {
opp-hz = /bits/ 64 <1113600000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1190400000 {
opp-hz = /bits/ 64 <1190400000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1228800000 {
opp-hz = /bits/ 64 <1228800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1324800000 {
opp-hz = /bits/ 64 <1324800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1401600000 {
opp-hz = /bits/ 64 <1401600000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1478400000 {
opp-hz = /bits/ 64 <1478400000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1593600000 {
opp-hz = /bits/ 64 <1593600000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
};
@@ -230,127 +230,127 @@ cluster1_opp: opp_table1 {
/* Nominal fmax for now */
opp-307200000 {
opp-hz = /bits/ 64 <307200000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-403200000 {
opp-hz = /bits/ 64 <403200000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-480000000 {
opp-hz = /bits/ 64 <480000000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-556800000 {
opp-hz = /bits/ 64 <556800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-652800000 {
opp-hz = /bits/ 64 <652800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-729600000 {
opp-hz = /bits/ 64 <729600000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-806400000 {
opp-hz = /bits/ 64 <806400000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-883200000 {
opp-hz = /bits/ 64 <883200000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-940800000 {
opp-hz = /bits/ 64 <940800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1036800000 {
opp-hz = /bits/ 64 <1036800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1113600000 {
opp-hz = /bits/ 64 <1113600000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1190400000 {
opp-hz = /bits/ 64 <1190400000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1248000000 {
opp-hz = /bits/ 64 <1248000000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1324800000 {
opp-hz = /bits/ 64 <1324800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1401600000 {
opp-hz = /bits/ 64 <1401600000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1478400000 {
opp-hz = /bits/ 64 <1478400000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1555200000 {
opp-hz = /bits/ 64 <1555200000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1632000000 {
opp-hz = /bits/ 64 <1632000000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1708800000 {
opp-hz = /bits/ 64 <1708800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1785600000 {
opp-hz = /bits/ 64 <1785600000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1824000000 {
opp-hz = /bits/ 64 <1824000000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1920000000 {
opp-hz = /bits/ 64 <1920000000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-1996800000 {
opp-hz = /bits/ 64 <1996800000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-2073600000 {
opp-hz = /bits/ 64 <2073600000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
opp-2150400000 {
opp-hz = /bits/ 64 <2150400000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
};
diff --git a/arch/arm64/boot/dts/qcom/msm8996pro.dtsi b/arch/arm64/boot/dts/qcom/msm8996pro.dtsi
new file mode 100644
index 000000000000..8c8dd5614f4d
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8996pro.dtsi
@@ -0,0 +1,281 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2021, Yassine Oudjana <y.oudjana@protonmail.com>
+ */
+
+#include "msm8996.dtsi"
+
+/*
+ * MSM8996 Pro (also known as MSM8996SG) is a revision of MSM8996 with
+ * different CPU, CBF and GPU frequencies as well as CPR parameters.
+ */
+/delete-node/ &cluster0_opp;
+/delete-node/ &cluster1_opp;
+
+/ {
+ qcom,msm-id = <305 0x10000>;
+
+ cluster0_opp: opp_table0 {
+ compatible = "operating-points-v2-kryo-cpu";
+ nvmem-cells = <&speedbin_efuse>;
+ opp-shared;
+
+ opp-307200000 {
+ opp-hz = /bits/ 64 <307200000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-460800000 {
+ opp-hz = /bits/ 64 <460800000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-537600000 {
+ opp-hz = /bits/ 64 <537600000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-614400000 {
+ opp-hz = /bits/ 64 <614400000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-691200000 {
+ opp-hz = /bits/ 64 <691200000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-768000000 {
+ opp-hz = /bits/ 64 <768000000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-844800000 {
+ opp-hz = /bits/ 64 <844800000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-902400000 {
+ opp-hz = /bits/ 64 <902400000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-979200000 {
+ opp-hz = /bits/ 64 <979200000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1132800000 {
+ opp-hz = /bits/ 64 <1132800000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1209600000 {
+ opp-hz = /bits/ 64 <1209600000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1286400000 {
+ opp-hz = /bits/ 64 <1286400000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1363200000 {
+ opp-hz = /bits/ 64 <1363200000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1440000000 {
+ opp-hz = /bits/ 64 <1440000000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1516800000 {
+ opp-hz = /bits/ 64 <1516800000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1593600000 {
+ opp-hz = /bits/ 64 <1593600000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1996800000 {
+ opp-hz = /bits/ 64 <1996800000>;
+ opp-supported-hw = <0x2>;
+ clock-latency-ns = <200000>;
+ };
+ opp-2188800000 {
+ opp-hz = /bits/ 64 <2188800000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <200000>;
+ };
+ };
+
+ cluster1_opp: opp_table1 {
+ compatible = "operating-points-v2-kryo-cpu";
+ nvmem-cells = <&speedbin_efuse>;
+ opp-shared;
+
+ opp-307200000 {
+ opp-hz = /bits/ 64 <307200000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-460800000 {
+ opp-hz = /bits/ 64 <460800000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-537600000 {
+ opp-hz = /bits/ 64 <537600000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-614400000 {
+ opp-hz = /bits/ 64 <614400000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-691200000 {
+ opp-hz = /bits/ 64 <691200000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-748800000 {
+ opp-hz = /bits/ 64 <748800000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-825600000 {
+ opp-hz = /bits/ 64 <825600000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-902400000 {
+ opp-hz = /bits/ 64 <902400000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-979200000 {
+ opp-hz = /bits/ 64 <979200000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1132800000 {
+ opp-hz = /bits/ 64 <1132800000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1209600000 {
+ opp-hz = /bits/ 64 <1209600000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1286400000 {
+ opp-hz = /bits/ 64 <1286400000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1363200000 {
+ opp-hz = /bits/ 64 <1363200000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1440000000 {
+ opp-hz = /bits/ 64 <1440000000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1516800000 {
+ opp-hz = /bits/ 64 <1516800000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1593600000 {
+ opp-hz = /bits/ 64 <1593600000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1670400000 {
+ opp-hz = /bits/ 64 <1670400000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1747200000 {
+ opp-hz = /bits/ 64 <1747200000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1824000000 {
+ opp-hz = /bits/ 64 <1824000000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1900800000 {
+ opp-hz = /bits/ 64 <1900800000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
+ };
+ opp-1977600000 {
+ opp-hz = /bits/ 64 <1977600000>;
+ opp-supported-hw = <0x3>;
+ clock-latency-ns = <200000>;
+ };
+ opp-2054400000 {
+ opp-hz = /bits/ 64 <2054400000>;
+ opp-supported-hw = <0x3>;
+ clock-latency-ns = <200000>;
+ };
+ opp-2150400000 {
+ opp-hz = /bits/ 64 <2150400000>;
+ opp-supported-hw = <0x3>;
+ clock-latency-ns = <200000>;
+ };
+ opp-2246400000 {
+ opp-hz = /bits/ 64 <2246400000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <200000>;
+ };
+ opp-2342400000 {
+ opp-hz = /bits/ 64 <2342400000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <200000>;
+ };
+ };
+};
+
+&gpu_opp_table {
+ /*
+ * All MSM8996 GPU OPPs are available on MSM8996 Pro,
+ * in addition to one:
+ */
+ opp-652800000 {
+ opp-hz = /bits/ 64 <652800000>;
+ opp-supported-hw = <0x1>;
+ };
+};
+
+&kryocc {
+ compatible = "qcom,msm8996pro-apcc";
+};
--
2.33.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 8/8] arm64: dts: qcom: msm8996-xiaomi-scorpio: Include msm8996pro.dtsi
2021-10-14 8:30 [PATCH 0/8] Add support for MSM8996 Pro Yassine Oudjana
` (6 preceding siblings ...)
2021-10-14 8:32 ` [PATCH 7/8] arm64: dts: qcom: msm8996: Add MSM8996 Pro support Yassine Oudjana
@ 2021-10-14 11:00 ` Yassine Oudjana
2021-10-15 19:03 ` Konrad Dybcio
7 siblings, 1 reply; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-14 11:00 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Ilia Lin, Viresh Kumar, Nishanth Menon,
Rafael J. Wysocki, Loic Poulain
Cc: Yassine Oudjana, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
Move msm8996.dtsi include to the end of the include chain.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi | 3 ---
arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts | 1 +
arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts | 2 +-
3 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
index d239b01b8505..831cd39aff14 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
@@ -3,9 +3,6 @@
* Copyright (c) 2020, Yassine Oudjana <y.oudjana@protonmail.com>
*/
-/dts-v1/;
-
-#include "msm8996.dtsi"
#include "pm8994.dtsi"
#include "pmi8994.dtsi"
#include <dt-bindings/input/input.h>
diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
index 77d508e5164a..8ea5390f86ab 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
+++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
@@ -5,6 +5,7 @@
/dts-v1/;
+#include "msm8996.dtsi"
#include "msm8996-xiaomi-common.dtsi"
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts
index ea2ca271fe7d..4ffe7be34285 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts
+++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts
@@ -5,6 +5,7 @@
/dts-v1/;
+#include "msm8996pro.dtsi"
#include "msm8996-xiaomi-common.dtsi"
#include "pmi8996.dtsi"
#include <dt-bindings/sound/qcom,q6afe.h>
@@ -13,7 +14,6 @@
/ {
model = "Xiaomi Mi Note 2";
compatible = "xiaomi,scorpio", "qcom,msm8996";
- qcom,msm-id = <305 0x10000>;
qcom,board-id = <34 0>;
chosen {
--
2.33.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 4/8] cpufreq: qcom_cpufreq_nvmem: Simplify reading kryo speedbin
2021-10-14 8:32 ` [PATCH 4/8] cpufreq: qcom_cpufreq_nvmem: Simplify reading kryo speedbin Yassine Oudjana
@ 2021-10-14 12:25 ` Dmitry Baryshkov
2021-10-15 18:58 ` Konrad Dybcio
1 sibling, 0 replies; 27+ messages in thread
From: Dmitry Baryshkov @ 2021-10-14 12:25 UTC (permalink / raw)
To: Yassine Oudjana, Andy Gross, Bjorn Andersson, Michael Turquette,
Stephen Boyd, Rob Herring, Ilia Lin, Viresh Kumar,
Nishanth Menon, Rafael J. Wysocki, Loic Poulain
Cc: Konrad Dybcio, AngeloGioacchino Del Regno, linux-arm-msm,
linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
On 14/10/2021 11:32, Yassine Oudjana wrote:
> In preparation for adding a separate device tree for MSM8996 Pro, skip reading
> msm-id from smem and just read the speedbin efuse.
It would be nice to comment, why is it possible/necessary. For example:
MSM8996 Pro has completely different set of frequencies, so it makes no
sense to have a single table covering Pro and original SoCs.
msm8996pro.dtsi would override frequency table from msm8996.dtsi.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
> drivers/cpufreq/Kconfig.arm | 1 -
> drivers/cpufreq/qcom-cpufreq-nvmem.c | 75 +++-------------------------
> 2 files changed, 6 insertions(+), 70 deletions(-)
>
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index 954749afb5fe..7d9798bc5753 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -154,7 +154,6 @@ config ARM_QCOM_CPUFREQ_NVMEM
> tristate "Qualcomm nvmem based CPUFreq"
> depends on ARCH_QCOM
> depends on QCOM_QFPROM
> - depends on QCOM_SMEM
> select PM_OPP
> help
> This adds the CPUFreq driver for Qualcomm Kryo SoC based boards.
> diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
> index d1744b5d9619..909f7d97b334 100644
> --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
> +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
> @@ -9,8 +9,8 @@
> * based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
> * defines the voltage and frequency value based on the msm-id in SMEM
> * and speedbin blown in the efuse combination.
> - * The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
> - * to provide the OPP framework with required information.
> + * The qcom-cpufreq-nvmem driver reads efuse value from the SoC to provide the
> + * OPP framework with required information.
> * This is used to determine the voltage and frequency value for each OPP of
> * operating-points-v2 table when it is parsed by the OPP framework.
> */
> @@ -27,22 +27,6 @@
> #include <linux/pm_domain.h>
> #include <linux/pm_opp.h>
> #include <linux/slab.h>
> -#include <linux/soc/qcom/smem.h>
> -
> -#define MSM_ID_SMEM 137
> -
> -enum _msm_id {
> - MSM8996V3 = 0xF6ul,
> - APQ8096V3 = 0x123ul,
> - MSM8996SG = 0x131ul,
> - APQ8096SG = 0x138ul,
> -};
> -
> -enum _msm8996_version {
> - MSM8996_V3,
> - MSM8996_SG,
> - NUM_OF_MSM8996_VERSIONS,
> -};
>
> struct qcom_cpufreq_drv;
>
> @@ -142,35 +126,6 @@ static void get_krait_bin_format_b(struct device *cpu_dev,
> dev_dbg(cpu_dev, "PVS version: %d\n", *pvs_ver);
> }
>
> -static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
> -{
> - size_t len;
> - u32 *msm_id;
> - enum _msm8996_version version;
> -
> - msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
> - if (IS_ERR(msm_id))
> - return NUM_OF_MSM8996_VERSIONS;
> -
> - /* The first 4 bytes are format, next to them is the actual msm-id */
> - msm_id++;
> -
> - switch ((enum _msm_id)*msm_id) {
> - case MSM8996V3:
> - case APQ8096V3:
> - version = MSM8996_V3;
> - break;
> - case MSM8996SG:
> - case APQ8096SG:
> - version = MSM8996_SG;
> - break;
> - default:
> - version = NUM_OF_MSM8996_VERSIONS;
> - }
> -
> - return version;
> -}
> -
> static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
> struct nvmem_cell *speedbin_nvmem,
> char **pvs_name,
> @@ -178,30 +133,13 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
> {
> size_t len;
> u8 *speedbin;
> - enum _msm8996_version msm8996_version;
> *pvs_name = NULL;
>
> - msm8996_version = qcom_cpufreq_get_msm_id();
> - if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
> - dev_err(cpu_dev, "Not Snapdragon 820/821!");
> - return -ENODEV;
> - }
> -
> speedbin = nvmem_cell_read(speedbin_nvmem, &len);
> if (IS_ERR(speedbin))
> return PTR_ERR(speedbin);
>
> - switch (msm8996_version) {
> - case MSM8996_V3:
> - drv->versions = 1 << (unsigned int)(*speedbin);
> - break;
> - case MSM8996_SG:
> - drv->versions = 1 << ((unsigned int)(*speedbin) + 4);
> - break;
> - default:
> - BUG();
> - break;
> - }
> + drv->versions = 1 << (unsigned int)(*speedbin);
>
> kfree(speedbin);
> return 0;
> @@ -464,10 +402,9 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
> MODULE_DEVICE_TABLE(of, qcom_cpufreq_match_list);
>
> /*
> - * Since the driver depends on smem and nvmem drivers, which may
> - * return EPROBE_DEFER, all the real activity is done in the probe,
> - * which may be defered as well. The init here is only registering
> - * the driver and the platform device.
> + * Since the driver depends on the nvmem driver, which may return EPROBE_DEFER,
> + * all the real activity is done in the probe, which may be defered as well.
> + * The init here is only registering the driver and the platform device.
> */
> static int __init qcom_cpufreq_init(void)
> {
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/8] dt-bindings: clk: qcom: msm8996-apcc: Add CBF
2021-10-14 8:31 ` [PATCH 1/8] dt-bindings: clk: qcom: msm8996-apcc: Add CBF Yassine Oudjana
@ 2021-10-14 14:31 ` Rob Herring
2021-10-16 15:16 ` Yassine Oudjana
2021-10-26 21:08 ` Rob Herring
1 sibling, 1 reply; 27+ messages in thread
From: Rob Herring @ 2021-10-14 14:31 UTC (permalink / raw)
To: Yassine Oudjana
Cc: devicetree, Rob Herring, linux-arm-msm, Michael Turquette,
AngeloGioacchino Del Regno, Nishanth Menon, phone-devel,
Viresh Kumar, Loic Poulain, linux-kernel, Andy Gross, linux-clk,
Rafael J. Wysocki, Stephen Boyd, ~postmarketos/upstreaming,
Konrad Dybcio, Bjorn Andersson, Ilia Lin, linux-pm
On Thu, 14 Oct 2021 08:31:32 +0000, Yassine Oudjana wrote:
> Add CBF clock and reg.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
> .../devicetree/bindings/clock/qcom,msm8996-apcc.yaml | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/1540828
clock-controller@6400000: clock-names:0: 'pwrcl_pll' was expected
arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
clock-controller@6400000: clock-names: ['xo'] is too short
arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
clock-controller@6400000: clocks: [[29]] is too short
arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
clock-controller@6400000: clocks: [[33]] is too short
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
clock-controller@6400000: clocks: [[36]] is too short
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
clock-controller@6400000: clocks: [[41]] is too short
arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
clock-controller@6400000: reg: [[104857600, 589824]] is too short
arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 2/8] dt-bindings: clk: qcom: msm8996-apcc: Add MSM8996 Pro compatible
2021-10-14 8:32 ` [PATCH 2/8] dt-bindings: clk: qcom: msm8996-apcc: Add MSM8996 Pro compatible Yassine Oudjana
@ 2021-10-14 14:31 ` Rob Herring
2021-10-16 15:22 ` Yassine Oudjana
2021-10-26 21:08 ` Rob Herring
1 sibling, 1 reply; 27+ messages in thread
From: Rob Herring @ 2021-10-14 14:31 UTC (permalink / raw)
To: Yassine Oudjana
Cc: Loic Poulain, Ilia Lin, Stephen Boyd, Andy Gross, phone-devel,
devicetree, linux-pm, Viresh Kumar, linux-clk, linux-kernel,
AngeloGioacchino Del Regno, ~postmarketos/upstreaming,
linux-arm-msm, Konrad Dybcio, Nishanth Menon, Rafael J. Wysocki,
Rob Herring, Michael Turquette, Bjorn Andersson
On Thu, 14 Oct 2021 08:32:04 +0000, Yassine Oudjana wrote:
> Add a compatible string for msm8996pro-apcc.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
> Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/1540829
clock-controller@6400000: clock-names:0: 'pwrcl_pll' was expected
arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
clock-controller@6400000: clock-names: ['xo'] is too short
arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
clock-controller@6400000: clocks: [[29]] is too short
arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
clock-controller@6400000: clocks: [[33]] is too short
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
clock-controller@6400000: clocks: [[36]] is too short
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
clock-controller@6400000: clocks: [[41]] is too short
arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
clock-controller@6400000: reg: [[104857600, 589824]] is too short
arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 5/8] dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema
2021-10-14 8:32 ` [PATCH 5/8] dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema Yassine Oudjana
@ 2021-10-14 14:31 ` Rob Herring
2021-10-14 15:45 ` Rob Herring
1 sibling, 0 replies; 27+ messages in thread
From: Rob Herring @ 2021-10-14 14:31 UTC (permalink / raw)
To: Yassine Oudjana
Cc: linux-clk, Nishanth Menon, Loic Poulain, phone-devel,
Michael Turquette, Rob Herring, linux-kernel,
AngeloGioacchino Del Regno, Rafael J. Wysocki, Ilia Lin,
Andy Gross, Stephen Boyd, linux-pm, devicetree, Viresh Kumar,
Bjorn Andersson, Konrad Dybcio, linux-arm-msm,
~postmarketos/upstreaming
On Thu, 14 Oct 2021 08:32:35 +0000, Yassine Oudjana wrote:
> Convert qcom-nvmem-cpufreq to DT schema format.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
> .../bindings/opp/qcom-cpufreq-nvmem.yaml | 877 ++++++++++++++++++
> .../bindings/opp/qcom-nvmem-cpufreq.txt | 796 ----------------
> MAINTAINERS | 2 +-
> 3 files changed, 878 insertions(+), 797 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
> delete mode 100644 Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.example.dt.yaml:0:0: /soc/power-controller@b018000: failed to match any schema with compatible: ['qcom,qcs404-cpr', 'qcom,cpr']
Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.example.dt.yaml:0:0: /soc/power-controller@b018000: failed to match any schema with compatible: ['qcom,qcs404-cpr', 'qcom,cpr']
Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.example.dt.yaml:0:0: /cpr-opp-table: failed to match any schema with compatible: ['operating-points-v2-qcom-level']
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1540830
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 5/8] dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema
2021-10-14 8:32 ` [PATCH 5/8] dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema Yassine Oudjana
2021-10-14 14:31 ` Rob Herring
@ 2021-10-14 15:45 ` Rob Herring
2021-11-04 11:32 ` Yassine Oudjana
1 sibling, 1 reply; 27+ messages in thread
From: Rob Herring @ 2021-10-14 15:45 UTC (permalink / raw)
To: Yassine Oudjana
Cc: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Ilia Lin, Viresh Kumar, Nishanth Menon, Rafael J. Wysocki,
Loic Poulain, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
On Thu, Oct 14, 2021 at 08:32:35AM +0000, Yassine Oudjana wrote:
> Convert qcom-nvmem-cpufreq to DT schema format.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
> .../bindings/opp/qcom-cpufreq-nvmem.yaml | 877 ++++++++++++++++++
> .../bindings/opp/qcom-nvmem-cpufreq.txt | 796 ----------------
> MAINTAINERS | 2 +-
> 3 files changed, 878 insertions(+), 797 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
> delete mode 100644 Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
>
> diff --git a/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
> new file mode 100644
> index 000000000000..4a7d4826746e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
> @@ -0,0 +1,877 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/opp/qcom-cpufreq-nvmem.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings
> +
> +maintainers:
> + - Ilia Lin <ilia.lin@kernel.org>
> +
> +description: |
> + In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996,
> + the CPU frequencies subset and voltage value of each OPP varies based on
> + the silicon variant in use.
> + Qualcomm Technologies, Inc. Process Voltage Scaling Tables
> + defines the voltage and frequency value based on the msm-id in SMEM
> + and speedbin blown in the efuse combination.
> + The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
> + to provide the OPP framework with required information (existing HW bitmap).
> + This is used to determine the voltage and frequency value for each OPP of
> + operating-points-v2 table when it is parsed by the OPP framework.
> +
> +patternProperties:
> + compatible:
Not a pattern... Putting this under 'properties' probably didn't work
for you either if these are the top-level compatibles. What you want to
use here is 'select'.
> + enum:
> + - qcom,apq8096
> + - qcom,msm8996
> + - qcom,qcs404
> + - qcom,ipq8064
> + - qcom,apq8064
> + - qcom,msm8974
> + - qcom,msm8960
> +
> + '^opp-table(-[a-z0-9]+)?$':
> + type: object
> +
> + patternProperties:
> + compatible:
> + const: operating-points-v2-kryo-cpu
> +
> + nvmem-cells:
> + description: |
> + A phandle pointing to a nvmem-cells node representing the
> + efuse registers that has information about the
> + speedbin that is used to select the right frequency/voltage
> + value pair.
> +
> + opp-shared: true
> +
> + '^opp-?[0-9]+$':
> + type: object
> +
> + properties:
> + opp-hz: true
> + opp-microvolt: true
> + clock-latency-ns: true
> +
> + opp-supported-hw:
> + description: |
> + A single 32 bit bitmap value, representing compatible HW.
> + Bitmap:
> + 0: MSM8996 V3, speedbin 0
> + 1: MSM8996 V3, speedbin 1
> + 2: MSM8996 V3, speedbin 2
> + 3: unused
> + 4: MSM8996 SG, speedbin 0
> + 5: MSM8996 SG, speedbin 1
> + 6: MSM8996 SG, speedbin 2
> + 7-31: unused
maximum: 0x77
> +
> + required:
> + - opp-hz
> + - opp-supported-hw
> +
> +allOf:
> + - $ref: opp-v2-base.yaml#
This is at the wrong level. It needs to be within
'^opp-table(-[a-z0-9]+)?$' node schema.
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: qcom,qcs404
> + then:
> + patternProperties:
> + cpus:
> + type: object
> +
> + patternProperties:
> + 'cpu@[0-9a-f]+':
> + type: object
> +
> + properties:
> + power-domains:
> + items:
> + - description: A phandle pointing to the PM domain specifier
> + which provides the performance states available for active
> + state management.
No need to describe common properties unless you have something specific
to say for this binding in particular.
maxItems: 1
> + power-domain-names:
> + items:
> + - const: cpr
> +
> + '^opp-?[0-9]+$':
> + properties:
> + required-opps: true
> +
> + required:
> + - opp-hz
> + - opp-supported-hw
> + - required-opps
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + / {
> + model = "Qualcomm Technologies, Inc. MSM8996";
> + compatible = "qcom,msm8996";
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + CPU0: cpu@0 {
> + device_type = "cpu";
> + compatible = "qcom,kryo";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + cpu-idle-states = <&CPU_SLEEP_0>;
> + capacity-dmips-mhz = <1024>;
> + clocks = <&kryocc 0>;
> + operating-points-v2 = <&cluster0_opp>;
> + #cooling-cells = <2>;
> + next-level-cache = <&L2_0>;
> + L2_0: l2-cache {
> + compatible = "cache";
> + cache-level = <2>;
> + };
> + };
> +
> + CPU1: cpu@1 {
> + device_type = "cpu";
> + compatible = "qcom,kryo";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + cpu-idle-states = <&CPU_SLEEP_0>;
> + capacity-dmips-mhz = <1024>;
> + clocks = <&kryocc 0>;
> + operating-points-v2 = <&cluster0_opp>;
> + #cooling-cells = <2>;
> + next-level-cache = <&L2_0>;
> + };
> +
> + CPU2: cpu@100 {
> + device_type = "cpu";
> + compatible = "qcom,kryo";
> + reg = <0x0 0x100>;
> + enable-method = "psci";
> + cpu-idle-states = <&CPU_SLEEP_0>;
> + capacity-dmips-mhz = <1024>;
> + clocks = <&kryocc 1>;
> + operating-points-v2 = <&cluster1_opp>;
> + #cooling-cells = <2>;
> + next-level-cache = <&L2_1>;
> + L2_1: l2-cache {
> + compatible = "cache";
> + cache-level = <2>;
> + };
> + };
> +
> + CPU3: cpu@101 {
> + device_type = "cpu";
> + compatible = "qcom,kryo";
> + reg = <0x0 0x101>;
> + enable-method = "psci";
> + cpu-idle-states = <&CPU_SLEEP_0>;
> + capacity-dmips-mhz = <1024>;
> + clocks = <&kryocc 1>;
> + operating-points-v2 = <&cluster1_opp>;
> + #cooling-cells = <2>;
> + next-level-cache = <&L2_1>;
> + };
> +
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <&CPU0>;
> + };
> +
> + core1 {
> + cpu = <&CPU1>;
> + };
> + };
> +
> + cluster1 {
> + core0 {
> + cpu = <&CPU2>;
> + };
> +
> + core1 {
> + cpu = <&CPU3>;
> + };
> + };
> + };
> + };
> +
> + cluster0_opp: opp_table0 {
> + compatible = "operating-points-v2-kryo-cpu";
> + nvmem-cells = <&speedbin_efuse>;
> + opp-shared;
> +
> + opp-307200000 {
> + opp-hz = /bits/ 64 <307200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x77>;
> + clock-latency-ns = <200000>;
> + };
> + opp-384000000 {
> + opp-hz = /bits/ 64 <384000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-422400000 {
> + opp-hz = /bits/ 64 <422400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-460800000 {
> + opp-hz = /bits/ 64 <460800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-480000000 {
> + opp-hz = /bits/ 64 <480000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-537600000 {
> + opp-hz = /bits/ 64 <537600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-556800000 {
> + opp-hz = /bits/ 64 <556800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-614400000 {
> + opp-hz = /bits/ 64 <614400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-652800000 {
> + opp-hz = /bits/ 64 <652800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-691200000 {
> + opp-hz = /bits/ 64 <691200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-729600000 {
> + opp-hz = /bits/ 64 <729600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-768000000 {
> + opp-hz = /bits/ 64 <768000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-844800000 {
> + opp-hz = /bits/ 64 <844800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x77>;
> + clock-latency-ns = <200000>;
> + };
> + opp-902400000 {
> + opp-hz = /bits/ 64 <902400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-960000000 {
> + opp-hz = /bits/ 64 <960000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-979200000 {
> + opp-hz = /bits/ 64 <979200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1036800000 {
> + opp-hz = /bits/ 64 <1036800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1056000000 {
> + opp-hz = /bits/ 64 <1056000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1113600000 {
> + opp-hz = /bits/ 64 <1113600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1132800000 {
> + opp-hz = /bits/ 64 <1132800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1190400000 {
> + opp-hz = /bits/ 64 <1190400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1209600000 {
> + opp-hz = /bits/ 64 <1209600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1228800000 {
> + opp-hz = /bits/ 64 <1228800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1286400000 {
> + opp-hz = /bits/ 64 <1286400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1324800000 {
> + opp-hz = /bits/ 64 <1324800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x5>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1363200000 {
> + opp-hz = /bits/ 64 <1363200000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x72>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1401600000 {
> + opp-hz = /bits/ 64 <1401600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x5>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1440000000 {
> + opp-hz = /bits/ 64 <1440000000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1478400000 {
> + opp-hz = /bits/ 64 <1478400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x1>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1497600000 {
> + opp-hz = /bits/ 64 <1497600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x4>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1516800000 {
> + opp-hz = /bits/ 64 <1516800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1593600000 {
> + opp-hz = /bits/ 64 <1593600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x71>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1996800000 {
> + opp-hz = /bits/ 64 <1996800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x20>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2188800000 {
> + opp-hz = /bits/ 64 <2188800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x10>;
> + clock-latency-ns = <200000>;
> + };
Maybe drop some opp nodes for brievity.
> + };
> +
> + cluster1_opp: opp_table1 {
> + compatible = "operating-points-v2-kryo-cpu";
> + nvmem-cells = <&speedbin_efuse>;
> + opp-shared;
> +
> + opp-307200000 {
> + opp-hz = /bits/ 64 <307200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x77>;
> + clock-latency-ns = <200000>;
> + };
> + opp-384000000 {
> + opp-hz = /bits/ 64 <384000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-403200000 {
> + opp-hz = /bits/ 64 <403200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-460800000 {
> + opp-hz = /bits/ 64 <460800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-480000000 {
> + opp-hz = /bits/ 64 <480000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-537600000 {
> + opp-hz = /bits/ 64 <537600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-556800000 {
> + opp-hz = /bits/ 64 <556800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-614400000 {
> + opp-hz = /bits/ 64 <614400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-652800000 {
> + opp-hz = /bits/ 64 <652800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-691200000 {
> + opp-hz = /bits/ 64 <691200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-729600000 {
> + opp-hz = /bits/ 64 <729600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-748800000 {
> + opp-hz = /bits/ 64 <748800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-806400000 {
> + opp-hz = /bits/ 64 <806400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-825600000 {
> + opp-hz = /bits/ 64 <825600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-883200000 {
> + opp-hz = /bits/ 64 <883200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-902400000 {
> + opp-hz = /bits/ 64 <902400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-940800000 {
> + opp-hz = /bits/ 64 <940800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-979200000 {
> + opp-hz = /bits/ 64 <979200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1036800000 {
> + opp-hz = /bits/ 64 <1036800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1056000000 {
> + opp-hz = /bits/ 64 <1056000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1113600000 {
> + opp-hz = /bits/ 64 <1113600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1132800000 {
> + opp-hz = /bits/ 64 <1132800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1190400000 {
> + opp-hz = /bits/ 64 <1190400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1209600000 {
> + opp-hz = /bits/ 64 <1209600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1248000000 {
> + opp-hz = /bits/ 64 <1248000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1286400000 {
> + opp-hz = /bits/ 64 <1286400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1324800000 {
> + opp-hz = /bits/ 64 <1324800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1363200000 {
> + opp-hz = /bits/ 64 <1363200000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1401600000 {
> + opp-hz = /bits/ 64 <1401600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1440000000 {
> + opp-hz = /bits/ 64 <1440000000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1478400000 {
> + opp-hz = /bits/ 64 <1478400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1516800000 {
> + opp-hz = /bits/ 64 <1516800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1555200000 {
> + opp-hz = /bits/ 64 <1555200000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1593600000 {
> + opp-hz = /bits/ 64 <1593600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1632000000 {
> + opp-hz = /bits/ 64 <1632000000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1670400000 {
> + opp-hz = /bits/ 64 <1670400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1708800000 {
> + opp-hz = /bits/ 64 <1708800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1747200000 {
> + opp-hz = /bits/ 64 <1747200000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1785600000 {
> + opp-hz = /bits/ 64 <1785600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1804800000 {
> + opp-hz = /bits/ 64 <1804800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x6>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1824000000 {
> + opp-hz = /bits/ 64 <1824000000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x71>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1900800000 {
> + opp-hz = /bits/ 64 <1900800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x74>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1920000000 {
> + opp-hz = /bits/ 64 <1920000000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x1>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1977600000 {
> + opp-hz = /bits/ 64 <1977600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x30>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1996800000 {
> + opp-hz = /bits/ 64 <1996800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x1>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2054400000 {
> + opp-hz = /bits/ 64 <2054400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x30>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2073600000 {
> + opp-hz = /bits/ 64 <2073600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x1>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2150400000 {
> + opp-hz = /bits/ 64 <2150400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x31>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2246400000 {
> + opp-hz = /bits/ 64 <2246400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x10>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2342400000 {
> + opp-hz = /bits/ 64 <2342400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x10>;
> + clock-latency-ns = <200000>;
> + };
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + smem_mem: smem-mem@86000000 {
> + reg = <0x0 0x86000000 0x0 0x200000>;
> + no-map;
> + };
> + };
> +
> + smem {
> + compatible = "qcom,smem";
> + memory-region = <&smem_mem>;
> + hwlocks = <&tcsr_mutex 3>;
> + };
> +
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + qfprom: qfprom@74000 {
> + compatible = "qcom,msm8996-qfprom", "qcom,qfprom";
> + reg = <0x00074000 0x8ff>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + speedbin_efuse: speedbin@133 {
> + reg = <0x133 0x1>;
> + bits = <5 3>;
> + };
> + };
> + };
> + };
> +
> + - |
> + / {
I think this is going to do weird things. The examples aren't really
independent. The result is going to be the 2 examples are merged to 1
root node.
Maybe qcs404 should be a different schema anyways. Doesn't look like a
lot of overlap (any more so than any other OPP).
> + model = "Qualcomm Technologies, Inc. QCS404";
> + compatible = "qcom,qcs404";
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x100>;
> + enable-method = "psci";
> + cpu-idle-states = <&CPU_SLEEP_0>;
> + next-level-cache = <&L2_0>;
> + #cooling-cells = <2>;
> + clocks = <&apcs_glb>;
> + operating-points-v2 = <&cpu_opp_table>;
> + power-domains = <&cpr>;
> + power-domain-names = "cpr";
> + };
> +
> + cpu@101 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x101>;
> + enable-method = "psci";
> + cpu-idle-states = <&CPU_SLEEP_0>;
> + next-level-cache = <&L2_0>;
> + #cooling-cells = <2>;
> + clocks = <&apcs_glb>;
> + operating-points-v2 = <&cpu_opp_table>;
> + power-domains = <&cpr>;
> + power-domain-names = "cpr";
> + };
> +
> + cpu@102 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x102>;
> + enable-method = "psci";
> + cpu-idle-states = <&CPU_SLEEP_0>;
> + next-level-cache = <&L2_0>;
> + #cooling-cells = <2>;
> + clocks = <&apcs_glb>;
> + operating-points-v2 = <&cpu_opp_table>;
> + power-domains = <&cpr>;
> + power-domain-names = "cpr";
> + };
> +
> + cpu@103 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x103>;
> + enable-method = "psci";
> + cpu-idle-states = <&CPU_SLEEP_0>;
> + next-level-cache = <&L2_0>;
> + #cooling-cells = <2>;
> + clocks = <&apcs_glb>;
> + operating-points-v2 = <&cpu_opp_table>;
> + power-domains = <&cpr>;
> + power-domain-names = "cpr";
> + };
> + };
> +
> + cpu_opp_table: cpu-opp-table {
> + compatible = "operating-points-v2-kryo-cpu";
> + opp-shared;
> +
> + opp-1094400000 {
> + opp-hz = /bits/ 64 <1094400000>;
> + required-opps = <&cpr_opp1>;
> + };
> + opp-1248000000 {
> + opp-hz = /bits/ 64 <1248000000>;
> + required-opps = <&cpr_opp2>;
> + };
> + opp-1401600000 {
> + opp-hz = /bits/ 64 <1401600000>;
> + required-opps = <&cpr_opp3>;
> + };
> + };
> +
> + cpr_opp_table: cpr-opp-table {
> + compatible = "operating-points-v2-qcom-level";
> +
> + cpr_opp1: opp1 {
> + opp-level = <1>;
> + qcom,opp-fuse-level = <1>;
> + };
> + cpr_opp2: opp2 {
> + opp-level = <2>;
> + qcom,opp-fuse-level = <2>;
> + };
> + cpr_opp3: opp3 {
> + opp-level = <3>;
> + qcom,opp-fuse-level = <3>;
> + };
> + };
> +
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpr: power-controller@b018000 {
> + compatible = "qcom,qcs404-cpr", "qcom,cpr";
> + reg = <0x0b018000 0x1000>;
> +
> + vdd-apc-supply = <&pms405_s3>;
> + #power-domain-cells = <0>;
> + operating-points-v2 = <&cpr_opp_table>;
> + };
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
> deleted file mode 100644
> index 64f07417ecfb..000000000000
> --- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
> +++ /dev/null
> @@ -1,796 +0,0 @@
> -Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings
> -===================================
> -
> -In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996,
> -the CPU frequencies subset and voltage value of each OPP varies based on
> -the silicon variant in use.
> -Qualcomm Technologies, Inc. Process Voltage Scaling Tables
> -defines the voltage and frequency value based on the msm-id in SMEM
> -and speedbin blown in the efuse combination.
> -The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
> -to provide the OPP framework with required information (existing HW bitmap).
> -This is used to determine the voltage and frequency value for each OPP of
> -operating-points-v2 table when it is parsed by the OPP framework.
> -
> -Required properties:
> ---------------------
> -In 'cpu' nodes:
> -- operating-points-v2: Phandle to the operating-points-v2 table to use.
> -
> -In 'operating-points-v2' table:
> -- compatible: Should be
> - - 'operating-points-v2-kryo-cpu' for apq8096, msm8996, msm8974,
> - apq8064, ipq8064, msm8960 and ipq8074.
> -
> -Optional properties:
> ---------------------
> -In 'cpu' nodes:
> -- power-domains: A phandle pointing to the PM domain specifier which provides
> - the performance states available for active state management.
> - Please refer to the power-domains bindings
> - Documentation/devicetree/bindings/power/power_domain.txt
> - and also examples below.
> -- power-domain-names: Should be
> - - 'cpr' for qcs404.
> -
> -In 'operating-points-v2' table:
> -- nvmem-cells: A phandle pointing to a nvmem-cells node representing the
> - efuse registers that has information about the
> - speedbin that is used to select the right frequency/voltage
> - value pair.
> - Please refer the for nvmem-cells
> - bindings Documentation/devicetree/bindings/nvmem/nvmem.txt
> - and also examples below.
> -
> -In every OPP node:
> -- opp-supported-hw: A single 32 bit bitmap value, representing compatible HW.
> - Bitmap:
> - 0: MSM8996 V3, speedbin 0
> - 1: MSM8996 V3, speedbin 1
> - 2: MSM8996 V3, speedbin 2
> - 3: unused
> - 4: MSM8996 SG, speedbin 0
> - 5: MSM8996 SG, speedbin 1
> - 6: MSM8996 SG, speedbin 2
> - 7-31: unused
> -
> -Example 1:
> ----------
> -
> - cpus {
> - #address-cells = <2>;
> - #size-cells = <0>;
> -
> - CPU0: cpu@0 {
> - device_type = "cpu";
> - compatible = "qcom,kryo";
> - reg = <0x0 0x0>;
> - enable-method = "psci";
> - clocks = <&kryocc 0>;
> - cpu-supply = <&pm8994_s11_saw>;
> - operating-points-v2 = <&cluster0_opp>;
> - #cooling-cells = <2>;
> - next-level-cache = <&L2_0>;
> - L2_0: l2-cache {
> - compatible = "cache";
> - cache-level = <2>;
> - };
> - };
> -
> - CPU1: cpu@1 {
> - device_type = "cpu";
> - compatible = "qcom,kryo";
> - reg = <0x0 0x1>;
> - enable-method = "psci";
> - clocks = <&kryocc 0>;
> - cpu-supply = <&pm8994_s11_saw>;
> - operating-points-v2 = <&cluster0_opp>;
> - #cooling-cells = <2>;
> - next-level-cache = <&L2_0>;
> - };
> -
> - CPU2: cpu@100 {
> - device_type = "cpu";
> - compatible = "qcom,kryo";
> - reg = <0x0 0x100>;
> - enable-method = "psci";
> - clocks = <&kryocc 1>;
> - cpu-supply = <&pm8994_s11_saw>;
> - operating-points-v2 = <&cluster1_opp>;
> - #cooling-cells = <2>;
> - next-level-cache = <&L2_1>;
> - L2_1: l2-cache {
> - compatible = "cache";
> - cache-level = <2>;
> - };
> - };
> -
> - CPU3: cpu@101 {
> - device_type = "cpu";
> - compatible = "qcom,kryo";
> - reg = <0x0 0x101>;
> - enable-method = "psci";
> - clocks = <&kryocc 1>;
> - cpu-supply = <&pm8994_s11_saw>;
> - operating-points-v2 = <&cluster1_opp>;
> - #cooling-cells = <2>;
> - next-level-cache = <&L2_1>;
> - };
> -
> - cpu-map {
> - cluster0 {
> - core0 {
> - cpu = <&CPU0>;
> - };
> -
> - core1 {
> - cpu = <&CPU1>;
> - };
> - };
> -
> - cluster1 {
> - core0 {
> - cpu = <&CPU2>;
> - };
> -
> - core1 {
> - cpu = <&CPU3>;
> - };
> - };
> - };
> - };
> -
> - cluster0_opp: opp_table0 {
> - compatible = "operating-points-v2-kryo-cpu";
> - nvmem-cells = <&speedbin_efuse>;
> - opp-shared;
> -
> - opp-307200000 {
> - opp-hz = /bits/ 64 <307200000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x77>;
> - clock-latency-ns = <200000>;
> - };
> - opp-384000000 {
> - opp-hz = /bits/ 64 <384000000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-422400000 {
> - opp-hz = /bits/ 64 <422400000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-460800000 {
> - opp-hz = /bits/ 64 <460800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-480000000 {
> - opp-hz = /bits/ 64 <480000000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-537600000 {
> - opp-hz = /bits/ 64 <537600000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-556800000 {
> - opp-hz = /bits/ 64 <556800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-614400000 {
> - opp-hz = /bits/ 64 <614400000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-652800000 {
> - opp-hz = /bits/ 64 <652800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-691200000 {
> - opp-hz = /bits/ 64 <691200000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-729600000 {
> - opp-hz = /bits/ 64 <729600000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-768000000 {
> - opp-hz = /bits/ 64 <768000000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-844800000 {
> - opp-hz = /bits/ 64 <844800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x77>;
> - clock-latency-ns = <200000>;
> - };
> - opp-902400000 {
> - opp-hz = /bits/ 64 <902400000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-960000000 {
> - opp-hz = /bits/ 64 <960000000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-979200000 {
> - opp-hz = /bits/ 64 <979200000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1036800000 {
> - opp-hz = /bits/ 64 <1036800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1056000000 {
> - opp-hz = /bits/ 64 <1056000000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1113600000 {
> - opp-hz = /bits/ 64 <1113600000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1132800000 {
> - opp-hz = /bits/ 64 <1132800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1190400000 {
> - opp-hz = /bits/ 64 <1190400000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1209600000 {
> - opp-hz = /bits/ 64 <1209600000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1228800000 {
> - opp-hz = /bits/ 64 <1228800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1286400000 {
> - opp-hz = /bits/ 64 <1286400000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1324800000 {
> - opp-hz = /bits/ 64 <1324800000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x5>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1363200000 {
> - opp-hz = /bits/ 64 <1363200000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x72>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1401600000 {
> - opp-hz = /bits/ 64 <1401600000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x5>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1440000000 {
> - opp-hz = /bits/ 64 <1440000000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1478400000 {
> - opp-hz = /bits/ 64 <1478400000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x1>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1497600000 {
> - opp-hz = /bits/ 64 <1497600000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x4>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1516800000 {
> - opp-hz = /bits/ 64 <1516800000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1593600000 {
> - opp-hz = /bits/ 64 <1593600000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x71>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1996800000 {
> - opp-hz = /bits/ 64 <1996800000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x20>;
> - clock-latency-ns = <200000>;
> - };
> - opp-2188800000 {
> - opp-hz = /bits/ 64 <2188800000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x10>;
> - clock-latency-ns = <200000>;
> - };
> - };
> -
> - cluster1_opp: opp_table1 {
> - compatible = "operating-points-v2-kryo-cpu";
> - nvmem-cells = <&speedbin_efuse>;
> - opp-shared;
> -
> - opp-307200000 {
> - opp-hz = /bits/ 64 <307200000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x77>;
> - clock-latency-ns = <200000>;
> - };
> - opp-384000000 {
> - opp-hz = /bits/ 64 <384000000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-403200000 {
> - opp-hz = /bits/ 64 <403200000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-460800000 {
> - opp-hz = /bits/ 64 <460800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-480000000 {
> - opp-hz = /bits/ 64 <480000000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-537600000 {
> - opp-hz = /bits/ 64 <537600000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-556800000 {
> - opp-hz = /bits/ 64 <556800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-614400000 {
> - opp-hz = /bits/ 64 <614400000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-652800000 {
> - opp-hz = /bits/ 64 <652800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-691200000 {
> - opp-hz = /bits/ 64 <691200000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-729600000 {
> - opp-hz = /bits/ 64 <729600000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-748800000 {
> - opp-hz = /bits/ 64 <748800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-806400000 {
> - opp-hz = /bits/ 64 <806400000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-825600000 {
> - opp-hz = /bits/ 64 <825600000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-883200000 {
> - opp-hz = /bits/ 64 <883200000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-902400000 {
> - opp-hz = /bits/ 64 <902400000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-940800000 {
> - opp-hz = /bits/ 64 <940800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-979200000 {
> - opp-hz = /bits/ 64 <979200000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1036800000 {
> - opp-hz = /bits/ 64 <1036800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1056000000 {
> - opp-hz = /bits/ 64 <1056000000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1113600000 {
> - opp-hz = /bits/ 64 <1113600000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1132800000 {
> - opp-hz = /bits/ 64 <1132800000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1190400000 {
> - opp-hz = /bits/ 64 <1190400000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1209600000 {
> - opp-hz = /bits/ 64 <1209600000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1248000000 {
> - opp-hz = /bits/ 64 <1248000000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1286400000 {
> - opp-hz = /bits/ 64 <1286400000>;
> - opp-microvolt = <905000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1324800000 {
> - opp-hz = /bits/ 64 <1324800000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1363200000 {
> - opp-hz = /bits/ 64 <1363200000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1401600000 {
> - opp-hz = /bits/ 64 <1401600000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1440000000 {
> - opp-hz = /bits/ 64 <1440000000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1478400000 {
> - opp-hz = /bits/ 64 <1478400000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1516800000 {
> - opp-hz = /bits/ 64 <1516800000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1555200000 {
> - opp-hz = /bits/ 64 <1555200000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1593600000 {
> - opp-hz = /bits/ 64 <1593600000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1632000000 {
> - opp-hz = /bits/ 64 <1632000000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1670400000 {
> - opp-hz = /bits/ 64 <1670400000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1708800000 {
> - opp-hz = /bits/ 64 <1708800000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1747200000 {
> - opp-hz = /bits/ 64 <1747200000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x70>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1785600000 {
> - opp-hz = /bits/ 64 <1785600000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x7>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1804800000 {
> - opp-hz = /bits/ 64 <1804800000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x6>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1824000000 {
> - opp-hz = /bits/ 64 <1824000000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x71>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1900800000 {
> - opp-hz = /bits/ 64 <1900800000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x74>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1920000000 {
> - opp-hz = /bits/ 64 <1920000000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x1>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1977600000 {
> - opp-hz = /bits/ 64 <1977600000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x30>;
> - clock-latency-ns = <200000>;
> - };
> - opp-1996800000 {
> - opp-hz = /bits/ 64 <1996800000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x1>;
> - clock-latency-ns = <200000>;
> - };
> - opp-2054400000 {
> - opp-hz = /bits/ 64 <2054400000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x30>;
> - clock-latency-ns = <200000>;
> - };
> - opp-2073600000 {
> - opp-hz = /bits/ 64 <2073600000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x1>;
> - clock-latency-ns = <200000>;
> - };
> - opp-2150400000 {
> - opp-hz = /bits/ 64 <2150400000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x31>;
> - clock-latency-ns = <200000>;
> - };
> - opp-2246400000 {
> - opp-hz = /bits/ 64 <2246400000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x10>;
> - clock-latency-ns = <200000>;
> - };
> - opp-2342400000 {
> - opp-hz = /bits/ 64 <2342400000>;
> - opp-microvolt = <1140000 905000 1140000>;
> - opp-supported-hw = <0x10>;
> - clock-latency-ns = <200000>;
> - };
> - };
> -
> -....
> -
> -reserved-memory {
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> -....
> - smem_mem: smem-mem@86000000 {
> - reg = <0x0 0x86000000 0x0 0x200000>;
> - no-map;
> - };
> -....
> -};
> -
> -smem {
> - compatible = "qcom,smem";
> - memory-region = <&smem_mem>;
> - hwlocks = <&tcsr_mutex 3>;
> -};
> -
> -soc {
> -....
> - qfprom: qfprom@74000 {
> - compatible = "qcom,qfprom";
> - reg = <0x00074000 0x8ff>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ....
> - speedbin_efuse: speedbin@133 {
> - reg = <0x133 0x1>;
> - bits = <5 3>;
> - };
> - };
> -};
> -
> -Example 2:
> ----------
> -
> - cpus {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - CPU0: cpu@100 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a53";
> - reg = <0x100>;
> - ....
> - clocks = <&apcs_glb>;
> - operating-points-v2 = <&cpu_opp_table>;
> - power-domains = <&cpr>;
> - power-domain-names = "cpr";
> - };
> -
> - CPU1: cpu@101 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a53";
> - reg = <0x101>;
> - ....
> - clocks = <&apcs_glb>;
> - operating-points-v2 = <&cpu_opp_table>;
> - power-domains = <&cpr>;
> - power-domain-names = "cpr";
> - };
> -
> - CPU2: cpu@102 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a53";
> - reg = <0x102>;
> - ....
> - clocks = <&apcs_glb>;
> - operating-points-v2 = <&cpu_opp_table>;
> - power-domains = <&cpr>;
> - power-domain-names = "cpr";
> - };
> -
> - CPU3: cpu@103 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a53";
> - reg = <0x103>;
> - ....
> - clocks = <&apcs_glb>;
> - operating-points-v2 = <&cpu_opp_table>;
> - power-domains = <&cpr>;
> - power-domain-names = "cpr";
> - };
> - };
> -
> - cpu_opp_table: cpu-opp-table {
> - compatible = "operating-points-v2-kryo-cpu";
> - opp-shared;
> -
> - opp-1094400000 {
> - opp-hz = /bits/ 64 <1094400000>;
> - required-opps = <&cpr_opp1>;
> - };
> - opp-1248000000 {
> - opp-hz = /bits/ 64 <1248000000>;
> - required-opps = <&cpr_opp2>;
> - };
> - opp-1401600000 {
> - opp-hz = /bits/ 64 <1401600000>;
> - required-opps = <&cpr_opp3>;
> - };
> - };
> -
> - cpr_opp_table: cpr-opp-table {
> - compatible = "operating-points-v2-qcom-level";
> -
> - cpr_opp1: opp1 {
> - opp-level = <1>;
> - qcom,opp-fuse-level = <1>;
> - };
> - cpr_opp2: opp2 {
> - opp-level = <2>;
> - qcom,opp-fuse-level = <2>;
> - };
> - cpr_opp3: opp3 {
> - opp-level = <3>;
> - qcom,opp-fuse-level = <3>;
> - };
> - };
> -
> -....
> -
> -soc {
> -....
> - cpr: power-controller@b018000 {
> - compatible = "qcom,qcs404-cpr", "qcom,cpr";
> - reg = <0x0b018000 0x1000>;
> - ....
> - vdd-apc-supply = <&pms405_s3>;
> - #power-domain-cells = <0>;
> - operating-points-v2 = <&cpr_opp_table>;
> - ....
> - };
> -};
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a7715fc859f7..e62cd1f613c5 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -15660,7 +15660,7 @@ QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096
> M: Ilia Lin <ilia.lin@kernel.org>
> L: linux-pm@vger.kernel.org
> S: Maintained
> -F: Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
> +F: Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
> F: drivers/cpufreq/qcom-cpufreq-nvmem.c
>
> QUALCOMM CRYPTO DRIVERS
> --
> 2.33.0
>
>
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 3/8] clk: qcom: msm8996-cpu: Add MSM8996 Pro CBF support
2021-10-14 8:32 ` [PATCH 3/8] clk: qcom: msm8996-cpu: Add MSM8996 Pro CBF support Yassine Oudjana
@ 2021-10-15 18:54 ` Konrad Dybcio
2021-10-24 17:30 ` Bjorn Andersson
1 sibling, 0 replies; 27+ messages in thread
From: Konrad Dybcio @ 2021-10-15 18:54 UTC (permalink / raw)
To: Yassine Oudjana, Andy Gross, Bjorn Andersson, Michael Turquette,
Stephen Boyd, Rob Herring, Ilia Lin, Viresh Kumar,
Nishanth Menon, Rafael J. Wysocki, Loic Poulain
Cc: AngeloGioacchino Del Regno, linux-arm-msm, linux-clk, devicetree,
linux-kernel, linux-pm, ~postmarketos/upstreaming, phone-devel
On 14.10.2021 10:32, Yassine Oudjana wrote:
> MSM8996 Pro (MSM8996SG) has a few differences in the CBF clock.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 4/8] cpufreq: qcom_cpufreq_nvmem: Simplify reading kryo speedbin
2021-10-14 8:32 ` [PATCH 4/8] cpufreq: qcom_cpufreq_nvmem: Simplify reading kryo speedbin Yassine Oudjana
2021-10-14 12:25 ` Dmitry Baryshkov
@ 2021-10-15 18:58 ` Konrad Dybcio
2021-10-28 18:18 ` Bjorn Andersson
1 sibling, 1 reply; 27+ messages in thread
From: Konrad Dybcio @ 2021-10-15 18:58 UTC (permalink / raw)
To: Yassine Oudjana, Andy Gross, Bjorn Andersson, Michael Turquette,
Stephen Boyd, Rob Herring, Ilia Lin, Viresh Kumar,
Nishanth Menon, Rafael J. Wysocki, Loic Poulain
Cc: AngeloGioacchino Del Regno, linux-arm-msm, linux-clk, devicetree,
linux-kernel, linux-pm, ~postmarketos/upstreaming, phone-devel
On 14.10.2021 10:32, Yassine Oudjana wrote:
> In preparation for adding a separate device tree for MSM8996 Pro, skip reading
> msm-id from smem and just read the speedbin efuse.
>
While I'd really like for this to be merged, it's gonna totally wreck backwards
compatibility.. But then, since APCC was not defined properly before commit
0a275a35ceab07 arm64: dts: qcom: msm8996: Make CPUCC actually probe (and work)
there's only 5.14/5.15 (both of which were non-LTS) which would *actually* break given
somebody decided that "ah yes, pulling in DTs from these specific mainline kernel releases
is a good idea"...
If I were to judge, it would probably be fine to rid the old mechanism..
Konrad
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 7/8] arm64: dts: qcom: msm8996: Add MSM8996 Pro support
2021-10-14 8:32 ` [PATCH 7/8] arm64: dts: qcom: msm8996: Add MSM8996 Pro support Yassine Oudjana
@ 2021-10-15 19:01 ` Konrad Dybcio
2021-10-16 14:50 ` Yassine Oudjana
0 siblings, 1 reply; 27+ messages in thread
From: Konrad Dybcio @ 2021-10-15 19:01 UTC (permalink / raw)
To: Yassine Oudjana, Andy Gross, Bjorn Andersson, Michael Turquette,
Stephen Boyd, Rob Herring, Ilia Lin, Viresh Kumar,
Nishanth Menon, Rafael J. Wysocki, Loic Poulain
Cc: AngeloGioacchino Del Regno, linux-arm-msm, linux-clk, devicetree,
linux-kernel, linux-pm, ~postmarketos/upstreaming, phone-devel
On 14.10.2021 10:32, Yassine Oudjana wrote:
> Add a new DTSI for MSM8996 Pro (MSM8996SG) with msm-id and CPU/GPU OPPs.
> CBF OPPs and CPR parameters will be added to it as well once support for
> CBF scaling and CPR is introduced.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 82 +++----
> arch/arm64/boot/dts/qcom/msm8996pro.dtsi | 281 +++++++++++++++++++++++
> 2 files changed, 322 insertions(+), 41 deletions(-)
> create mode 100644 arch/arm64/boot/dts/qcom/msm8996pro.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 94a846c3f1ee..5b2600a4fb2a 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -142,82 +142,82 @@ cluster0_opp: opp_table0 {
> /* Nominal fmax for now */
> opp-307200000 {
> opp-hz = /bits/ 64 <307200000>;
> - opp-supported-hw = <0x77>;
> + opp-supported-hw = <0x7>;
You didn't describe what's the reason for changing this everywhere.
If it's been always broken, perhaps make it a separate commit describing
the issue.
Konrad
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 8/8] arm64: dts: qcom: msm8996-xiaomi-scorpio: Include msm8996pro.dtsi
2021-10-14 11:00 ` [PATCH 8/8] arm64: dts: qcom: msm8996-xiaomi-scorpio: Include msm8996pro.dtsi Yassine Oudjana
@ 2021-10-15 19:03 ` Konrad Dybcio
0 siblings, 0 replies; 27+ messages in thread
From: Konrad Dybcio @ 2021-10-15 19:03 UTC (permalink / raw)
To: Yassine Oudjana, Andy Gross, Bjorn Andersson, Michael Turquette,
Stephen Boyd, Rob Herring, Ilia Lin, Viresh Kumar,
Nishanth Menon, Rafael J. Wysocki, Loic Poulain
Cc: AngeloGioacchino Del Regno, linux-arm-msm, linux-clk, devicetree,
linux-kernel, linux-pm, ~postmarketos/upstreaming, phone-devel
On 14.10.2021 13:00, Yassine Oudjana wrote:
> Move msm8996.dtsi include to the end of the include chain.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
> arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi | 3 ---
> arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts | 1 +
> arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts | 2 +-
> 3 files changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
> index d239b01b8505..831cd39aff14 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
> @@ -3,9 +3,6 @@
> * Copyright (c) 2020, Yassine Oudjana <y.oudjana@protonmail.com>
> */
>
> -/dts-v1/;
> -
> -#include "msm8996.dtsi"
> #include "pm8994.dtsi"
> #include "pmi8994.dtsi"
> #include <dt-bindings/input/input.h>
> diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
> index 77d508e5164a..8ea5390f86ab 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
> +++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
> @@ -5,6 +5,7 @@
>
> /dts-v1/;
>
> +#include "msm8996.dtsi"
> #include "msm8996-xiaomi-common.dtsi"
> #include <dt-bindings/sound/qcom,q6afe.h>
> #include <dt-bindings/sound/qcom,q6asm.h>
> diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts
> index ea2ca271fe7d..4ffe7be34285 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts
> +++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts
If this device uses msm8996pro, perhaps the filename should reflect
that? I don't know whether renaming it would be "legal" though..
Konrad
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 7/8] arm64: dts: qcom: msm8996: Add MSM8996 Pro support
2021-10-15 19:01 ` Konrad Dybcio
@ 2021-10-16 14:50 ` Yassine Oudjana
2021-10-16 15:09 ` Dmitry Baryshkov
0 siblings, 1 reply; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-16 14:50 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Ilia Lin, Viresh Kumar, Nishanth Menon,
Rafael J. Wysocki, Loic Poulain, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
On Fri, Oct 15 2021 at 23:01:54 +0400, Konrad Dybcio
<konrad.dybcio@somainline.org> wrote:
>
> On 14.10.2021 10:32, Yassine Oudjana wrote:
>> Add a new DTSI for MSM8996 Pro (MSM8996SG) with msm-id and CPU/GPU
>> OPPs.
>> CBF OPPs and CPR parameters will be added to it as well once
>> support for
>> CBF scaling and CPR is introduced.
>>
>> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
>> ---
>> arch/arm64/boot/dts/qcom/msm8996.dtsi | 82 +++----
>> arch/arm64/boot/dts/qcom/msm8996pro.dtsi | 281
>> +++++++++++++++++++++++
>> 2 files changed, 322 insertions(+), 41 deletions(-)
>> create mode 100644 arch/arm64/boot/dts/qcom/msm8996pro.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> index 94a846c3f1ee..5b2600a4fb2a 100644
>> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> @@ -142,82 +142,82 @@ cluster0_opp: opp_table0 {
>> /* Nominal fmax for now */
>> opp-307200000 {
>> opp-hz = /bits/ 64 <307200000>;
>> - opp-supported-hw = <0x77>;
>> + opp-supported-hw = <0x7>;
>
> You didn't describe what's the reason for changing this everywhere.
>
> If it's been always broken, perhaps make it a separate commit
> describing
>
> the issue.
>
>
> Konrad
>
Before removing reading msm-id in qcom_cpufreq_nvmem, bits 0-2 (0x07)
were MSM8996 speed bins, while bits 4-6 (0x70) were MSM8996 Pro speed
bins. Now, only bits 0-2 are used for either one, so basically I moved
bits 4-6 into msm8996pro.dtsi after shifting them right to become bits
0-2.
I'll put this in a separate patch and describe the change.
Yassine
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 7/8] arm64: dts: qcom: msm8996: Add MSM8996 Pro support
2021-10-16 14:50 ` Yassine Oudjana
@ 2021-10-16 15:09 ` Dmitry Baryshkov
0 siblings, 0 replies; 27+ messages in thread
From: Dmitry Baryshkov @ 2021-10-16 15:09 UTC (permalink / raw)
To: Yassine Oudjana
Cc: Konrad Dybcio, Andy Gross, Bjorn Andersson, Michael Turquette,
Stephen Boyd, Rob Herring, Ilia Lin, Viresh Kumar,
Nishanth Menon, Rafael J. Wysocki, Loic Poulain,
AngeloGioacchino Del Regno,
open list:DRM DRIVER FOR MSM ADRENO GPU,
open list:COMMON CLK FRAMEWORK,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list, Linux PM, ~postmarketos/upstreaming, phone-devel
On Sat, 16 Oct 2021 at 17:51, Yassine Oudjana <y.oudjana@protonmail.com> wrote:
>
>
> On Fri, Oct 15 2021 at 23:01:54 +0400, Konrad Dybcio
> <konrad.dybcio@somainline.org> wrote:
> >
> > On 14.10.2021 10:32, Yassine Oudjana wrote:
> >> Add a new DTSI for MSM8996 Pro (MSM8996SG) with msm-id and CPU/GPU
> >> OPPs.
> >> CBF OPPs and CPR parameters will be added to it as well once
> >> support for
> >> CBF scaling and CPR is introduced.
> >>
> >> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> >> ---
> >> arch/arm64/boot/dts/qcom/msm8996.dtsi | 82 +++----
> >> arch/arm64/boot/dts/qcom/msm8996pro.dtsi | 281
> >> +++++++++++++++++++++++
> >> 2 files changed, 322 insertions(+), 41 deletions(-)
> >> create mode 100644 arch/arm64/boot/dts/qcom/msm8996pro.dtsi
> >>
> >> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> >> b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> >> index 94a846c3f1ee..5b2600a4fb2a 100644
> >> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> >> @@ -142,82 +142,82 @@ cluster0_opp: opp_table0 {
> >> /* Nominal fmax for now */
> >> opp-307200000 {
> >> opp-hz = /bits/ 64 <307200000>;
> >> - opp-supported-hw = <0x77>;
> >> + opp-supported-hw = <0x7>;
> >
> > You didn't describe what's the reason for changing this everywhere.
> >
> > If it's been always broken, perhaps make it a separate commit
> > describing
> >
> > the issue.
> >
> >
> > Konrad
> >
>
> Before removing reading msm-id in qcom_cpufreq_nvmem, bits 0-2 (0x07)
> were MSM8996 speed bins, while bits 4-6 (0x70) were MSM8996 Pro speed
> bins. Now, only bits 0-2 are used for either one, so basically I moved
> bits 4-6 into msm8996pro.dtsi after shifting them right to become bits
> 0-2.
>
> I'll put this in a separate patch and describe the change.
Could you please describe in the commit message why is it changed?
IOW, what prompted you to split 8996SG support from main msm8996.dtsi?
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/8] dt-bindings: clk: qcom: msm8996-apcc: Add CBF
2021-10-14 14:31 ` Rob Herring
@ 2021-10-16 15:16 ` Yassine Oudjana
0 siblings, 0 replies; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-16 15:16 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, Rob Herring, linux-arm-msm, Michael Turquette,
AngeloGioacchino Del Regno, Nishanth Menon, phone-devel,
Viresh Kumar, Loic Poulain, linux-kernel, Andy Gross, linux-clk,
Rafael J. Wysocki, Stephen Boyd, ~postmarketos/upstreaming,
Konrad Dybcio, Bjorn Andersson, Ilia Lin, linux-pm
On Thu, Oct 14 2021 at 18:31:04 +0400, Rob Herring <robh@kernel.org>
wrote:
> On Thu, 14 Oct 2021 08:31:32 +0000, Yassine Oudjana wrote:
>> Add CBF clock and reg.
>>
>> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
>> ---
>> .../devicetree/bindings/clock/qcom,msm8996-apcc.yaml | 10
>> ++++++----
>> 1 file changed, 6 insertions(+), 4 deletions(-)
>>
>
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
>
> Note that it is not yet a requirement to have 0 warnings for
> dtbs_check.
> This will change in the future.
>
> Full log is available here: https://patchwork.ozlabs.org/patch/1540828
>
>
> clock-controller@6400000: clock-names:0: 'pwrcl_pll' was expected
> arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
> arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
>
> clock-controller@6400000: clock-names: ['xo'] is too short
> arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
> arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
>
> clock-controller@6400000: clocks: [[29]] is too short
> arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
>
> clock-controller@6400000: clocks: [[33]] is too short
> arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
>
> clock-controller@6400000: clocks: [[36]] is too short
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
>
> clock-controller@6400000: clocks: [[41]] is too short
> arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
>
> clock-controller@6400000: reg: [[104857600, 589824]] is too short
> arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
> arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
>
These are old warnings. I wasn't quite sure about those clocks, so I
didn't attempt to fix them.
Yassine
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 2/8] dt-bindings: clk: qcom: msm8996-apcc: Add MSM8996 Pro compatible
2021-10-14 14:31 ` Rob Herring
@ 2021-10-16 15:22 ` Yassine Oudjana
0 siblings, 0 replies; 27+ messages in thread
From: Yassine Oudjana @ 2021-10-16 15:22 UTC (permalink / raw)
To: Rob Herring
Cc: Loic Poulain, Ilia Lin, Stephen Boyd, Andy Gross, phone-devel,
devicetree, linux-pm, Viresh Kumar, linux-clk, linux-kernel,
AngeloGioacchino Del Regno, ~postmarketos/upstreaming,
linux-arm-msm, Konrad Dybcio, Nishanth Menon, Rafael J. Wysocki,
Rob Herring, Michael Turquette, Bjorn Andersson
On Thu, Oct 14 2021 at 18:31:04 +0400, Rob Herring <robh@kernel.org>
wrote:
> On Thu, 14 Oct 2021 08:32:04 +0000, Yassine Oudjana wrote:
>> Add a compatible string for msm8996pro-apcc.
>>
>> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
>> ---
>> Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml | 1
>> +
>> 1 file changed, 1 insertion(+)
>>
>
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
>
> Note that it is not yet a requirement to have 0 warnings for
> dtbs_check.
> This will change in the future.
>
> Full log is available here: https://patchwork.ozlabs.org/patch/1540829
>
>
> clock-controller@6400000: clock-names:0: 'pwrcl_pll' was expected
> arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
> arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
>
> clock-controller@6400000: clock-names: ['xo'] is too short
> arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
> arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
>
> clock-controller@6400000: clocks: [[29]] is too short
> arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
>
> clock-controller@6400000: clocks: [[33]] is too short
> arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
>
> clock-controller@6400000: clocks: [[36]] is too short
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
>
> clock-controller@6400000: clocks: [[41]] is too short
> arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
>
> clock-controller@6400000: reg: [[104857600, 589824]] is too short
> arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml
> arch/arm64/boot/dts/qcom/apq8096-ifc6640.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dt.yaml
> arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dt.yaml
>
Similar to PATCH 1/8[1], these are old warnings.
Yassine
[1]
https://lore.kernel.org/linux-arm-msm/G3T21R.IC4JJ9W0GTB72@protonmail.com/T/#u
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 3/8] clk: qcom: msm8996-cpu: Add MSM8996 Pro CBF support
2021-10-14 8:32 ` [PATCH 3/8] clk: qcom: msm8996-cpu: Add MSM8996 Pro CBF support Yassine Oudjana
2021-10-15 18:54 ` Konrad Dybcio
@ 2021-10-24 17:30 ` Bjorn Andersson
1 sibling, 0 replies; 27+ messages in thread
From: Bjorn Andersson @ 2021-10-24 17:30 UTC (permalink / raw)
To: Yassine Oudjana
Cc: Andy Gross, Michael Turquette, Stephen Boyd, Rob Herring,
Ilia Lin, Viresh Kumar, Nishanth Menon, Rafael J. Wysocki,
Loic Poulain, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
On Thu 14 Oct 03:32 CDT 2021, Yassine Oudjana wrote:
> MSM8996 Pro (MSM8996SG) has a few differences in the CBF clock.
>
I think it would be nice if you described what those differences are.
Regards,
Bjorn
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
> Dependencies:
> - clk: qcom: msm8996-cpu: Add CBF support
> https://lore.kernel.org/linux-arm-msm/20210528192541.1120703-1-konrad.dybcio@somainline.org/
>
> drivers/clk/qcom/clk-cpu-8996.c | 61 +++++++++++++++++++++------------
> 1 file changed, 40 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
> index 8afc271f92d0..ab2acbe74f0f 100644
> --- a/drivers/clk/qcom/clk-cpu-8996.c
> +++ b/drivers/clk/qcom/clk-cpu-8996.c
> @@ -70,11 +70,11 @@ enum _pmux_input {
>
> enum {
> CBF_PLL_INDEX = 1,
> - CBF_DIV_2_INDEX,
> + CBF_DIV_INDEX,
> CBF_SAFE_INDEX
> };
>
> -#define DIV_2_THRESHOLD 600000000
> +#define DIV_THRESHOLD 600000000
> #define PWRCL_REG_OFFSET 0x0
> #define PERFCL_REG_OFFSET 0x80000
> #define MUX_OFFSET 0x40
> @@ -142,6 +142,17 @@ static const struct alpha_pll_config cbfpll_config = {
> .early_output_mask = BIT(3),
> };
>
> +static const struct alpha_pll_config cbfpll_config_pro = {
> + .l = 72,
> + .config_ctl_val = 0x200d4aa8,
> + .config_ctl_hi_val = 0x006,
> + .pre_div_mask = BIT(12),
> + .post_div_mask = 0x3 << 8,
> + .post_div_val = 0x3 << 8,
> + .main_output_mask = BIT(0),
> + .early_output_mask = BIT(3),
> +};
> +
> static struct clk_alpha_pll perfcl_pll = {
> .offset = PERFCL_REG_OFFSET,
> .regs = prim_pll_regs,
> @@ -230,7 +241,8 @@ struct clk_cpu_8996_mux {
> u8 width;
> struct notifier_block nb;
> struct clk_hw *pll;
> - struct clk_hw *pll_div_2;
> + struct clk_hw *pll_div;
> + u8 div;
> struct clk_regmap clkr;
> };
>
> @@ -280,11 +292,11 @@ static int clk_cpu_8996_mux_determine_rate(struct clk_hw *hw,
> struct clk_cpu_8996_mux *cpuclk = to_clk_cpu_8996_mux_hw(hw);
> struct clk_hw *parent = cpuclk->pll;
>
> - if (cpuclk->pll_div_2 && req->rate < DIV_2_THRESHOLD) {
> - if (req->rate < (DIV_2_THRESHOLD / 2))
> + if (cpuclk->pll_div &&req->rate < DIV_THRESHOLD) {
> + if (req->rate < (DIV_THRESHOLD / cpuclk->div))
> return -EINVAL;
>
> - parent = cpuclk->pll_div_2;
> + parent = cpuclk->pll_div;
> }
>
> req->best_parent_rate = clk_hw_round_rate(parent, req->rate);
> @@ -336,7 +348,8 @@ static struct clk_cpu_8996_mux pwrcl_pmux = {
> .shift = 0,
> .width = 2,
> .pll = &pwrcl_pll.clkr.hw,
> - .pll_div_2 = &pwrcl_smux.clkr.hw,
> + .pll_div = &pwrcl_smux.clkr.hw,
> + .div = 2,
> .nb.notifier_call = cpu_clk_notifier_cb,
> .clkr.hw.init = &(struct clk_init_data) {
> .name = "pwrcl_pmux",
> @@ -358,7 +371,8 @@ static struct clk_cpu_8996_mux perfcl_pmux = {
> .shift = 0,
> .width = 2,
> .pll = &perfcl_pll.clkr.hw,
> - .pll_div_2 = &perfcl_smux.clkr.hw,
> + .pll_div = &perfcl_smux.clkr.hw,
> + .div = 2,
> .nb.notifier_call = cpu_clk_notifier_cb,
> .clkr.hw.init = &(struct clk_init_data) {
> .name = "perfcl_pmux",
> @@ -481,19 +495,23 @@ static int qcom_cbf_clk_msm8996_register_clks(struct device *dev,
> struct regmap *regmap)
> {
> int ret;
> + bool is_pro = of_device_is_compatible(dev->of_node, "qcom,msm8996pro-apcc");
>
> - cbf_mux.pll_div_2 = clk_hw_register_fixed_factor(dev, "cbf_pll_main",
> - "cbf_pll", CLK_SET_RATE_PARENT,
> - 1, 2);
> - if (IS_ERR(cbf_mux.pll_div_2)) {
> + cbf_mux.div = is_pro ? 4 : 2;
> + cbf_mux.pll_div = clk_hw_register_fixed_factor(dev, "cbf_pll_main",
> + "cbf_pll", CLK_SET_RATE_PARENT,
> + 1, cbf_mux.div);
> +
> + if (IS_ERR(cbf_mux.pll_div)) {
> dev_err(dev, "Failed to initialize cbf_pll_main\n");
> - return PTR_ERR(cbf_mux.pll_div_2);
> + return PTR_ERR(cbf_mux.pll_div);
> }
>
> ret = devm_clk_register_regmap(dev, cbf_msm8996_clks[0]);
> ret = devm_clk_register_regmap(dev, cbf_msm8996_clks[1]);
>
> - clk_alpha_pll_configure(&cbf_pll, regmap, &cbfpll_config);
> + clk_alpha_pll_configure(&cbf_pll, regmap, is_pro ?
> + &cbfpll_config_pro : &cbfpll_config);
> clk_set_rate(cbf_pll.clkr.hw.clk, 614400000);
> clk_prepare_enable(cbf_pll.clkr.hw.clk);
> clk_notifier_register(cbf_mux.clkr.hw.clk, &cbf_mux.nb);
> @@ -575,7 +593,7 @@ static int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event,
> qcom_cpu_clk_msm8996_acd_init(base);
> break;
> case POST_RATE_CHANGE:
> - if (cnd->new_rate < DIV_2_THRESHOLD)
> + if (cnd->new_rate < DIV_THRESHOLD)
> ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw,
> DIV_2_INDEX);
> else
> @@ -600,15 +618,15 @@ static int cbf_clk_notifier_cb(struct notifier_block *nb, unsigned long event,
>
> switch (event) {
> case PRE_RATE_CHANGE:
> - parent = clk_hw_get_parent_by_index(&cbfclk->clkr.hw, CBF_DIV_2_INDEX);
> - ret = clk_cpu_8996_mux_set_parent(&cbfclk->clkr.hw, CBF_DIV_2_INDEX);
> + parent = clk_hw_get_parent_by_index(&cbfclk->clkr.hw, CBF_DIV_INDEX);
> + ret = clk_cpu_8996_mux_set_parent(&cbfclk->clkr.hw, CBF_DIV_INDEX);
>
> - if (cnd->old_rate > DIV_2_THRESHOLD && cnd->new_rate < DIV_2_THRESHOLD)
> - ret = clk_set_rate(parent->clk, cnd->old_rate / 2);
> + if (cnd->old_rate > DIV_THRESHOLD && cnd->new_rate < DIV_THRESHOLD)
> + ret = clk_set_rate(parent->clk, cnd->old_rate / cbfclk->div);
> break;
> case POST_RATE_CHANGE:
> - if (cnd->new_rate < DIV_2_THRESHOLD)
> - ret = clk_cpu_8996_mux_set_parent(&cbfclk->clkr.hw, CBF_DIV_2_INDEX);
> + if (cnd->new_rate < DIV_THRESHOLD)
> + ret = clk_cpu_8996_mux_set_parent(&cbfclk->clkr.hw, CBF_DIV_INDEX);
> else {
> parent = clk_hw_get_parent_by_index(&cbfclk->clkr.hw, CBF_PLL_INDEX);
> ret = clk_set_rate(parent->clk, cnd->new_rate);
> @@ -676,6 +694,7 @@ static int qcom_cpu_clk_msm8996_driver_remove(struct platform_device *pdev)
>
> static const struct of_device_id qcom_cpu_clk_msm8996_match_table[] = {
> { .compatible = "qcom,msm8996-apcc" },
> + { .compatible = "qcom,msm8996pro-apcc" },
> {}
> };
> MODULE_DEVICE_TABLE(of, qcom_cpu_clk_msm8996_match_table);
> --
> 2.33.0
>
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/8] dt-bindings: clk: qcom: msm8996-apcc: Add CBF
2021-10-14 8:31 ` [PATCH 1/8] dt-bindings: clk: qcom: msm8996-apcc: Add CBF Yassine Oudjana
2021-10-14 14:31 ` Rob Herring
@ 2021-10-26 21:08 ` Rob Herring
1 sibling, 0 replies; 27+ messages in thread
From: Rob Herring @ 2021-10-26 21:08 UTC (permalink / raw)
To: Yassine Oudjana
Cc: Rafael J. Wysocki, Rob Herring, linux-pm,
~postmarketos/upstreaming, linux-clk, linux-kernel,
Nishanth Menon, Bjorn Andersson, Konrad Dybcio, Andy Gross,
Michael Turquette, Viresh Kumar, Loic Poulain, linux-arm-msm,
Ilia Lin, Stephen Boyd, phone-devel, devicetree,
AngeloGioacchino Del Regno
On Thu, 14 Oct 2021 08:31:32 +0000, Yassine Oudjana wrote:
> Add CBF clock and reg.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
> .../devicetree/bindings/clock/qcom,msm8996-apcc.yaml | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 2/8] dt-bindings: clk: qcom: msm8996-apcc: Add MSM8996 Pro compatible
2021-10-14 8:32 ` [PATCH 2/8] dt-bindings: clk: qcom: msm8996-apcc: Add MSM8996 Pro compatible Yassine Oudjana
2021-10-14 14:31 ` Rob Herring
@ 2021-10-26 21:08 ` Rob Herring
1 sibling, 0 replies; 27+ messages in thread
From: Rob Herring @ 2021-10-26 21:08 UTC (permalink / raw)
To: Yassine Oudjana
Cc: phone-devel, Rafael J. Wysocki, linux-clk, linux-kernel,
Rob Herring, Konrad Dybcio, linux-arm-msm, linux-pm,
Loic Poulain, Michael Turquette, Andy Gross, Viresh Kumar,
Bjorn Andersson, Nishanth Menon, ~postmarketos/upstreaming,
devicetree, AngeloGioacchino Del Regno, Stephen Boyd, Ilia Lin
On Thu, 14 Oct 2021 08:32:04 +0000, Yassine Oudjana wrote:
> Add a compatible string for msm8996pro-apcc.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
> Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 4/8] cpufreq: qcom_cpufreq_nvmem: Simplify reading kryo speedbin
2021-10-15 18:58 ` Konrad Dybcio
@ 2021-10-28 18:18 ` Bjorn Andersson
0 siblings, 0 replies; 27+ messages in thread
From: Bjorn Andersson @ 2021-10-28 18:18 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Yassine Oudjana, Andy Gross, Michael Turquette, Stephen Boyd,
Rob Herring, Ilia Lin, Viresh Kumar, Nishanth Menon,
Rafael J. Wysocki, Loic Poulain, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
On Fri 15 Oct 11:58 PDT 2021, Konrad Dybcio wrote:
>
> On 14.10.2021 10:32, Yassine Oudjana wrote:
> > In preparation for adding a separate device tree for MSM8996 Pro, skip reading
> > msm-id from smem and just read the speedbin efuse.
> >
> While I'd really like for this to be merged, it's gonna totally wreck backwards
>
> compatibility.. But then, since APCC was not defined properly before commit
>
> 0a275a35ceab07 arm64: dts: qcom: msm8996: Make CPUCC actually probe (and work)
>
> there's only 5.14/5.15 (both of which were non-LTS) which would *actually* break given
>
> somebody decided that "ah yes, pulling in DTs from these specific mainline kernel releases
>
> is a good idea"...
>
>
> If I were to judge, it would probably be fine to rid the old mechanism..
>
Given that various people have reported instabilities on db820c in its
current form - and prior to that it was too slow - I think it's fine to
favour getting this sorted out properly over backwards compatibility.
Regards,
Bjorn
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 5/8] dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema
2021-10-14 15:45 ` Rob Herring
@ 2021-11-04 11:32 ` Yassine Oudjana
0 siblings, 0 replies; 27+ messages in thread
From: Yassine Oudjana @ 2021-11-04 11:32 UTC (permalink / raw)
To: Rob Herring
Cc: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Ilia Lin, Viresh Kumar, Nishanth Menon, Rafael J. Wysocki,
Loic Poulain, Konrad Dybcio, AngeloGioacchino Del Regno,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
~postmarketos/upstreaming, phone-devel
On Thu, 2021-10-14 at 19:45 +0400, Rob Herring wrote:
> On Thu, Oct 14, 2021 at 08:32:35AM +0000, Yassine Oudjana wrote:
> > Convert qcom-nvmem-cpufreq to DT schema format.
> >
> > Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> > ---
> > .../bindings/opp/qcom-cpufreq-nvmem.yaml | 877 ++++++++++++++++++
> > .../bindings/opp/qcom-nvmem-cpufreq.txt | 796 ----------------
> > MAINTAINERS | 2 +-
> > 3 files changed, 878 insertions(+), 797 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
> > delete mode 100644 Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
> >
> > diff --git a/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
> > new file mode 100644
> > index 000000000000..4a7d4826746e
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
> > @@ -0,0 +1,877 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/opp/qcom-cpufreq-nvmem.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings
> > +
> > +maintainers:
> > + - Ilia Lin <ilia.lin@kernel.org>
> > +
> > +description: |
> > + In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996,
> > + the CPU frequencies subset and voltage value of each OPP varies based on
> > + the silicon variant in use.
> > + Qualcomm Technologies, Inc. Process Voltage Scaling Tables
> > + defines the voltage and frequency value based on the msm-id in SMEM
> > + and speedbin blown in the efuse combination.
> > + The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
> > + to provide the OPP framework with required information (existing HW bitmap).
> > + This is used to determine the voltage and frequency value for each OPP of
> > + operating-points-v2 table when it is parsed by the OPP framework.
> > +
> > +patternProperties:
> > + compatible:
>
> Not a pattern... Putting this under 'properties' probably didn't work
> for you either if these are the top-level compatibles. What you want to
> use here is 'select'.
>
Noted.
>
> > + enum:
> > + - qcom,apq8096
> > + - qcom,msm8996
> > + - qcom,qcs404
> > + - qcom,ipq8064
> > + - qcom,apq8064
> > + - qcom,msm8974
> > + - qcom,msm8960
> > +
> > + '^opp-table(-[a-z0-9]+)?$':
> > + type: object
> > +
> > + patternProperties:
> > + compatible:
> > + const: operating-points-v2-kryo-cpu
> > +
> > + nvmem-cells:
> > + description: |
> > + A phandle pointing to a nvmem-cells node representing the
> > + efuse registers that has information about the
> > + speedbin that is used to select the right frequency/voltage
> > + value pair.
> > +
> > + opp-shared: true
> > +
> > + '^opp-?[0-9]+$':
> > + type: object
> > +
> > + properties:
> > + opp-hz: true
> > + opp-microvolt: true
> > + clock-latency-ns: true
> > +
> > + opp-supported-hw:
> > + description: |
> > + A single 32 bit bitmap value, representing compatible HW.
> > + Bitmap:
> > + 0: MSM8996 V3, speedbin 0
> > + 1: MSM8996 V3, speedbin 1
> > + 2: MSM8996 V3, speedbin 2
> > + 3: unused
> > + 4: MSM8996 SG, speedbin 0
> > + 5: MSM8996 SG, speedbin 1
> > + 6: MSM8996 SG, speedbin 2
> > + 7-31: unused
>
> maximum: 0x77
>
> > +
> > + required:
> > + - opp-hz
> > + - opp-supported-hw
> > +
> > +allOf:
> > + - $ref: opp-v2-base.yaml#
>
> This is at the wrong level. It needs to be within
> '^opp-table(-[a-z0-9]+)?$' node schema.
Noted.
>
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: qcom,qcs404
> > + then:
> > + patternProperties:
> > + cpus:
> > + type: object
> > +
> > + patternProperties:
> > + 'cpu@[0-9a-f]+':
> > + type: object
> > +
> > + properties:
> > + power-domains:
> > + items:
> > + - description: A phandle pointing to the PM domain specifier
> > + which provides the performance states available for active
> > + state management.
>
> No need to describe common properties unless you have something specific
> to say for this binding in particular.
>
> maxItems: 1
Noted.
>
> > + power-domain-names:
> > + items:
> > + - const: cpr
> > +
> > + '^opp-?[0-9]+$':
> > + properties:
> > + required-opps: true
> > +
> > + required:
> > + - opp-hz
> > + - opp-supported-hw
> > + - required-opps
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + / {
> > + model = "Qualcomm Technologies, Inc. MSM8996";
> > + compatible = "qcom,msm8996";
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + cpus {
> > + #address-cells = <2>;
> > + #size-cells = <0>;
> > +
> > + CPU0: cpu@0 {
> > + device_type = "cpu";
> > + compatible = "qcom,kryo";
> > + reg = <0x0 0x0>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + capacity-dmips-mhz = <1024>;
> > + clocks = <&kryocc 0>;
> > + operating-points-v2 = <&cluster0_opp>;
> > + #cooling-cells = <2>;
> > + next-level-cache = <&L2_0>;
> > + L2_0: l2-cache {
> > + compatible = "cache";
> > + cache-level = <2>;
> > + };
> > + };
> > +
> > + CPU1: cpu@1 {
> > + device_type = "cpu";
> > + compatible = "qcom,kryo";
> > + reg = <0x0 0x1>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + capacity-dmips-mhz = <1024>;
> > + clocks = <&kryocc 0>;
> > + operating-points-v2 = <&cluster0_opp>;
> > + #cooling-cells = <2>;
> > + next-level-cache = <&L2_0>;
> > + };
> > +
> > + CPU2: cpu@100 {
> > + device_type = "cpu";
> > + compatible = "qcom,kryo";
> > + reg = <0x0 0x100>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + capacity-dmips-mhz = <1024>;
> > + clocks = <&kryocc 1>;
> > + operating-points-v2 = <&cluster1_opp>;
> > + #cooling-cells = <2>;
> > + next-level-cache = <&L2_1>;
> > + L2_1: l2-cache {
> > + compatible = "cache";
> > + cache-level = <2>;
> > + };
> > + };
> > +
> > + CPU3: cpu@101 {
> > + device_type = "cpu";
> > + compatible = "qcom,kryo";
> > + reg = <0x0 0x101>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + capacity-dmips-mhz = <1024>;
> > + clocks = <&kryocc 1>;
> > + operating-points-v2 = <&cluster1_opp>;
> > + #cooling-cells = <2>;
> > + next-level-cache = <&L2_1>;
> > + };
> > +
> > + cpu-map {
> > + cluster0 {
> > + core0 {
> > + cpu = <&CPU0>;
> > + };
> > +
> > + core1 {
> > + cpu = <&CPU1>;
> > + };
> > + };
> > +
> > + cluster1 {
> > + core0 {
> > + cpu = <&CPU2>;
> > + };
> > +
> > + core1 {
> > + cpu = <&CPU3>;
> > + };
> > + };
> > + };
> > + };
> > +
> > + cluster0_opp: opp_table0 {
> > + compatible = "operating-points-v2-kryo-cpu";
> > + nvmem-cells = <&speedbin_efuse>;
> > + opp-shared;
> > +
> > + opp-307200000 {
> > + opp-hz = /bits/ 64 <307200000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x77>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-384000000 {
> > + opp-hz = /bits/ 64 <384000000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-422400000 {
> > + opp-hz = /bits/ 64 <422400000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-460800000 {
> > + opp-hz = /bits/ 64 <460800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-480000000 {
> > + opp-hz = /bits/ 64 <480000000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-537600000 {
> > + opp-hz = /bits/ 64 <537600000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-556800000 {
> > + opp-hz = /bits/ 64 <556800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-614400000 {
> > + opp-hz = /bits/ 64 <614400000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-652800000 {
> > + opp-hz = /bits/ 64 <652800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-691200000 {
> > + opp-hz = /bits/ 64 <691200000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-729600000 {
> > + opp-hz = /bits/ 64 <729600000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-768000000 {
> > + opp-hz = /bits/ 64 <768000000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-844800000 {
> > + opp-hz = /bits/ 64 <844800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x77>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-902400000 {
> > + opp-hz = /bits/ 64 <902400000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-960000000 {
> > + opp-hz = /bits/ 64 <960000000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-979200000 {
> > + opp-hz = /bits/ 64 <979200000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1036800000 {
> > + opp-hz = /bits/ 64 <1036800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1056000000 {
> > + opp-hz = /bits/ 64 <1056000000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1113600000 {
> > + opp-hz = /bits/ 64 <1113600000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1132800000 {
> > + opp-hz = /bits/ 64 <1132800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1190400000 {
> > + opp-hz = /bits/ 64 <1190400000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1209600000 {
> > + opp-hz = /bits/ 64 <1209600000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1228800000 {
> > + opp-hz = /bits/ 64 <1228800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1286400000 {
> > + opp-hz = /bits/ 64 <1286400000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1324800000 {
> > + opp-hz = /bits/ 64 <1324800000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x5>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1363200000 {
> > + opp-hz = /bits/ 64 <1363200000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x72>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1401600000 {
> > + opp-hz = /bits/ 64 <1401600000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x5>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1440000000 {
> > + opp-hz = /bits/ 64 <1440000000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1478400000 {
> > + opp-hz = /bits/ 64 <1478400000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x1>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1497600000 {
> > + opp-hz = /bits/ 64 <1497600000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x4>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1516800000 {
> > + opp-hz = /bits/ 64 <1516800000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1593600000 {
> > + opp-hz = /bits/ 64 <1593600000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x71>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1996800000 {
> > + opp-hz = /bits/ 64 <1996800000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x20>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-2188800000 {
> > + opp-hz = /bits/ 64 <2188800000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x10>;
> > + clock-latency-ns = <200000>;
> > + };
>
> Maybe drop some opp nodes for brievity.
Noted.
>
> > + };
> > +
> > + cluster1_opp: opp_table1 {
> > + compatible = "operating-points-v2-kryo-cpu";
> > + nvmem-cells = <&speedbin_efuse>;
> > + opp-shared;
> > +
> > + opp-307200000 {
> > + opp-hz = /bits/ 64 <307200000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x77>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-384000000 {
> > + opp-hz = /bits/ 64 <384000000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-403200000 {
> > + opp-hz = /bits/ 64 <403200000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-460800000 {
> > + opp-hz = /bits/ 64 <460800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-480000000 {
> > + opp-hz = /bits/ 64 <480000000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-537600000 {
> > + opp-hz = /bits/ 64 <537600000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-556800000 {
> > + opp-hz = /bits/ 64 <556800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-614400000 {
> > + opp-hz = /bits/ 64 <614400000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-652800000 {
> > + opp-hz = /bits/ 64 <652800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-691200000 {
> > + opp-hz = /bits/ 64 <691200000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-729600000 {
> > + opp-hz = /bits/ 64 <729600000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-748800000 {
> > + opp-hz = /bits/ 64 <748800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-806400000 {
> > + opp-hz = /bits/ 64 <806400000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-825600000 {
> > + opp-hz = /bits/ 64 <825600000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-883200000 {
> > + opp-hz = /bits/ 64 <883200000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-902400000 {
> > + opp-hz = /bits/ 64 <902400000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-940800000 {
> > + opp-hz = /bits/ 64 <940800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-979200000 {
> > + opp-hz = /bits/ 64 <979200000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1036800000 {
> > + opp-hz = /bits/ 64 <1036800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1056000000 {
> > + opp-hz = /bits/ 64 <1056000000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1113600000 {
> > + opp-hz = /bits/ 64 <1113600000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1132800000 {
> > + opp-hz = /bits/ 64 <1132800000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1190400000 {
> > + opp-hz = /bits/ 64 <1190400000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1209600000 {
> > + opp-hz = /bits/ 64 <1209600000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1248000000 {
> > + opp-hz = /bits/ 64 <1248000000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1286400000 {
> > + opp-hz = /bits/ 64 <1286400000>;
> > + opp-microvolt = <905000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1324800000 {
> > + opp-hz = /bits/ 64 <1324800000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1363200000 {
> > + opp-hz = /bits/ 64 <1363200000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1401600000 {
> > + opp-hz = /bits/ 64 <1401600000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1440000000 {
> > + opp-hz = /bits/ 64 <1440000000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1478400000 {
> > + opp-hz = /bits/ 64 <1478400000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1516800000 {
> > + opp-hz = /bits/ 64 <1516800000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1555200000 {
> > + opp-hz = /bits/ 64 <1555200000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1593600000 {
> > + opp-hz = /bits/ 64 <1593600000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1632000000 {
> > + opp-hz = /bits/ 64 <1632000000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1670400000 {
> > + opp-hz = /bits/ 64 <1670400000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1708800000 {
> > + opp-hz = /bits/ 64 <1708800000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1747200000 {
> > + opp-hz = /bits/ 64 <1747200000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x70>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1785600000 {
> > + opp-hz = /bits/ 64 <1785600000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x7>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1804800000 {
> > + opp-hz = /bits/ 64 <1804800000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x6>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1824000000 {
> > + opp-hz = /bits/ 64 <1824000000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x71>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1900800000 {
> > + opp-hz = /bits/ 64 <1900800000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x74>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1920000000 {
> > + opp-hz = /bits/ 64 <1920000000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x1>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1977600000 {
> > + opp-hz = /bits/ 64 <1977600000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x30>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-1996800000 {
> > + opp-hz = /bits/ 64 <1996800000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x1>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-2054400000 {
> > + opp-hz = /bits/ 64 <2054400000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x30>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-2073600000 {
> > + opp-hz = /bits/ 64 <2073600000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x1>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-2150400000 {
> > + opp-hz = /bits/ 64 <2150400000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x31>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-2246400000 {
> > + opp-hz = /bits/ 64 <2246400000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x10>;
> > + clock-latency-ns = <200000>;
> > + };
> > + opp-2342400000 {
> > + opp-hz = /bits/ 64 <2342400000>;
> > + opp-microvolt = <1140000 905000 1140000>;
> > + opp-supported-hw = <0x10>;
> > + clock-latency-ns = <200000>;
> > + };
> > + };
> > +
> > + reserved-memory {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
> > +
> > + smem_mem: smem-mem@86000000 {
> > + reg = <0x0 0x86000000 0x0 0x200000>;
> > + no-map;
> > + };
> > + };
> > +
> > + smem {
> > + compatible = "qcom,smem";
> > + memory-region = <&smem_mem>;
> > + hwlocks = <&tcsr_mutex 3>;
> > + };
> > +
> > + soc {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + qfprom: qfprom@74000 {
> > + compatible = "qcom,msm8996-qfprom", "qcom,qfprom";
> > + reg = <0x00074000 0x8ff>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + speedbin_efuse: speedbin@133 {
> > + reg = <0x133 0x1>;
> > + bits = <5 3>;
> > + };
> > + };
> > + };
> > + };
> > +
> > + - |
> > + / {
>
> I think this is going to do weird things. The examples aren't really
> independent. The result is going to be the 2 examples are merged to 1
> root node.
I actually had to remove labels from the CPU nodes below to prevent them
from conflicting with the first example. I just thought it was the way
dt_binding_check worked and it was fine to do it this way.
>
> Maybe qcs404 should be a different schema anyways. Doesn't look like a
> lot of overlap (any more so than any other OPP).
msm8996 also has CPR and should get a cpr power domain and required-opps
once it's supported, so I'm not sure if it would be good to split them now.
>
> > + model = "Qualcomm Technologies, Inc. QCS404";
> > + compatible = "qcom,qcs404";
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu@100 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + reg = <0x100>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + next-level-cache = <&L2_0>;
> > + #cooling-cells = <2>;
> > + clocks = <&apcs_glb>;
> > + operating-points-v2 = <&cpu_opp_table>;
> > + power-domains = <&cpr>;
> > + power-domain-names = "cpr";
> > + };
> > +
> > + cpu@101 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + reg = <0x101>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + next-level-cache = <&L2_0>;
> > + #cooling-cells = <2>;
> > + clocks = <&apcs_glb>;
> > + operating-points-v2 = <&cpu_opp_table>;
> > + power-domains = <&cpr>;
> > + power-domain-names = "cpr";
> > + };
> > +
> > + cpu@102 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + reg = <0x102>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + next-level-cache = <&L2_0>;
> > + #cooling-cells = <2>;
> > + clocks = <&apcs_glb>;
> > + operating-points-v2 = <&cpu_opp_table>;
> > + power-domains = <&cpr>;
> > + power-domain-names = "cpr";
> > + };
> > +
> > + cpu@103 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + reg = <0x103>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + next-level-cache = <&L2_0>;
> > + #cooling-cells = <2>;
> > + clocks = <&apcs_glb>;
> > + operating-points-v2 = <&cpu_opp_table>;
> > + power-domains = <&cpr>;
> > + power-domain-names = "cpr";
> > + };
> > + };
> > +
> > + cpu_opp_table: cpu-opp-table {
> > + compatible = "operating-points-v2-kryo-cpu";
> > + opp-shared;
> > +
> > + opp-1094400000 {
> > + opp-hz = /bits/ 64 <1094400000>;
> > + required-opps = <&cpr_opp1>;
> > + };
> > + opp-1248000000 {
> > + opp-hz = /bits/ 64 <1248000000>;
> > + required-opps = <&cpr_opp2>;
> > + };
> > + opp-1401600000 {
> > + opp-hz = /bits/ 64 <1401600000>;
> > + required-opps = <&cpr_opp3>;
> > + };
> > + };
> > +
> > + cpr_opp_table: cpr-opp-table {
> > + compatible = "operating-points-v2-qcom-level";
> > +
> > + cpr_opp1: opp1 {
> > + opp-level = <1>;
> > + qcom,opp-fuse-level = <1>;
> > + };
> > + cpr_opp2: opp2 {
> > + opp-level = <2>;
> > + qcom,opp-fuse-level = <2>;
> > + };
> > + cpr_opp3: opp3 {
> > + opp-level = <3>;
> > + qcom,opp-fuse-level = <3>;
> > + };
> > + };
> > +
> > + soc {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + cpr: power-controller@b018000 {
> > + compatible = "qcom,qcs404-cpr", "qcom,cpr";
> > + reg = <0x0b018000 0x1000>;
> > +
> > + vdd-apc-supply = <&pms405_s3>;
> > + #power-domain-cells = <0>;
> > + operating-points-v2 = <&cpr_opp_table>;
> > + };
> > + };
> > + };
> > diff --git a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
> > deleted file mode 100644
> > index 64f07417ecfb..000000000000
> > --- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
> > +++ /dev/null
> > @@ -1,796 +0,0 @@
> > -Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings
> > -===================================
> > -
> > -In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996,
> > -the CPU frequencies subset and voltage value of each OPP varies based on
> > -the silicon variant in use.
> > -Qualcomm Technologies, Inc. Process Voltage Scaling Tables
> > -defines the voltage and frequency value based on the msm-id in SMEM
> > -and speedbin blown in the efuse combination.
> > -The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
> > -to provide the OPP framework with required information (existing HW bitmap).
> > -This is used to determine the voltage and frequency value for each OPP of
> > -operating-points-v2 table when it is parsed by the OPP framework.
> > -
> > -Required properties:
> > ---------------------
> > -In 'cpu' nodes:
> > -- operating-points-v2: Phandle to the operating-points-v2 table to use.
> > -
> > -In 'operating-points-v2' table:
> > -- compatible: Should be
> > - - 'operating-points-v2-kryo-cpu' for apq8096, msm8996, msm8974,
> > - apq8064, ipq8064, msm8960 and ipq8074.
> > -
> > -Optional properties:
> > ---------------------
> > -In 'cpu' nodes:
> > -- power-domains: A phandle pointing to the PM domain specifier which provides
> > - the performance states available for active state management.
> > - Please refer to the power-domains bindings
> > - Documentation/devicetree/bindings/power/power_domain.txt
> > - and also examples below.
> > -- power-domain-names: Should be
> > - - 'cpr' for qcs404.
> > -
> > -In 'operating-points-v2' table:
> > -- nvmem-cells: A phandle pointing to a nvmem-cells node representing the
> > - efuse registers that has information about the
> > - speedbin that is used to select the right frequency/voltage
> > - value pair.
> > - Please refer the for nvmem-cells
> > - bindings Documentation/devicetree/bindings/nvmem/nvmem.txt
> > - and also examples below.
> > -
> > -In every OPP node:
> > -- opp-supported-hw: A single 32 bit bitmap value, representing compatible HW.
> > - Bitmap:
> > - 0: MSM8996 V3, speedbin 0
> > - 1: MSM8996 V3, speedbin 1
> > - 2: MSM8996 V3, speedbin 2
> > - 3: unused
> > - 4: MSM8996 SG, speedbin 0
> > - 5: MSM8996 SG, speedbin 1
> > - 6: MSM8996 SG, speedbin 2
> > - 7-31: unused
> > -
> > -Example 1:
> > ----------
> > -
> > - cpus {
> > - #address-cells = <2>;
> > - #size-cells = <0>;
> > -
> > - CPU0: cpu@0 {
> > - device_type = "cpu";
> > - compatible = "qcom,kryo";
> > - reg = <0x0 0x0>;
> > - enable-method = "psci";
> > - clocks = <&kryocc 0>;
> > - cpu-supply = <&pm8994_s11_saw>;
> > - operating-points-v2 = <&cluster0_opp>;
> > - #cooling-cells = <2>;
> > - next-level-cache = <&L2_0>;
> > - L2_0: l2-cache {
> > - compatible = "cache";
> > - cache-level = <2>;
> > - };
> > - };
> > -
> > - CPU1: cpu@1 {
> > - device_type = "cpu";
> > - compatible = "qcom,kryo";
> > - reg = <0x0 0x1>;
> > - enable-method = "psci";
> > - clocks = <&kryocc 0>;
> > - cpu-supply = <&pm8994_s11_saw>;
> > - operating-points-v2 = <&cluster0_opp>;
> > - #cooling-cells = <2>;
> > - next-level-cache = <&L2_0>;
> > - };
> > -
> > - CPU2: cpu@100 {
> > - device_type = "cpu";
> > - compatible = "qcom,kryo";
> > - reg = <0x0 0x100>;
> > - enable-method = "psci";
> > - clocks = <&kryocc 1>;
> > - cpu-supply = <&pm8994_s11_saw>;
> > - operating-points-v2 = <&cluster1_opp>;
> > - #cooling-cells = <2>;
> > - next-level-cache = <&L2_1>;
> > - L2_1: l2-cache {
> > - compatible = "cache";
> > - cache-level = <2>;
> > - };
> > - };
> > -
> > - CPU3: cpu@101 {
> > - device_type = "cpu";
> > - compatible = "qcom,kryo";
> > - reg = <0x0 0x101>;
> > - enable-method = "psci";
> > - clocks = <&kryocc 1>;
> > - cpu-supply = <&pm8994_s11_saw>;
> > - operating-points-v2 = <&cluster1_opp>;
> > - #cooling-cells = <2>;
> > - next-level-cache = <&L2_1>;
> > - };
> > -
> > - cpu-map {
> > - cluster0 {
> > - core0 {
> > - cpu = <&CPU0>;
> > - };
> > -
> > - core1 {
> > - cpu = <&CPU1>;
> > - };
> > - };
> > -
> > - cluster1 {
> > - core0 {
> > - cpu = <&CPU2>;
> > - };
> > -
> > - core1 {
> > - cpu = <&CPU3>;
> > - };
> > - };
> > - };
> > - };
> > -
> > - cluster0_opp: opp_table0 {
> > - compatible = "operating-points-v2-kryo-cpu";
> > - nvmem-cells = <&speedbin_efuse>;
> > - opp-shared;
> > -
> > - opp-307200000 {
> > - opp-hz = /bits/ 64 <307200000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x77>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-384000000 {
> > - opp-hz = /bits/ 64 <384000000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-422400000 {
> > - opp-hz = /bits/ 64 <422400000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-460800000 {
> > - opp-hz = /bits/ 64 <460800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-480000000 {
> > - opp-hz = /bits/ 64 <480000000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-537600000 {
> > - opp-hz = /bits/ 64 <537600000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-556800000 {
> > - opp-hz = /bits/ 64 <556800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-614400000 {
> > - opp-hz = /bits/ 64 <614400000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-652800000 {
> > - opp-hz = /bits/ 64 <652800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-691200000 {
> > - opp-hz = /bits/ 64 <691200000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-729600000 {
> > - opp-hz = /bits/ 64 <729600000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-768000000 {
> > - opp-hz = /bits/ 64 <768000000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-844800000 {
> > - opp-hz = /bits/ 64 <844800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x77>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-902400000 {
> > - opp-hz = /bits/ 64 <902400000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-960000000 {
> > - opp-hz = /bits/ 64 <960000000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-979200000 {
> > - opp-hz = /bits/ 64 <979200000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1036800000 {
> > - opp-hz = /bits/ 64 <1036800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1056000000 {
> > - opp-hz = /bits/ 64 <1056000000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1113600000 {
> > - opp-hz = /bits/ 64 <1113600000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1132800000 {
> > - opp-hz = /bits/ 64 <1132800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1190400000 {
> > - opp-hz = /bits/ 64 <1190400000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1209600000 {
> > - opp-hz = /bits/ 64 <1209600000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1228800000 {
> > - opp-hz = /bits/ 64 <1228800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1286400000 {
> > - opp-hz = /bits/ 64 <1286400000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1324800000 {
> > - opp-hz = /bits/ 64 <1324800000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x5>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1363200000 {
> > - opp-hz = /bits/ 64 <1363200000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x72>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1401600000 {
> > - opp-hz = /bits/ 64 <1401600000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x5>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1440000000 {
> > - opp-hz = /bits/ 64 <1440000000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1478400000 {
> > - opp-hz = /bits/ 64 <1478400000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x1>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1497600000 {
> > - opp-hz = /bits/ 64 <1497600000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x4>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1516800000 {
> > - opp-hz = /bits/ 64 <1516800000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1593600000 {
> > - opp-hz = /bits/ 64 <1593600000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x71>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1996800000 {
> > - opp-hz = /bits/ 64 <1996800000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x20>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-2188800000 {
> > - opp-hz = /bits/ 64 <2188800000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x10>;
> > - clock-latency-ns = <200000>;
> > - };
> > - };
> > -
> > - cluster1_opp: opp_table1 {
> > - compatible = "operating-points-v2-kryo-cpu";
> > - nvmem-cells = <&speedbin_efuse>;
> > - opp-shared;
> > -
> > - opp-307200000 {
> > - opp-hz = /bits/ 64 <307200000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x77>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-384000000 {
> > - opp-hz = /bits/ 64 <384000000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-403200000 {
> > - opp-hz = /bits/ 64 <403200000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-460800000 {
> > - opp-hz = /bits/ 64 <460800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-480000000 {
> > - opp-hz = /bits/ 64 <480000000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-537600000 {
> > - opp-hz = /bits/ 64 <537600000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-556800000 {
> > - opp-hz = /bits/ 64 <556800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-614400000 {
> > - opp-hz = /bits/ 64 <614400000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-652800000 {
> > - opp-hz = /bits/ 64 <652800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-691200000 {
> > - opp-hz = /bits/ 64 <691200000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-729600000 {
> > - opp-hz = /bits/ 64 <729600000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-748800000 {
> > - opp-hz = /bits/ 64 <748800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-806400000 {
> > - opp-hz = /bits/ 64 <806400000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-825600000 {
> > - opp-hz = /bits/ 64 <825600000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-883200000 {
> > - opp-hz = /bits/ 64 <883200000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-902400000 {
> > - opp-hz = /bits/ 64 <902400000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-940800000 {
> > - opp-hz = /bits/ 64 <940800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-979200000 {
> > - opp-hz = /bits/ 64 <979200000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1036800000 {
> > - opp-hz = /bits/ 64 <1036800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1056000000 {
> > - opp-hz = /bits/ 64 <1056000000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1113600000 {
> > - opp-hz = /bits/ 64 <1113600000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1132800000 {
> > - opp-hz = /bits/ 64 <1132800000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1190400000 {
> > - opp-hz = /bits/ 64 <1190400000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1209600000 {
> > - opp-hz = /bits/ 64 <1209600000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1248000000 {
> > - opp-hz = /bits/ 64 <1248000000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1286400000 {
> > - opp-hz = /bits/ 64 <1286400000>;
> > - opp-microvolt = <905000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1324800000 {
> > - opp-hz = /bits/ 64 <1324800000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1363200000 {
> > - opp-hz = /bits/ 64 <1363200000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1401600000 {
> > - opp-hz = /bits/ 64 <1401600000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1440000000 {
> > - opp-hz = /bits/ 64 <1440000000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1478400000 {
> > - opp-hz = /bits/ 64 <1478400000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1516800000 {
> > - opp-hz = /bits/ 64 <1516800000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1555200000 {
> > - opp-hz = /bits/ 64 <1555200000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1593600000 {
> > - opp-hz = /bits/ 64 <1593600000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1632000000 {
> > - opp-hz = /bits/ 64 <1632000000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1670400000 {
> > - opp-hz = /bits/ 64 <1670400000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1708800000 {
> > - opp-hz = /bits/ 64 <1708800000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1747200000 {
> > - opp-hz = /bits/ 64 <1747200000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x70>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1785600000 {
> > - opp-hz = /bits/ 64 <1785600000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x7>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1804800000 {
> > - opp-hz = /bits/ 64 <1804800000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x6>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1824000000 {
> > - opp-hz = /bits/ 64 <1824000000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x71>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1900800000 {
> > - opp-hz = /bits/ 64 <1900800000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x74>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1920000000 {
> > - opp-hz = /bits/ 64 <1920000000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x1>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1977600000 {
> > - opp-hz = /bits/ 64 <1977600000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x30>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-1996800000 {
> > - opp-hz = /bits/ 64 <1996800000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x1>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-2054400000 {
> > - opp-hz = /bits/ 64 <2054400000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x30>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-2073600000 {
> > - opp-hz = /bits/ 64 <2073600000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x1>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-2150400000 {
> > - opp-hz = /bits/ 64 <2150400000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x31>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-2246400000 {
> > - opp-hz = /bits/ 64 <2246400000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x10>;
> > - clock-latency-ns = <200000>;
> > - };
> > - opp-2342400000 {
> > - opp-hz = /bits/ 64 <2342400000>;
> > - opp-microvolt = <1140000 905000 1140000>;
> > - opp-supported-hw = <0x10>;
> > - clock-latency-ns = <200000>;
> > - };
> > - };
> > -
> > -....
> > -
> > -reserved-memory {
> > - #address-cells = <2>;
> > - #size-cells = <2>;
> > - ranges;
> > -....
> > - smem_mem: smem-mem@86000000 {
> > - reg = <0x0 0x86000000 0x0 0x200000>;
> > - no-map;
> > - };
> > -....
> > -};
> > -
> > -smem {
> > - compatible = "qcom,smem";
> > - memory-region = <&smem_mem>;
> > - hwlocks = <&tcsr_mutex 3>;
> > -};
> > -
> > -soc {
> > -....
> > - qfprom: qfprom@74000 {
> > - compatible = "qcom,qfprom";
> > - reg = <0x00074000 0x8ff>;
> > - #address-cells = <1>;
> > - #size-cells = <1>;
> > - ....
> > - speedbin_efuse: speedbin@133 {
> > - reg = <0x133 0x1>;
> > - bits = <5 3>;
> > - };
> > - };
> > -};
> > -
> > -Example 2:
> > ----------
> > -
> > - cpus {
> > - #address-cells = <1>;
> > - #size-cells = <0>;
> > -
> > - CPU0: cpu@100 {
> > - device_type = "cpu";
> > - compatible = "arm,cortex-a53";
> > - reg = <0x100>;
> > - ....
> > - clocks = <&apcs_glb>;
> > - operating-points-v2 = <&cpu_opp_table>;
> > - power-domains = <&cpr>;
> > - power-domain-names = "cpr";
> > - };
> > -
> > - CPU1: cpu@101 {
> > - device_type = "cpu";
> > - compatible = "arm,cortex-a53";
> > - reg = <0x101>;
> > - ....
> > - clocks = <&apcs_glb>;
> > - operating-points-v2 = <&cpu_opp_table>;
> > - power-domains = <&cpr>;
> > - power-domain-names = "cpr";
> > - };
> > -
> > - CPU2: cpu@102 {
> > - device_type = "cpu";
> > - compatible = "arm,cortex-a53";
> > - reg = <0x102>;
> > - ....
> > - clocks = <&apcs_glb>;
> > - operating-points-v2 = <&cpu_opp_table>;
> > - power-domains = <&cpr>;
> > - power-domain-names = "cpr";
> > - };
> > -
> > - CPU3: cpu@103 {
> > - device_type = "cpu";
> > - compatible = "arm,cortex-a53";
> > - reg = <0x103>;
> > - ....
> > - clocks = <&apcs_glb>;
> > - operating-points-v2 = <&cpu_opp_table>;
> > - power-domains = <&cpr>;
> > - power-domain-names = "cpr";
> > - };
> > - };
> > -
> > - cpu_opp_table: cpu-opp-table {
> > - compatible = "operating-points-v2-kryo-cpu";
> > - opp-shared;
> > -
> > - opp-1094400000 {
> > - opp-hz = /bits/ 64 <1094400000>;
> > - required-opps = <&cpr_opp1>;
> > - };
> > - opp-1248000000 {
> > - opp-hz = /bits/ 64 <1248000000>;
> > - required-opps = <&cpr_opp2>;
> > - };
> > - opp-1401600000 {
> > - opp-hz = /bits/ 64 <1401600000>;
> > - required-opps = <&cpr_opp3>;
> > - };
> > - };
> > -
> > - cpr_opp_table: cpr-opp-table {
> > - compatible = "operating-points-v2-qcom-level";
> > -
> > - cpr_opp1: opp1 {
> > - opp-level = <1>;
> > - qcom,opp-fuse-level = <1>;
> > - };
> > - cpr_opp2: opp2 {
> > - opp-level = <2>;
> > - qcom,opp-fuse-level = <2>;
> > - };
> > - cpr_opp3: opp3 {
> > - opp-level = <3>;
> > - qcom,opp-fuse-level = <3>;
> > - };
> > - };
> > -
> > -....
> > -
> > -soc {
> > -....
> > - cpr: power-controller@b018000 {
> > - compatible = "qcom,qcs404-cpr", "qcom,cpr";
> > - reg = <0x0b018000 0x1000>;
> > - ....
> > - vdd-apc-supply = <&pms405_s3>;
> > - #power-domain-cells = <0>;
> > - operating-points-v2 = <&cpr_opp_table>;
> > - ....
> > - };
> > -};
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index a7715fc859f7..e62cd1f613c5 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -15660,7 +15660,7 @@ QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096
> > M: Ilia Lin <ilia.lin@kernel.org>
> > L: linux-pm@vger.kernel.org
> > S: Maintained
> > -F: Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
> > +F: Documentation/devicetree/bindings/opp/qcom-cpufreq-nvmem.yaml
> > F: drivers/cpufreq/qcom-cpufreq-nvmem.c
> >
> > QUALCOMM CRYPTO DRIVERS
> > --
> > 2.33.0
> >
> >
> >
^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2021-11-04 11:33 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-14 8:30 [PATCH 0/8] Add support for MSM8996 Pro Yassine Oudjana
2021-10-14 8:31 ` [PATCH 1/8] dt-bindings: clk: qcom: msm8996-apcc: Add CBF Yassine Oudjana
2021-10-14 14:31 ` Rob Herring
2021-10-16 15:16 ` Yassine Oudjana
2021-10-26 21:08 ` Rob Herring
2021-10-14 8:32 ` [PATCH 2/8] dt-bindings: clk: qcom: msm8996-apcc: Add MSM8996 Pro compatible Yassine Oudjana
2021-10-14 14:31 ` Rob Herring
2021-10-16 15:22 ` Yassine Oudjana
2021-10-26 21:08 ` Rob Herring
2021-10-14 8:32 ` [PATCH 3/8] clk: qcom: msm8996-cpu: Add MSM8996 Pro CBF support Yassine Oudjana
2021-10-15 18:54 ` Konrad Dybcio
2021-10-24 17:30 ` Bjorn Andersson
2021-10-14 8:32 ` [PATCH 4/8] cpufreq: qcom_cpufreq_nvmem: Simplify reading kryo speedbin Yassine Oudjana
2021-10-14 12:25 ` Dmitry Baryshkov
2021-10-15 18:58 ` Konrad Dybcio
2021-10-28 18:18 ` Bjorn Andersson
2021-10-14 8:32 ` [PATCH 5/8] dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema Yassine Oudjana
2021-10-14 14:31 ` Rob Herring
2021-10-14 15:45 ` Rob Herring
2021-11-04 11:32 ` Yassine Oudjana
2021-10-14 8:32 ` [PATCH 6/8] dt-bindings: opp: qcom-cpufreq-nvmem: Remove SMEM Yassine Oudjana
2021-10-14 8:32 ` [PATCH 7/8] arm64: dts: qcom: msm8996: Add MSM8996 Pro support Yassine Oudjana
2021-10-15 19:01 ` Konrad Dybcio
2021-10-16 14:50 ` Yassine Oudjana
2021-10-16 15:09 ` Dmitry Baryshkov
2021-10-14 11:00 ` [PATCH 8/8] arm64: dts: qcom: msm8996-xiaomi-scorpio: Include msm8996pro.dtsi Yassine Oudjana
2021-10-15 19:03 ` Konrad Dybcio
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