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From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Rob Herring <robh+dt@kernel.org>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Mark Brown <broonie@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Sergei Shtylyov <sergei.shtylyov@gmail.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	Prabhakar <prabhakar.csengg@gmail.com>,
	Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH v2 7/7] memory: renesas-rpc-if: Add support for RZ/G2L
Date: Tue, 2 Nov 2021 12:48:09 +0100	[thread overview]
Message-ID: <YYElefbpP4pwfmUl@shikoro> (raw)
In-Reply-To: <20211025205631.21151-8-prabhakar.mahadev-lad.rj@bp.renesas.com>

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Hi Prabhakar,

> +#define RPCIF_PHYADD		0x0070	/* R/W available on R-Car E3/D3/V3M and RZ/G2{E,L} */
> +#define RPCIF_PHYWR		0x0074	/* R/W available on R-Car E3/D3/V3M and RZ/G2{E,L} */

Nice detailed research, thanks! Minor nit: Keep the sorting
alphabetical: D3, E3, V3M.

> +static void rpcif_rzg2l_timing_adjust_sdr(struct rpcif *rpc)
> +{
> +	u32 data;
> +
> +	regmap_write(rpc->regmap, RPCIF_PHYWR, 0xa5390000);
> +	regmap_write(rpc->regmap, RPCIF_PHYADD, 0x80000000);
> +	regmap_write(rpc->regmap, RPCIF_PHYWR, 0x00008080);
> +	regmap_write(rpc->regmap, RPCIF_PHYADD, 0x80000022);
> +	regmap_write(rpc->regmap, RPCIF_PHYWR, 0x00008080);
> +	regmap_write(rpc->regmap, RPCIF_PHYADD, 0x80000024);
> +
> +	regmap_read(rpc->regmap, RPCIF_PHYCNT, &data);
> +	regmap_write(rpc->regmap, RPCIF_PHYCNT, data | RPCIF_PHYCNT_CKSEL(3));
> +	regmap_write(rpc->regmap, RPCIF_PHYWR, 0x00000030);
> +	regmap_write(rpc->regmap, RPCIF_PHYADD, 0x80000032);
> +}

Still magic values here. Don't you have them explained in your Gen3
documentation? It is tables 62.16 and 62.17 in my versions.

Other than these, looks good.

Thanks,

   Wolfram

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  parent reply	other threads:[~2021-11-02 11:48 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-25 20:56 [PATCH v2 0/7] Add SPI Multi I/O Bus Controller support for RZ/G2L Lad Prabhakar
2021-10-25 20:56 ` [PATCH v2 1/7] dt-bindings: memory: renesas,rpc-if: Add support for the R9A07G044 Lad Prabhakar
2021-11-16 10:31   ` (subset) " Krzysztof Kozlowski
2021-10-25 20:56 ` [PATCH v2 2/7] dt-bindings: memory: renesas,rpc-if: Add optional interrupts property Lad Prabhakar
2021-11-16 10:31   ` (subset) " Krzysztof Kozlowski
2021-10-25 20:56 ` [PATCH v2 3/7] spi: spi-rpc-if: Check return value of rpcif_sw_init() Lad Prabhakar
2021-10-25 20:56 ` [PATCH v2 4/7] mtd: hyperbus: rpc-if: " Lad Prabhakar
2021-10-25 20:56 ` [PATCH v2 5/7] memory: renesas-rpc-if: Return error in case devm_ioremap_resource() fails Lad Prabhakar
2021-10-27  7:17   ` Geert Uytterhoeven
2021-10-27  7:21     ` Geert Uytterhoeven
2021-11-16 10:31   ` (subset) " Krzysztof Kozlowski
2021-10-25 20:56 ` [PATCH v2 6/7] memory: renesas-rpc-if: Drop usage of RPCIF_DIRMAP_SIZE macro Lad Prabhakar
2021-10-27  7:22   ` Geert Uytterhoeven
2021-11-16 10:31   ` (subset) " Krzysztof Kozlowski
2021-10-25 20:56 ` [PATCH v2 7/7] memory: renesas-rpc-if: Add support for RZ/G2L Lad Prabhakar
2021-10-26 14:46   ` Krzysztof Kozlowski
2021-10-27 16:16     ` Lad, Prabhakar
2021-11-02 11:48   ` Wolfram Sang [this message]
2021-11-02 23:25     ` Lad, Prabhakar
2021-11-03  8:41       ` Wolfram Sang
2021-11-03  9:12         ` Lad, Prabhakar
2021-11-15 13:03   ` Wolfram Sang
2021-11-16 11:11   ` (subset) " Krzysztof Kozlowski
2021-10-26 14:48 ` [PATCH v2 0/7] Add SPI Multi I/O Bus Controller " Krzysztof Kozlowski
2021-10-26 19:07 ` (subset) " Mark Brown
2021-11-16 10:33 ` Krzysztof Kozlowski
2021-11-16 10:40   ` Lad, Prabhakar
2021-11-16 11:11     ` Krzysztof Kozlowski

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