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From: Peter Zijlstra <peterz@infradead.org>
To: Lai Jiangshan <jiangshanlai@gmail.com>
Cc: linux-kernel@vger.kernel.org, x86@kernel.org,
	Lai Jiangshan <laijs@linux.alibaba.com>,
	Josh Poimboeuf <jpoimboe@redhat.com>,
	"Chang S . Bae" <chang.seok.bae@intel.com>,
	Sasha Levin <sashal@kernel.org>,
	Andy Lutomirski <luto@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH V5 01/50] x86/entry: Add fence for kernel entry swapgs in paranoid_entry()
Date: Thu, 18 Nov 2021 16:54:33 +0100	[thread overview]
Message-ID: <YZZ3OUaMjMIhvj70@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20211110115736.3776-2-jiangshanlai@gmail.com>

On Wed, Nov 10, 2021 at 07:56:47PM +0800, Lai Jiangshan wrote:
> From: Lai Jiangshan <laijs@linux.alibaba.com>
> 
> Commit 18ec54fdd6d18 ("x86/speculation: Prepare entry code for Spectre
> v1 swapgs mitigations") adds FENCE_SWAPGS_{KERNEL|USER}_ENTRY
> for conditional swapgs.  And in paranoid_entry(), it uses only
> FENCE_SWAPGS_KERNEL_ENTRY for both branches.  It is because the fence
> is required for both cases since the CR3 write is conditinal even PTI
> is enabled.
> 
> But commit 96b2371413e8f ("x86/entry/64: Switch CR3 before SWAPGS in
> paranoid entry") switches the code order and changes the branches.
> And it misses the needed FENCE_SWAPGS_KERNEL_ENTRY for user gsbase case.
> 
> Add it back by moving FENCE_SWAPGS_KERNEL_ENTRY up to cover both branches.
> 
> Fixes: Commit 96b2371413e8f ("x86/entry/64: Switch CR3 before SWAPGS in paranoid entry")
> Cc: Josh Poimboeuf <jpoimboe@redhat.com>
> Cc: Chang S. Bae <chang.seok.bae@intel.com>
> Cc: Sasha Levin <sashal@kernel.org>
> Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
> ---
>  arch/x86/entry/entry_64.S | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
> index e38a4cf795d9..14ffe12807ba 100644
> --- a/arch/x86/entry/entry_64.S
> +++ b/arch/x86/entry/entry_64.S
> @@ -888,6 +888,13 @@ SYM_CODE_START_LOCAL(paranoid_entry)
>  	ret
>  
>  .Lparanoid_entry_checkgs:
> +	/*
> +	 * The above SAVE_AND_SWITCH_TO_KERNEL_CR3 macro doesn't do an
> +	 * unconditional CR3 write, even in the PTI case.  So do an lfence
> +	 * to prevent GS speculation, regardless of whether PTI is enabled.
> +	 */
> +	FENCE_SWAPGS_KERNEL_ENTRY
> +
>  	/* EBX = 1 -> kernel GSBASE active, no restore required */
>  	movl	$1, %ebx
>  	/*
> @@ -903,13 +910,6 @@ SYM_CODE_START_LOCAL(paranoid_entry)
>  .Lparanoid_entry_swapgs:
>  	swapgs
>  
> -	/*
> -	 * The above SAVE_AND_SWITCH_TO_KERNEL_CR3 macro doesn't do an
> -	 * unconditional CR3 write, even in the PTI case.  So do an lfence
> -	 * to prevent GS speculation, regardless of whether PTI is enabled.
> -	 */
> -	FENCE_SWAPGS_KERNEL_ENTRY
> -
>  	/* EBX = 0 -> SWAPGS required on exit */
>  	xorl	%ebx, %ebx
>  	ret

I'm confused, shouldn't the LFENCE be between SWAPGS and future uses of
GS prefix?

In the old code, before 96b2371413e8f, we had:

	swapgs
	SAVE_AND_SWITCH_TO_KERNEL_CR3
	FENCE_SWAPGS_KERNEL_ENTRY

	// %gs user comes here..

And the comment made sense, since if SAVE_AND_SWITCH_TO_KERNEL_CR3 would
imply an unconditional CR3 write, the LFENCE would not be needed.

Then along gomes 96b2371413e8f and changes the order to:

	SAVE_AND_SWITCH_TO_KERNEL_CR3
	swapgs
	FENCE_SWAPGS_KERNEL_ENTRY
	// %gs user comes here..

But now the comment is crazy talk, because even if the CR3 write were
unconditional, it'd be pointless, since it's not after SWAPGS, but we
still have the LFENCE in the right place.

But now you want to make it:

	SAVE_AND_SWITCH_TO_KERNEL_CR3
	FENCE_SWAPGS_KERNEL_ENTRY
	swapgs
	// %gs user comes here..

And there's nothing left and speculation can use the old %gs for our
user and things go sideways. Hmm?


(on a completely unrelated note, I find KERNEL_ENTRY and USER_ENTRY
utterly confusing)


  reply	other threads:[~2021-11-18 15:54 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-10 11:56 [PATCH V5 00/50] x86/entry/64: Convert a bunch of ASM entry code into C code Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 01/50] x86/entry: Add fence for kernel entry swapgs in paranoid_entry() Lai Jiangshan
2021-11-18 15:54   ` Peter Zijlstra [this message]
2021-11-18 17:27     ` Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 02/50] x86/entry: Use the correct fence macro after swapgs in kernel CR3 Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 03/50] x86/traps: Remove stack-protector from traps.c Lai Jiangshan
2021-11-18 19:55   ` Peter Zijlstra
2021-11-19  1:38     ` Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 04/50] x86/xen: Add xenpv_restore_regs_and_return_to_usermode() Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 05/50] x86/entry: Use swapgs and native_iret directly in swapgs_restore_regs_and_return_to_usermode Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 06/50] compiler_types.h: Add __noinstr_section() for noinstr Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 07/50] x86/entry: Introduce __entry_text for entry code written in C Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 08/50] x86/entry: Move PTI_USER_* to arch/x86/include/asm/processor-flags.h Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 09/50] x86: Remove unused kernel_to_user_p4dp() and user_to_kernel_p4dp() Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 10/50] x86: Replace PTI_PGTABLE_SWITCH_BIT with PTI_USER_PGTABLE_BIT Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 11/50] x86: Mark __native_read_cr3() & native_write_cr3() as __always_inline Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 12/50] x86/traps: Move the declaration of native_irq_return_iret into proto.h Lai Jiangshan
2021-11-10 11:56 ` [PATCH V5 13/50] x86/entry: Add arch/x86/entry/entry64.c for C entry code Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 14/50] x86/entry: Expose the address of .Lgs_change to entry64.c Lai Jiangshan
2021-11-18 20:13   ` Peter Zijlstra
2021-11-10 11:57 ` [PATCH V5 15/50] x86/entry: Add C verion of SWITCH_TO_KERNEL_CR3 as switch_to_kernel_cr3() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 16/50] x86/traps: Add fence_swapgs_{user,kernel}_entry() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 17/50] x86/entry: Add C user_entry_swapgs_and_fence() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 18/50] x86/traps: Move pt_regs only in fixup_bad_iret() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 19/50] x86/entry: Switch the stack after error_entry() returns Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 20/50] x86/entry: move PUSH_AND_CLEAR_REGS out of error_entry Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 21/50] x86/entry: Move cld to the start of idtentry Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 22/50] x86/entry: Don't call error_entry for XENPV Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 23/50] x86/entry: Convert SWAPGS to swapgs in error_entry() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 24/50] x86/entry: Implement the whole error_entry() as C code Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 25/50] x86/entry: Use idtentry macro for entry_INT80_compat Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 26/50] x86/entry: Convert SWAPGS to swapgs in entry_SYSENTER_compat() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 27/50] x86: Remove the definition of SWAPGS Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 28/50] x86/entry: Make paranoid_exit() callable Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 29/50] x86/entry: Call paranoid_exit() in asm_exc_nmi() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 30/50] x86/entry: move PUSH_AND_CLEAR_REGS out of paranoid_entry Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 31/50] x86/entry: Add the C version ist_switch_to_kernel_cr3() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 32/50] x86/entry: Skip CR3 write when the saved CR3 is kernel CR3 in RESTORE_CR3 Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 33/50] x86/entry: Add the C version ist_restore_cr3() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 34/50] x86/entry: Add the C version get_percpu_base() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 35/50] x86/entry: Add the C version ist_switch_to_kernel_gsbase() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 36/50] x86/entry: Implement the C version ist_paranoid_entry() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 37/50] x86/entry: Implement the C version ist_paranoid_exit() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 38/50] x86/entry: Add a C macro to define the function body for IST in .entry.text Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 39/50] x86/debug, mce: Use C entry code Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 40/50] x86/idtentry.h: Move the definitions *IDTENTRY_{MCE|DEBUG}* up Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 41/50] x86/nmi: Use DEFINE_IDTENTRY_NMI for nmi Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 42/50] x86/nmi: Use C entry code Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 43/50] x86/entry: Add a C macro to define the function body for IST in .entry.text with an error code Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 44/50] x86/doublefault: Use C entry code Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 45/50] x86/sev: Add and use ist_vc_switch_off_ist() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 46/50] x86/sev: Use C entry code Lai Jiangshan
2021-11-18  9:31   ` Liam Merwick
2021-11-18 11:04     ` Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 47/50] x86/entry: Remove ASM function paranoid_entry() and paranoid_exit() Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 48/50] x86/entry: Remove the unused ASM macros Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 49/50] x86/entry: Remove save_ret from PUSH_AND_CLEAR_REGS Lai Jiangshan
2021-11-10 11:57 ` [PATCH V5 50/50] x86/syscall/64: Move the checking for sysret to C code Lai Jiangshan
2021-11-18  8:54 ` [PATCH V5 00/50] x86/entry/64: Convert a bunch of ASM entry code into " Lai Jiangshan

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